SONET/SDH add/drop multiplexers. SONET/SDH cross connects. SONET/SDH t

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SONET/SDH add/drop multiplexers. SONET/SDH cross connects. SONET/SDH t

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TTRN0112G 12.5 Gbits/s Clock Synthesizer, 16:1 Data Multiplexer
SONET/SDH add/drop multiplexers. SONET/SDH cross connects. SONET/SDH test equipment. Digital video transmission.
Supports OC-192/STM-64 (standard multiple rates) 10GE data rates. Allows separate frequency ranges operation: 9.95328 through 10.70922 12.0 through 12.5 Supports clockless data transfer mode. Supports forward directional clocking parallel transfer input data with clocks. Supports contradirectional clocking parallel transfer input data using output clock. Allows 155.52 622.08 reference clock using common loop components. Additional Gbits/s serial data output system loop back. Supports clock output clocked laser driver applications. Single supply. LVDS 622.08 Mbits/s signal I/Os. CMOS compatible with LVTTL signaling. Power dissipation 1.35 Available 198-pin package. Jitter generation/transfer compliant with following: Telcordia Technologies GR-1377CORE ITU-T G.825 ITU-T G.958 Fully compatible with optical interface forum specification OIF99.102.5.
Description
Agere Systems Inc. TTRN0112G device designed 16:1 multiplexer that accepts differential LVDS data inputs divided-by-64 divided-by-16 reference clock generates 12.5 Gbits/s clock data output. Both forward directional contradirectional clocking schemes supported transferring data across parallel interface. When contraclocking used, TTRN0112G provides four phases divided-by-16 clock output back stream data chip. device also supports clockless parallel data transfer mode. TTRN0112G operated either frequency range 9.95328 through 10.70922 range 12.0 through 12.5 GHz. higher rate selectable.
Functional Overview
TTRN0110G performs clock synthesis 16:1 data multiplexing operations required support Gbits/s OC-192/STM-64 applications compliant with Telcordia Technologies standards. Parallel Mbits/s data clocked into input register. Both forward directional contra directional clocking modes supported well clockless data transfer mode. data then multiplexed into Gbits/s serial stream output buffered interfacing laser driver. clock synthesized from reference clock used retime serial data. clock optionally available output.
OC-192/STM-64 data rate 9.95328 Gbits/s typically approximated Gbits/s this document when referring application rate. Similarly, low-speed parallel interface data rate 622.08 Mbits/s typically approximated Mbits/s. exact frequencies used only when necessary clarity.
Applications
SONET/SDH optical modules. SONET/SDH line origination equipment.
Telcordia Technologies registered trademark Telecordia Technologies, Inc.
TTRN0112G 12.5 Gbits/s Clock Synthesizer, 16:1 Data Multiplexer
Functional Overview (continued)
Rate Support
TTRN addition under functional overview will support rates 9.95328 through rate 10.70922 (FECN higher rates 12.0 through 12.5 (FECN FECN selects between ranges 9.95328 through 10.70922 12.0 through 12.5 GHz. frequency-based specifications multiplied (rate/9.95328 GHz) when operating higher frequency rates. time-based specifications, with exception electrical signal rise fall times, multiplied (9.95328 GHz/rate). non-standard rates, reference clock would need applied (rate/9.95328 GHz) 155.52 (rate/9.95328 GHz) 622.08 paralled data interface would operate (rate/9.95328 GHz) 622.08 MHz.
Block Diagram
INPUT REGISTER 16:1 MULTIPLEXER DATA BUFFER DATA RETIME DIGITAL LOGIC RESETN ENLBDN LBDP LBDN D10GP D10GN INVDATN ENCK10G CK10GP CK10GN
D15P D15N
OVERFLOW EXTCNTR RREFCML CLKMOD[1:0] DECODE RREFVCO RREFLVDS PICLKP PICLKN
TIMING GENERATION
ENCK155N CK155P CK155N CK622P CK622N PHADJ[1:0] REFFREQ REFCLKP REFCLKN LCKLOSSN ACQUISITION INDICATOR CHARGE PUMP DIVIDE MANUAL PHASE ADJUST DIVIDE TEST PHASE/ FREQ. DETECTOR TESTN TSTCKP
FECN
Note: Diagram representative device functionality conceptual signal flow. Internal implementation details different than shown.
Figure Functional Block Diagram TTRN0112G
0356
Agere Systems Inc.
TTRN0112G 12.5 Gbits/s Clock Synthesizer, 16:1 Data Multiplexer
Notes
Agere Systems Inc.
additional information, contact your Agere Systems Account Manager following: INTERNET: http://www.agere.com E-MAIL: docmaster@micro.lucent.com AMERICA: Agere Systems Inc., Union Boulevard, Room 30L-15P-BA, Allentown, 18109-3286 1-800-372-2447, 610-712-4106 CANADA: 1-800-553-2448, 610-712-4106) ASIA PACIFIC: Agere Systems Singapore Pte. Ltd., Science Park Drive, #03-18 Cintech III, Singapore 118256 Tel. (65) 8833, (65) 7495 CHINA: Agere Systems (Shanghai) Co., Ltd., 33/F Tower, Century Boulevard Pudong, Shanghai 200121 Tel. (86) 50471212, (86) 50472266 JAPAN: Agere Systems Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan Tel. (81) 5421 1600, (81) 5421 1700 EUROPE: Data Requests: DATALINE: Tel. (44) 7000 368, (44) 1189 Technical Inquiries:GERMANY: (49) 95086 (Munich), UNITED KINGDOM: (44) 1344 (Ascot), FRANCE: (33) (Paris), SWEDEN: (46) (Stockholm), FINLAND: (358) 3507670 (Helsinki), ITALY: (39) 6608131 (Milan), SPAIN: (34) 1441 (Madrid)
Agere Systems Inc. reserves right make changes product(s) information contained herein without notice. liability assumed result their application.
Copyright 2001 Agere Systems Inc. Rights Reserved Printed U.S.A.
2001 PB01-126HSPL

SONET/SDH add/drop multiplexers. SONET/SDH cross connects. SONET/SDH t

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