FLASH MEMORY Burst Mode MBM29BL160D FEATURES Singl
|
|
|
Top Searches for this datasheet
Edition
FLASH MEMORY
Burst Mode
MBM29BL160D
FEATURES
Single read, program erase Minimizes system level power requirements High performance frequency with non-wait maximum burst access time words sequential Burst read mode function Alterable latency Switchable asynchronous/synchronous read mode software command Compatible with JEDEC-standard commands Uses same software commands E2PROMs Packaging 56-pin TSOP (Package suffix: PFTN-Normal Bend Type) 56-pin SSOP (Package suffix: Minimum 100,000 program/erase cycles Sector erase architecture word, words, 112K word, seven 128K words sectors word mode. combination sectors concurrently erased. Also supports full chip erase Embedded EraseAlgorithms Automatically pre-programs erases chip sector Embedded programAlgorithms Automatically programs verifies data specified address Data Polling Toggle feature detection program erase cycle completion power consumption maximum active read current maximum program/erase current maximum standby current write inhibit Erase Suspend/Resume Suspends erase operation allow read and/or program another sector within same device Sector protect Hardware method disables combination sectors from program erase operations Temporary Sector Unprotect Hardware method RESET indicate status burst sequence
Embedded Eraseand Embedded Programare trademarks Advanced Micro Devices.Inc.
MBM29BL160D
PACKAGE
REDISTRIBUTE FUJITSU CONFIDENTIAL
Marking side
(FPT-56P-M01) 56-pin TSOP
(FPT-56P-M03) 56-pin SSOP
REDISTRIBUTE FUJITSU CONFIDENTIAL
DESCRIPTION
MBM29BL160D
MBM29BL160D 16M-bit, V-only Burst read mode Flash memory organized words bits each. MBM29BL160D offered 56-pin TSOP 56-pin SSOP packages. device designed programmed in-system with standard system 3.0V supply. 12.0 required write erase operations. device also reprogrammed standard EPROM programmers. MBM29BL160D provides truly high performance non-volatile Flash memory solution. MBM29BL160D offers burst access times @100 with initial access times @100 allowing operation highspeed microprocessors without wait states. MBM29BL160D regular control pins, i.e. chip enable (CE), write enable (WE), output enable (OE) control normal read write operations. Moreover, three additional control pins have been added allow easy interface with minimal glue logic wide range microprocessors microcontrollers high performance Burst read capability. These additional pins follows Load Burst Address (LBA), Burst Address Advance (BAA), Clock (CLK). asynchronous (relative CLK). MBM29BL160D programmed executing program command sequence. This will invoke Embedded Program Algorithm which internal algorithm that automatically times program pulse widths verifies proper cell margins. Typically, each sector programmed verified about seconds. Erase accomplished executing erase command sequence. This will invoke Embedded Erase Algorithm which internal algorithm that automatically preprograms array already programmed before executing erase operation. During erase, device automatically times erase pulse widths verifies proper cell margins. individual sector typically erased verified seconds already preprogrammed). device also features sector erase architecture. sector mode allows each sector erased reprogrammed without affecting other sectors. MBM29BL160D erased when shipped from factory. device features single power supply operation both read write functions. Internally generated regulated voltages provided program erase operations. detector automatically inhibits write operations loss power. program erase detected Data Polling DQ7, Toggle feature output pin. Once program erase cycle been completed, device internally resets read mode. Fujitsu's Flash technology combines years Flash memory manufacturing experience produce highest levels quality, reliability, cost effectiveness. MBM29BL160D memory electrically erases bits within sector simultaneously FowlerNordhiem tunneling. words programmed word time using EPROM programming mechanism electron injection.
MBM29BL160D
FLEXIBLE SECTOR-ERASE ARCHITECTURE
REDISTRIBUTE FUJITSU CONFIDENTIAL
word, words, 112K word, seven 128K words sectors word mode. Individual-sector, multiple-sector, bulk-erase capability. Individual multiple-sector protection user definable.
Sector SA10
Sector Size words words words 112K words 128K words 128K words 128K words 128K words 128K words 128K words 128K words MBM29BL160D Sector Architecture
Address Range 00000h 01FFFh 02000h 02FFFh 03000h 03FFFh 04000h 1FFFFh 20000h 3FFFFh 40000h 5FFFFh 60000h 7FFFFh 80000h 9FFFFh A0000h BFFFFh C0000h DFFFFh E0000h FFFFFh
REDISTRIBUTE FUJITSU CONFIDENTIAL
PRODUCT LINEUP
Part Ordering Part Max. Random Access Time (ns) Max. Valid Clock Output Delay (ns) (Note) Burst Access Time (ns) Access (ns) Note: Initial access (tIACC) needs clock wait.
+0.3V -0.3V +0.6V -0.3V
MBM29BL160D
MBM29BL160D
BLOCK DIAGRAM
DQ15 RY/BY Buffer RY/BY Buffer
Erase Voltage Generator
Input/Output Buffers
RESET State Control Command Register Program Voltage Generator
Chip Enable Output Enable Logic
Data Latch
Detector
Timer Address Latch
Y-Decoder
Y-Gate
Burst State Control
Burst Address Counter
X-Decoder
Cell Matrix
MBM29BL160D
CONNECTION DIAGRAMS
REDISTRIBUTE FUJITSU CONFIDENTIAL
TSOP N.C. N.C. RESET RY/BY FPT-56P-M01 N.C. DQ15 DQ14 DQ13 DQ12 N.C. DQ11 DQ10 N.C.
SSOP (Top View)
(Marking Side)
RESET RY/BY N.C. DQ10 DQ11
N.C. N.C. N.C. DQ15 DQ14 DQ13 DQ12 N.C.
Standard Pinout
FPT-56P-M03
REDISTRIBUTE FUJITSU CONFIDENTIAL
LOGIC SYMBOL
MBM29BL160D
Table MBM29BL160D Configuration DQ15 DQ15 RESET RY/BY RY/BY RESET N.C. Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable Ready/Busy Output (Open drain) Clock Input Load Burst Address input Burst Address Advance input Burst Sequence Indicator Output Hardware Reset pin/ Temporary Sector Unprotect Connected Internally Device Ground Device Power Supply (3.3 +0.3 +0.6 -0.3 -0.3 Function
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
Table MBM29BL160D User Operation
OPERATION Auto-Select Manufacturer Code Auto-Select Drive Code Conventional Read Load starting Burst address Advance Burst next Address with Data presented Data Advance Burst next Address with appropriate Data presented Data Terminate current Burst read cycle Burst Mode Status Burst Suspend Burst Resume Standby Output Disable Write Enable Sector Protect Verify Sector Protect Temporary Sector Unprotect Hardware Reset
Code Code DOUT
RESET
HIGH-Z
DOUT
HIGH-Z Code HIGH-Z DOUT HIGH-Z HIGH-Z Code HIGH-Z
Legend: L=VIL, H=VIH, X=VIL VIH.
pulse input. Characteristics voltage levels.
Notes: Manufacturer device codes also accessed command register write sequence. Refer Table VIL, initiates write operations. Data retained internally device. Same Data Burst Suspend Refer Table valid Data (DIN) during write operation. Volts
REDISTRIBUTE FUJITSU CONFIDENTIAL
FUNCTIONAL DESCRIPTION CONVENTIONAL READ MODE
MBM29BL160D
MBM29BL160D device powers-up conventional read mode. read mode MBM29BL160D device control functions which must satisfied order obtain data outputs. power control should used device selection. output control should used gate data output pins device selected. Address access time (tACC) equal delay from stable addresses valid output data. chip enable access time (tCE) delay from stable addresses stable valid data output pins. output enable access time delay from falling edge valid data output pins (Assuming addresses have been stable least tACC time). Figure timing specifications.
BURST READ MODE
MBM29BL160D will power-up "conventional read" operating mode. device command will required enable burst mode operation. Refer Command Definitions table specific command used enable disable Burst operating mode. This consists 4-word sequential Burst used support microprocessors that implement instruction prefetch queue support large data transfers during system configuration. Modulo Burst mode, MBM29BL160D will deliver continuous sequential word stream starting specified word will wrap around when 2-bit counter reached (11). example, initial address xxxx0h, data order will 0-1-2-3; initial address xxxx1h, data order will 1-2-3-0; initial address xxxx2h, data order will 2-3-01; initial address xxxx3h, data order will 3-0-1-2. Data will repeated more than clocks supplied. Upon power MBM29BL160D defaults conventional read mode. this mode, CLK, LBA, ignored. device operates like conventional Flash device. Data available tACC nano seconds after address becomes stable become asserted. MBM29BL160D enters burst mode writing Burst Enable command sequence. device exits burst mode writing Burst Disable command sequence. (see Table Command Definition.) Hardware Reset will terminate Burst mode. MBM29BL160D regular control pins, i.e. Chip Enable (CE), Write Enable (WE), Output Enable (OE) control normal read write operations. Moreover, three additional control pins have been added allow easy interface with minimal glue logic wide range microprocessors microcontrollers high performance Burst read capability. These additional pins follows Load Burst Address (LBA), Burst Address Advance (BAA), Clock (CLK). asynchronous (relative CLK). Figure timing specifications. Burst read mode operation synchronous operation tied rising edge clock. microprocessor microcontroller supplies only initial address, subsequent addresses automatically generated device rising edge subsequent clock cycles. Burst read cycle consists address phase corresponding data phase. During address phase, Load Burst Address (LBA) asserted (taken Low) clock period. Together with rising edge CLK, starting burst address loaded into internal Burst Address Counter. During data phase, first burst data available after initial access time (tIACC) from rising edge that loads burst address. subsequent burst data, active Burst Address Advance (BAA) rising edge will increment counter supply remaining data appropriate sequence specified burst access time (tBACC). stream data will provided long asserted. During Burst read mode operation, addresses latched internally device. initial access time (tIACC) equal delay from stable addresses valid output data. Burst read mode operation terminated taking High, taking RESET Low, writing Burst Disable command sequence. Activating (Low) will terminate previous Burst read cycle start Burst read cycle with address that currently valid. MBM29BL160D device also capable Burst Suspend Burst Resume operations. This device will enter Burst Suspend mode when both de-asserted (taken High). This means that device will hold data that being presented outputs when device into Burst Suspend operation data will presented system data bus. Burst operation resumed either asserting and/or BAA. Asserting only will cause device present same data that held during Burst Suspend operation. Asserting both BAA, rising edge will increment counter present next subsequent data outputs after specified tBACC time. general, de-asserted asserted, device will continue output current data until asserted address phase started. asserted de-asserted, device will increase counter only synchronized with rising edge CLK. A[1:0] provide starting burst address. burst address counter advances A[1:0] shown next. case initial address xxxx0h, advanced are; order. Table Burst Sequence detail.
MBM29BL160D
BURST INDICATOR
REDISTRIBUTE FUJITSU CONFIDENTIAL
This active output signal indicates burst sequence. same output driving characteristic typical data output signal. becomes same data output cycle last word burst sequence. 4-Word sequential Burst mode (e.g. 0-1-2-3, 1-2-3-0, 2-3-0-1, 3-0-1-2), will become active word "3". processors that does wish receive wrap around data, address need issued Flash order receive data from next burst range. Wrap around data defined data after last word burst range, e.g. word 0,1, after word 4-Word sequential mode. could tied together when used with when processor recognize issue another burst address data from another burst range. controlled
STANDBY MODE
There ways implement standby mode MBM29BL160D devices. using both RESET pins; other RESET only. When using both pins, CMOS standby mode achieved with RESET inputs both held ±0.3 Under this condition current consumed less than conventional read mode). During Embedded Algorithm operation, active current (ICC2) required even "H". device read with standard access time (tCE) from either these standby modes. When using RESET only, CMOS standby mode achieved with RESET input held ±0.3 "L"). Under this condition current consumed less than conventional read mode). Once RESET taken high, device requires wake time before outputs valid read access. standby mode, outputs high impedance state, independent input.
OUTPUT DISABLE
input logic high level (VIH), output from device disabled. This will cause output pins high impedance state.
AUTOSELECT
Autoselect mode allows reading binary code from device will identify manufacturer type. intent allow programming equipment automatically match device programmed with corresponding programming algorithm. Autoselect command also used check status write-protected sectors (see Tables 3.2). This mode functional over entire temperature range device. activate this mode, programming equipment must force (11.5 12.5 Volts) address identifier bytes then sequenced from device outputs toggling address from VIH. addresses don't cares except (see Table manufacturer device codes also read command register, instances when MBM29BL160D erased programmed system without access high voltage pin. command sequence illustrated Table Command Definitions. order determine which sectors write protected, must VIH, must while running through sector addresses; selected sector protected, logical will output (DQ0 =1).
BURST MODE STATUS
MBM29BL160D Burst Mode Status function. This mode check that device burst read mode conventional read mode. activate this mode, device must force (11.5 12.5 Volts) address must used control pins order read binary code. control pins must VIH). Producing binary code under conditions (A6, status burst mode. Otherwise device will produce conventional read mode. terminate mode above mentioned, executed taking away from address pin. Table Tables Autoselect Codes.
REDISTRIBUTE FUJITSU CONFIDENTIAL
WRITE
MBM29BL160D
Device erasure programming accomplished command register. command register written bringing VIL, while VIH. Addresses latched falling edge whichever occurs later, while data latched rising edge pulse, whichever occurs first. Figures Refer Write Characteristics Erase/Programming Waveforms specific timing parameters.
SECTOR PROTECT
MBM29BL160D features hardware sector protect. This feature will disable both program erase operations number sectors through 10). sector protect feature enabled using programming equipment user's site. device shipped with sectors unprotected. activate this mode, programming equipment must force address control VIL, VIL, VIH. sector addresses pins (A19, A18, A17, A16, A15, A14, A13, A12) should sector protected. Table defines sector address each eleven (11) individual sectors. Programming protection circuitry begins falling edge pulse terminated with rising edge same. Sector addresses must held constant during pulse. Refer figure sector protect algorithm. verify programming protection circuitry, programming equipment must force address with VIH. Scanning sector addresses (A19, A18, A17, A16, A15, A14, A13, A12) while (A6, will produce logical device output protected sector. Otherwise device will produce unprotected sector. this mode, lower order addresses, except don't care. Address locations with reserved Autoselect manufacturer device codes. also possible determine sector protected system writing Autoselect command. Performing read operation address location XX02H, where higher order addresses pins (A19, A18, A17, A16, A15, A14, A13, A12) represents sector address will produce logical protected sector. Tables Autoselect codes.
TEMPORARY SECTOR UNPROTECT
This feature allows temporary unprotection previously protected sectors MBM29BL160D device order change data. Temporary Sector Unprotect mode activated setting RESET high voltage (VID). During this mode, formerly protected sectors programmed erased selecting sector addresses. Once taken away from RESET pin, previously protected sectors will protected again. Figures
HARDWARE RESET
MBM29BL160D device reset driving RESET VIL. RESET pulse requirement kept (VIL) least order properly reset internal state machine. operation process being executed will terminated internal state machine will reset conventional read mode tREADY after RESET driven low. Furthermore, once RESET goes high, device requires additional before allows read access. When RESET low, device will standby mode duration pulse data output pins will tri-stated. hardware reset occurs during program erase operation, data that particular location will corrupted. Please note that RY/BY output signal should ignored during RESET pulse. Refer Figure timing diagram. Refer Temporary Sector Unprotect additional functionality. hardware reset occurs during Embedded Erase Algorithm, there possibility that erasing sector(s) will need erased again before they programmed.
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
Table MBM29BL160D Sector Protection Verify Autoselect Code Type Manufacturer's Code Device Code Sector Protection Burst Mode Status MBM29BL160D Sector Addresses Code (HEX) 22CDH
Outputs protected sector addresses outputs unprotected sector addresses. Outputs during execution Burst Mode outputs during Conventional Read Mode.
Table Expanded Autoselect Code Table Type Manufacturer's Code Code DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
Device Code MBM29BL160D 22CDH Sector Protection Burst Mode Status
Table Sector Address Tables (MBM29BL160D) Sector Address SA10 00100-11111
Address Range
00000h 01FFFh 02000h 02FFFh 03000h 03FFFh 04000h 1FFFFh 20000h 3FFFFh 40000h 5FFFFh 60000h 7FFFFh 80000h 9FFFFh A0000h BFFFFh C0000h DFFFFh E0000h FFFFFh
REDISTRIBUTE FUJITSU CONFIDENTIAL
Table Modulo Burst Sequence Table Starting Burst Address Burst Address Counter
MBM29BL160D
Sequential 0-1-2-3 1-2-3-0 2-3-0-1 3-0-1-2
When addresses reached (A1, outputs low. This signal indicates burst sequence. Burst Address Counter counted rising edge CLK.
Table MBM29BL160D Command Definitions Write Cycles Req'd Fourth Read/Write Cycle
Command Sequence (Notes Read/Reset (Note Read/Reset (Note Autoselect Program (Notes Chip Erase Sector Erase (Note Sector Erase Suspend Sector Erase Resume Burst Enable (Note Burst Disable (Note
First Write Cycle
Second Write Cycle
Third Write Cycle
Fifth Write Cycle Addr Data
Sixth Write Cycle Addr Data
Addr Data Addr Data
XXXH
Addr Data Addr Data
555H 555H 555H 555H 555H 2AAH 2AAH 555H
555H 555H 555H 555H 555H
2AAH 2AAH 2AAH 2AAH 2AAH
555H 555H
XXXH XXXH
2AAH 2AAH 555H 555H XXXH XXXH
555H 555H
Notes: Address bits address commands except Program Address (PA) Sector Address (SA). operations defined Table Address memory location read. Address memory location programmed. Addresses latched falling edge pulse. Address sector erased. combination will uniquely select sector. Data read from location during read operation. Data programmed location Data latched rising edge Both Read/Reset commands functionally equivalent, resetting device read mode. Mode Data 00H: Conventional read mode (Default) 01H: Burst read mode
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
Table MBM29BL160D Extended Command Definitions Write Cycles Req'd
Command Sequence
First Write Cycle Addr Data
Second Write Cycle Addr 2AAH XXXH Data
Third Write Cycle Addr 555H Data
Fourth Read Cycle Addr Data
Fast Mode Fast Program (Note Reset from Fast Mode (Note Extended Sector Protect (Note
555H XXXH XXXH XXXH
Sector Address protected. sector address (SA) (A6, Sector protection verify data. Output protected sector addresses output unprotected sector addresses. Notes: This command valid while fast mode. This command valid while RESET VID.
REDISTRIBUTE FUJITSU CONFIDENTIAL
COMMAND DEFINITIONS
MBM29BL160D
Device operations selected writing specific address data sequences into command register. Writing incorrect address data values writing them improper sequence will reset device read mode. Tables define valid register command sequences. Note that Erase Suspend (B0H) Erase Resume (30H) commands valid only while Sector Erase operation progress. Moreover both Read/Reset commands functionally equivalent, resetting device read mode. Please note that commands always written DQ15 bits ignored.
READ/RESET COMMAND
order return from Autoselect mode Exceeded Timing Limits (DQ5 read mode, read/reset operation initiated writing read/reset command sequence into command register. Microprocessor read cycles retrieve array data from memory. device remains enabled reads until command register contents altered. device will automatically power-up read/reset state. this case, command sequence required read data. Standard microprocessor read cycles will retrieve array data. This default value ensures that spurious alteration memory contents occurs during power transition. case returning from burst read mode conventional read mode, necessary write burst disable command sequence into command register. Please note impossible change from burst read mode conventional read mode writing read/reset command.
AUTOSELECT COMMAND
Flash memories intended applications where local alters memory contents. such, manufactures device codes must accessible while device resides target system. PROM programmers typically access signature codes raising high voltage. However, multiplexing high voltage onto address lines generally desired system design practice. device contains Autoselect command operation supplement traditional PROM programming methodology. operation initiated writing Autoselect command sequence into command register. Following last command write, read cycle from address XX00H retrieves manufacture code 04H. read cycle from address XX01H retrieves device code 22CDH. (See Tables 3.2.) sector state (protect unprotect) will indicated address XX02H. Scanning sector addresses (A19, A18, A17, A16, A15, A14, A13, A12) while (A6, will produce logical device output protected sector. programming verification should perform margin mode verification protected sector (See Table terminate operation, necessary write read/reset command sequence into register also write Autoselect command during operation, executing after writing read/reset command sequence.
BURST MODE STATUS COMMAND
operation decide which device burst read mode conventional read mode initiated writing burst mode status command sequence into command register. burst mode status four-bus cycle operation. Following last command write, address XXXH mode data write into command register, then burst read mode enabled. address XXXH mode data write into command register, burst mode disabled. (This conventional read mode.) Table Command Definition.
WORD PROGRAMMING
device programmed word-by-word basis. Programming four-bus cycle operation. There "unlock" write cycles. These followed program set-up command data write cycles. Addresses latched falling edge whichever happens later data latched rising edge whichever happens first. rising edge last (whichever happens first) begins programming. Upon executing Embedded Program Algorithm command sequence, system required provide further controls timings. device will automatically provide adequate internally generated program pulses verify programmed cell margin. Figures automatic programming operation completed when data equivalent data written this which time device return read mode addresses longer latched (See Table Hardware Sequence Flags). Therefore, device requires that valid address supplied system this time. Hence, Data Polling must performed memory location which being programmed. commands written chip during this period will ignored. hardware reset occurs during programming operation, impossible guarantee whether data being written correct not. Programming allowed sequence across sector boundaries. Beware that data cannot programmed back "1". Attempting either hang device result apparent success according data polling algorithm read from read/reset mode will show that data still "0". Only erase operations convert "0"s "1"s. Figure illustrates Embedded ProgramAlgorithm using typical command strings operations.
MBM29BL160D
CHIP ERASE
REDISTRIBUTE FUJITSU CONFIDENTIAL
Chip erase six-bus cycle operation. There "unlock" write cycles. These followed writing "set-up" command. more "unlock" write cycles then followed chip erase command. Chip erase does require user program device prior erase. Upon executing Embedded Erase Algorithm command sequence device will automatically program verify entire memory zero data pattern prior electrical erase (Preprogram Function). system required provide controls timings during these operations. automatic erase begins rising edge last pulse command sequence terminates when data (See Write Operation Status section) which time device returns read mode. Figure Figure illustrates Embedded EraseAlgorithm using typical command strings operations.
SECTOR ERASE
Sector erase six-bus cycle operation. There "unlock" write cycles, followed writing "set-up" command. more "unlock" write cycles then followed sector erase command. sector address (any address location within desired sector) latched falling edge while command (Data 30H) latched rising edge After time-out from rising edge last sector erase command, sector erase operation will begin. Multiple sectors erased concurrently writing six-bus cycle operations Table This sequence followed with writes Sector Erase command addresses other sectors desired concurrently erased. time between writes must less than otherwise that command will accepted erasure will start. recommended that processor interrupts disabled during this time guarantee this condition. interrupts re-enabled after last Sector Erase command written. timeout from rising edge last will initiate execution Sector Erase command(s). another falling edge occurs within time-out window, timer reset. Monitor determine sector erase timer window still open (See section DQ3, Sector Erase Timer). command other than Sector Erase Erase Suspend during this time-out period will reset device read mode, ignoring previous command string. Once execution begun, resetting device will corrupt data that sector. that case, restart erase those sectors allow them complete (Refer Write Operation Status section Sector Erase Timer operation). Loading sector erase buffer done sequence with number sectors 10). Sector erase does require user program device prior erase. device automatically programs memory locations sector(s) erased prior electrical erase (Preprogram Function). When erasing sector sectors remaining unselected sectors affected. system required provide controls timings during these operations. Figure automatic sector erase begins after time from rising edge pulse last sector erase command pulse terminates when data (See Write Operation Status section) which time device returns read mode. Data polling must performed address within sectors being erased. Figure illustrates Embedded EraseAlgorithm using typical command strings operations.
ERASE SUSPEND/RESUME
Erase Suspend command allows user interrupt Sector Erase operation then perform data reads from program sector being erased. This command applicable only during Sector Erase operation which includes time-out period sector erase. Erase Suspend command will ignored written during Chip Erase operation Embedded Program Algorithm. Writing Erase Suspend command during Sector Erase time-out results immediate termination time-out period suspension erase operation. Writing Erase Resume command resumes erase operation. addresses "Don't Care" when writing Erase Suspend Erase Resume commands. When Erase Suspend command written during Sector Erase operation, device will take maximum suspend erase operation. When devices have entered erase-suspended mode, will logic "1", will stop toggling. user must address erasing sector reading determine erase operation been suspended. Further writes Erase Suspend command ignored. When erase operation been suspended, device defaults erase-suspend-read mode. Reading data this mode same reading from standard read mode except that data must read from sectors that have been erase-suspended. Successively reading from erase-suspended sector while device erase-suspend-read mode will cause toggle (See section DQ2).
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
After entering erase-suspend-read mode, user program device writing appropriate command sequence Program. This program mode known erase-suspend-program mode. Again, programming this mode same programming regular Program mode except that data must programmed sectors that erase-suspended. Successively reading from erase-suspended sector while devices erase-suspend-program mode will cause toggle. erase-suspended program operation detected Data polling DQ7, Toggle (DQ6) which same regular Program operation. Note that must read from program address while read from address. resume operation Sector Erase, Resume command (30H) should written. further writes Resume command this point will ignored. Another Erase Suspend command written after chip resumed erasing. This Erase Suspend command does allow burst read, since burst mode synchronous operation.
EXTENDED COMMAND
Fast Mode MBM29BL160D Fast Mode function. This mode dispenses with initial unlock cycles required standard program command sequence writing Fast Mode command into command register. this mode, required cycle programming cycles instead four cycles standard program command. write erase command this mode.) read operation also executed after exiting this mode. exit this mode, necessary write Fast Mode Reset command into command register. (Refer Figure Extended algorithm.) active current required even during Fast Mode. Fast Programming During Fast Mode, programming executed with cycles operation. Embedded Program Algorithm executed writing program set-up command (A0H) data write cycles (PA/PD). (Refer Figure Extended algorithm.) Extended Sector Protect addition normal sector protection, MBM29BL160D Extended Sector Protection extended function. This function enable protect sector forcing RESET write command sequence. Unlike conventional procedure, necessary force control timing control pins. only RESET requires sector protection this mode. extended sector protect requires RESET pin. With this condition, operation initiated writing set-up command (60H) into command register. Then, sector addresses pins (A19, A18, A17, A16, A15, A14, A12) (A6, should sector protected (recommend other addresses pins), write extended sector protect command (60H). sector typically protected verify programming protection circuitry, sector addresses pins (A19, A18, A17, A16, A15, A14, A12) (A6, should write command (40H). Following command write, logical device output will produce protected sector read operation. output data logical "0", please repeat write extended sector protect command (60H) again. terminate operation, necessary RESET VIH. (Refer Figure Extend sector protect algorithm.)
MBM29BL160D
ADDRESS SENSITIVITY WRITE STATUS FLAGS
REDISTRIBUTE FUJITSU CONFIDENTIAL
Detailed Table status flags that used check status device current mode operation. During sector erase, part provides status flags automatically ports. information address sensitive. This means that address from erasing sector consecutively read, then will toggle. However, will toggle address from non-erasing sector consecutively read. This allows user determine which sectors erasing which not. Once erase suspend entered, address sensitivity still applies. address non-erasing sector (that available read) provided, then stored data read from device. address erasing sector (that unavailable read) applied, device will output status bits.
Table Hardware Sequence Flags Status Word Programming Program/Erase Auto-Erase Progress Erase Sector Address Erase Suspend Mode Non-Erase Sector Address Program Erase Suspend Word Programming Exceeded Time Limits Program/Erase Auto-Erase Program Erase Suspend Data (Note Toggle Toggle Toggle Data Toggle Toggle Toggle Toggle Data Data Toggle (Note Toggle (Note Data (Note (Note Toggle Toggle
Notes: toggled when sector address applied that erasing erase suspended sector. Conversely, cannot toggled when sector address applied that non-erasing non-erase suspended sector. therefore used determine which sectors erasing erase suspended which not. These status flags apply when outputs read from address non-erase-suspended sector. reserved pins future use. Fujitsu internal only.
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
Data Polling MBM29BL160D device features Data Polling method indicate host that Embedded Algorithms progress completed. During Embedded Program Algorithm, attempt read devices will produce complement data last written DQ7. Upon completion Embedded Program Algorithm, attempt read device will produce true data last written DQ7. During Embedded Erase Algorithm, attempt read device will produce output. Upon completion Embedded Erase Algorithm attempt read device will produce output. flowchart Data Polling (DQ7) shown Figure chip erase sector erase, Data Polling valid after rising edge sixth pulse six-write pulse sequence. Data Polling must performed sector address within sectors being erased protected sector. Otherwise, status valid. Once Embedded Algorithm operation close being completed, MBM29BL160D data pins (DQ7) change asynchronously while output enable (OE) asserted low. This means that device driving status information instant time then that byte's valid data next instant time. Depending when system samples output, read status valid data. Even device completed Embedded Program Algorithm operation valid data, data outputs still invalid. valid data will read successive read attempts. Data Polling feature only active during Embedded Programming Algorithm, Embedded Erase Algorithm sector erase time-out (See Table Figure Data Polling timing specifications diagrams. Toggle MBM29BL160D also features "Toggle method indicate host system that Embedded Algorithms progress completed. During Embedded Program Erase Algorithm cycle, successive attempts read toggling) data from device will result toggling between zero. Once Embedded Program Erase Algorithm cycle completed, will stop toggling valid data read next successive attempts. During programming, Toggle valid after rising edge fourth pulse four write pulse sequence. chip erase sector erase, Toggle valid after rising edge sixth pulse six-write pulse sequence. Toggle active during sector time out. programming, sector being written protected, toggle will toggle about then stop toggling without data having changed. erase, device will erase selected sectors except ones that protected. selected sectors protected, chip will toggle toggle about then drop back into read mode, having changed none data. Either toggling will cause toggle. addition, Erase Suspend/Resume command will cause toggle. Figure Toggle timing specifications diagrams Figure Toggle Algorithm. Exceeded Timing Limits will indicate program erase time exceeded specified limits (internal pulse count). Under these conditions will produce "1". This failure condition which indicates that program erase cycle successfully completed. Data Polling only operating function device under this condition. circuit will partially power down device under these conditions. pins will control output disable functions described Table failure condition also appear user tries program without erasing. this case device locks never complete Embedded Algorithm operation. Hence, system never reads valid data never stop toggling. Once device exceeded timing limits, will indicate "1." Please note that this device failure condition since device incorrectly used.
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
Sector Erase Timer After completion initial sector erase command sequence sector erase time-out will begin. will remain until time-out complete. Data Polling Toggle valid after initial sector erase command sequence. Data Polling Toggle indicates device been written with valid erase command, used determine sector erase timer window still open. high ("1") internally controlled erase cycle begun; attempts write subsequent commands device will ignored until erase operation completed indicated Data Polling Toggle Bit. ("0"), device will accept additional sector erase commands. insure command been accepted, system software should check status prior following each subsequent sector erase command. high second status check, command have been accepted. Table Hardware Sequence Flags. Toggle This toggle along with DQ6, used determine whether device Embedded Erase Algorithm Erase Suspend. Successive reads from erasing sector will cause toggle during Embedded Erase Algorithm. device erasesuspended-read mode, successive reads from erase-suspended sector will cause toggle. When device erasesuspended-program mode, successive reads from byte address non-erase suspended sector will indicate logic DQ2. different from that toggles only when standard program Erase, Erase Suspend Program operation progress. example, used together determine erase-suspend-read mode progress (DQ2 toggles while does not). also Table Figure Furthermore, also used determine which sector being erased. When device erase mode, toggles this read from erasing sector.
Table Toggle Status Mode Program Erase Erase-Suspend Read (Erase-Suspended Sector) (Note Erase-Suspend Program (Note Toggles Toggles Toggles Toggles Toggles (Note
Notes: These status flags apply when outputs read from sector that been erase suspended. These status flags apply when outputs read from addresses non-erase suspended sector.
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
RY/BY Ready/Busy MBM29BL160D provides RY/BY open-drain output indicate host system that Embedded Algorithms either progress completed. output low, device busy with either program erase operation. output high, device ready accept read/write erase operation. When RY/BY low, devices will accept additional program erase commands. MBM29BL160D placed Erase Suspend mode, RY/BY output will high. Since RY/BY open-drain output, several RY/BY pins tied together parallel with pull resistor VCC. During programming, RY/BY driven after rising edge fourth pulse. During erase operation, RY/BY driven after rising edge sixth pulse. RY/BY will indicate busy condition during RESET pulse. Figure detailed timing diagram.
DATA PROTECTION
MBM29BL160D designed offer protection against accidental erasure programming caused spurious system level signals that exist during power transitions. During power device automatically resets internal state machine read mode. Also, with control register architecture, alteration memory contents only occurs after successful completion specific multi-bus cycle command sequence. device also incorporates several features prevent inadvertent write cycles resulting from power-up power-down transitions system noise.
WRITE INHIBIT
avoid initiation write cycle during power-up power-down, write cycle locked less than (typically VLKO, command register disabled internal program/erase circuits disabled. Under this condition, device will reset read mode. Subsequent writes will ignored until level greater than VLKO. users responsibility ensure that control pins logically correct prevent unintentional writes when above Embedded Erase Algorithm interrupted, there possibility that erasing sector(s) will need erased again prior programming.
WRITE PULSE "GLITCH" PROTECTION
Noise pulses less than (typical) will change command registers.
LOGICAL INHIBIT
Writing inhibited holding VIL, VIH, VIH. initiate write, must logical zero while logical one.
POWER-UP WRITE INHIBIT
Power-up device with will accept commands rising edge internal state machine automatically reset read mode power-up.
MBM29BL160D
ABSOLUTE MAXIMUM RATINGS
REDISTRIBUTE FUJITSU CONFIDENTIAL
Storage Temperature. Ambient Temperature with Power Applied. Voltage with respect Ground pins except RESET (Note (Note RESET (Note
-55°C +125°C -25°C +85°C -0.5 +Vcc +0.5 -0.5 +4.0 -0.5 +13.0
Notes: Minimum voltage input pins -0.5 During voltage transitions, inputs negative overshoot -2.0 periods Maximum voltage output pins +0.5 During voltage transitions, outputs positive overshoot +2.0 periods Minimum input voltage RESET pins -0.5 During voltage transitions, RESET pins negative overshoot -2.0 periods Maximum input voltage RESET pins +13.0 which positive overshoot 14.0 periods WARNING: Semiconductor devices permanently damaged application stress (voltage, current, temperature, etc.) excess absolute maximum ratings. exceed these ratings.
OPERATING RANGES
Commercial Devices Ambient Temperature (TA) -20°C +70°C Supply Voltages MBM29BL160D-70.+3.0 +3.6 Supply Voltages MBM29BL160D-75.+2.7 +3.6 Operating ranges define those limits between which functionality device guaranteed.
WARNING: Recommended operating conditions normal operating ranges semiconductor device. device's electrical characteristics warranted when operated within these ranges. Always semiconductor devices within recommended operating conditions. Operation outside these ranges adversely affect reliability could result device failure. warranty made with respect uses, operating conditions, combinations represented data sheet. Users considering application outside listed conditions advised contact their Fujitsu representative beforehand.
REDISTRIBUTE FUJITSU CONFIDENTIAL
MAXIMUM OVERSHOOT
MBM29BL160D
+0.8 -0.5 -2.0
Figure Maximum Negative Overshoot Waveform
+2.0 +0.5 +2.0
Figure Maximum Positive Overshoot Waveform
+14.0 +13.0 +0.5
Note: This waveform applied RESET.
Figure Maximum Positive Overshoot Waveform
MBM29BL160D
CHARACTERISTICS
Parameter Symbol ILIT Parameter Description Input Load Current Output Leakage Current RESET Inputs Load Current Active Current (Note Active Current (Note Standby CurrentConventional Read Mode Standby CurrentBurst Read Mode (Note Standby Current During Reset Input Level Input High Level Voltage Autoselect Sector Protect (A9, RESET) (Note Output Voltage
REDISTRIBUTE FUJITSU CONFIDENTIAL
Test Conditions Vcc, Max. VOUT Vcc, Max. Max., RESET 12.5 =Vcc Max., VIL, =Vcc Max., VIL, Max., Vcc±0.3 RESET Vcc±0.3 Max., Vcc±0.3 RESET Vcc±0.3 Max., RESET Vss±0.3
Min. -1.0 -1.0
Max. +1.0 +1.0
Unit
ICC1 ICC2 ICC3
ICC4 ICC5 VOH1
-0.5 11.5 Vcc+0.3 12.5
Min. -1.8 Min. Vcc-0.4
0.45
Output High Voltage VOH2 VLKO Lock-Out Voltage (Note -100 Min.
Notes: current listed includes both operating current frequency dependent component MHz). active while Embedded Erase Embedded Program progress. other inputs VIL. must input after valid. 100% tested.
REDISTRIBUTE FUJITSU CONFIDENTIAL
CHARACTERISTICS
MBM29BL160D
Timing Clock (Burst read mode only) Parameter Symbols Description
JEDEC
Standard tCYCLE Clock period (+/-10%) Clock Pulse time Clock High Pulse time Min. Min. Min.
(MHz)
(MHz)
(MHz)
(MHz)
(MHz)
Unit
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
Read Only Operations Characteristics Burst read mode Parameter Symbols
StanJEDEC dard
Description
Test Setup
(Note)
(Note)
Unit
tIACC tBACC tEHQZ tLBAS tLBAH tBAAS tBAAH tACS tACH tCES tCEH
Valid Clock Output Delay (Note Valid Clock Output Delay Output Enable Output Delay Chip Enable Output High-Z Output Enable Output High-Z Output Hold time from Addresses, which ever Occurs First time Hold time from Setup time Hold time from Address Setup time Address Hold time from Setup time Hold time from
Max. Max. Max. Max. Max. Min. Min. Min. Min. Min. Min. Min. Min. Min.
Note: Initial valid data will output after second clock rising edge assertion. Test Conditions: Output Load: gate pF(MBM29BL160D-70) gate pF(MBM29BL160D-75) Input rise fall times: Input pulse levels: Timing measurement reference level Input: Output:
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
Read Only Operations Characteristics Conventional read mode Parameter Symbols
JEDEC tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ tAXQX
Standard tACC
Description
Test Setup
(Note)
(Note)
Unit
Read Cycle Time Address Output Delay Chip Enable Output Delay Output Enable Output Delay Chip Enable Output High-Z Output Enable Output High-Z Output Hold Time From Address, Whichever Occurs First RESET read mode
Min. Max. Max. Max. Max. Max.
Min. Max.
tREADY
Note: LBA, BAA, will ignored during this mode. Test Conditions: Output Load: gate pF(MBM29BL160D-70) gate pF(MBM29BL160D-75) Input rise fall times: Input pulse levels: Timing measurement reference level Input: Output:
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
3.3V IN3064 Equivalent
Device Under Test
Diodes IN3064 Equivalent
Note: including capacitance (MBM29BL160D-70) including capacitance (MBM29BL160D-75)
Figure Test Conditions
Write (Erase/Program) Operations Controlled Writes Parameter Symbols Description Unit
JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX
Standard tOES Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Output Enable Hold Time Read Toggle Data Polling Min. Min. Min. Min. Min. Min. Min. Min. (Continued)
tOEH
REDISTRIBUTE FUJITSU CONFIDENTIAL
(Continued) Parameter Symbols Description JEDEC tGHWL tELWL tWHEH tWLWH tWHDL tWHWH1 tWHWH2 Standard tGHWL tWPH tWHWH1 tWHWH2 tEOE tVCS tVLHT tWPP tOESP tCSP tRPD tBUSY tVIDR Read Recover Time Before Write High Low) Setup Time Hold Time Write Pulse Width Write Pulse Width High Programming Operation Sector Erase Operation (Note Delay Time from Embedded Output Enable Setup Time Voltage Transition Time (Note Write Pulse Width (Note Setup Time Active (Note Setup Time Active (Note Write Recover Time From RY/BY RESET High Time Before Read RESET Power Down Time Program/Erase Valid RY/BY Delay Rise Time RESET Pulse Width Min. Min. Min. Min. Min. Typ. Typ. Max. Min. Min. Min. Min. Min. Min. Min. Min. Max. Min. Min. 12.6
MBM29BL160D
Unit
12.6
Notes: This does include preprogramming time. This timing Sector Protection operation.
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
Write (Erase/Program) Operations Alternate Controlled Writes Parameter Symbols Description JEDEC Standard tOES Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read tOEH Output Enable Hold Time Toggle Data Polling Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Typ. Typ. Max. Min. Min. Min. Min. Min. 12.6 12.6 Unit
tAVAV tAVEL tELAX tDVEH tEHDX
tGHEL tWLEL tEHWH tELEH tEHEL tWHWH1 tWHWH2
tGHEL tCPH tWHWH1 tWHWH2 tEOE tVCS tBUSY
Read Recover Time Before Write High Low) Setup Time Hold Time Pulse Width Pulse Width High Programming Operation Sector Erase Operation (Note) Delay Time from Embedded Output Enable Setup Time Recover Time From RY/BY RESET Pulse Width RESET Hold Time Before Read Program/Erase Valid RY/BY Delay
Note: This does include preprogramming time.
REDISTRIBUTE FUJITSU CONFIDENTIAL
SWITCHING WAVEFORMS
MBM29BL160D
SWITCHING WAVEFORMS
WAVEFORM
INPUTS Must Steady Change from Change from Don't Care, Change Permitted Does Apply
OUTPUTS Will Steady Will Changing from Will Changing from Changing, State Unknown Center Line HighImpedance "Off" State
tCYCLE (Hold) (Setup) Input Signals Valid
Figure Input Waveform
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
tLBAH tLBAS Load Address tBAAS tACH tACS Addresses tCES tEHQZ tIACC Outputs HIGH-Z tBACC DQa+1 DQa+2 tBACC HIGH-Z HIGH-Z DQa+3 HIGH-Z tCEH Address increment tBAAH tCYCLE
Note: Initial access (tIACC needs clock wait. tIACC tCYCLE tBACC, kept high avoid advance burst counter until appropriate latency number. Figure Waveforms 4words Burst Read Operations
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
Addresses Addresses Stable
tACC
tOEH
High-Z Outputs
High-Z Output Valid
Figure 7.1. Waveforms Read Operations
Addresses Addresses Stable
tACC
RESET
Outputs
High-Z
Output Valid
Figure 7.2. Waveforms Hardware Reset/Read Operations
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
RESET
Address
Valid
Data
Valid Output
tACC
Figure 7.3. Power-up Reset Timings
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
Cycle Addresses 555H
Data Polling
tGHWL
tWPH
tWHWH1
Data
DOUT
DOUT
Notes: address memory location programmed. data programmed word address. output complement data written device. DOUT output data written device. Figure indicates last cycles four-bus cycle sequence.
Figure Waveforms Program Operations
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
Cycle Addresses 555H
Data Polling
tGHEL
tCPH
tWHWH1
Data
DOUT
Notes: address memory location programmed. data programmed word address. output complement data written device. DOUT output data written device. Figure indicates last cycles four-bus cycle sequence.
Figure Alternate Controlled Program Operations
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
Addresses
555H
2AAH
555H
555H
2AAH
tGHWL
tWPH
Sector Erase
Data
tVCS
Note: sector address Sector Erase.
Figure Waveforms Chip/Sector Erase Operations
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
tOEH
Valid Data High-Z
tWHWH1 Invalid
Valid Data
High-Z
(tEOE)** Valid Data (The device completed Embedded operation.) Maximum delay time expected until data valid after Embedded Operation been completed. Figure Waveforms Data Polling during Embedded Algorithm Operations
tOEH
tOES
Toggle Stop Toggling Data Valid
Data (DQ0 DQ7)
Toggle
*DQ6 Stop toggling (The device completed Embedded operation.) Figure Waveforms Toggle during Embedded Algorithm Operations
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
rising edge last signal
Entire programming erase operation
RY/BY
tBUSY Figure RY/BY Timing Diagram during Program/Erase Operations
RESET
RY/BY
tREADY
Figure RESET, RY/BY Timing Diagram
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
A19, A18, A17, A16, A15, A14, A13,
tVLHT
tVLHT tWPP
tVLHT
tOESP
tVLHT
tCSP
Data
tVCS
Sector Address initial sector Sector Address next sector
Figure Waveforms Sector Protect Timing Diagram
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
tVCS
RESET Addresses
tVLHT SPAX SPAX SPAY
TIME-OUT
Data
SPAX Sector Address protected SPAY Next Sector Address protected Time-out Time-out Window (min)
Figure Extended Sector Protection Timing Diagram
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
tVCS
tVIDR
RESET
tVLHT tVLHT Program Erase Command Sequence
RY/BY
Figure Temporary Sector Unprotect Timing Diagram
Enter Embedded Erase
Erase Suspend Erase
Enter Erase Suspend Program Erase Suspend Program Erase Suspend Read
Erase Resume Erase Erase Complete
Erase Suspend Read
Toggle with
Note: read from erase-suspended sector. Figure
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
EMBEDDED PROGRAMALGORITHM
Start
Write Program Command Sequence (See below)
Data Polling Device
Verify Byte?
Increment Address
Last Address
Programming Completed Program Command Sequence (Address/Command):
555H/AAH
2AAH/55H
555H/A0H
Program Address/Program Data
Figure Embedded Programming Algorithm
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
EMBEDDED ERASEALGORITHM
Start
Write Erase Command Sequence (See below) Data Polling Toggle from Device
Data FFH? Erasure Completed
Chip Erase Command Sequence (Address/Command): 555H/AAH
Individual Sector/Multiple Sector Erase Command Sequence (Address/Command): 555H/AAH
2AAH/55H
2AAH/55H
555H/80H
555H/80H
555H/AAH
555H/AAH
2AAH/55H
2AAH/55H
555H/10H
Sector Address/30H
Sector Address/30H
Additional sector erase commands optional.
Sector Address/30H
Figure Embedded Erase Algorithm
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
Start
Read Byte (DQ0 DQ7) Addr
Data?
Read Byte (DQ0 DQ7) Addr
Word address programming sector addresses within sector erased during sector erase operation sector addresses within sector protected during chip erase operation
Data? Fail
Pass
Note: rechecked even because change simultaneously with DQ5. Figure Data Polling Algorithm
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
Start
Read Byte (DQ0 DQ7) Addr
Bank address which program erase operated.
Toggle?
Read Byte (DQ0 DQ7) Addr
Toggle? Fail
Pass
Note: rechecked even because stop toggling same time changing "1".
Figure Toggle Algorithm
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
Start Setup Sector Addr A19, A18, A17, A16, A15,A14, A13, PLSCNT
VID, VIL, RESET VIL,
Activate Pulse
Increment PLSCNT
Time
VIH, should remain Read from Sector VIH, Addr
PLSCNT Remove from Write Reset Command
Data 01H? Protect Another Sector?
Device Failed
Remove from Write Reset Command
Sector Protection Completed
Figure Sector Protect Algorithm
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
Start
RESET (Note
Perform Erase Program Operations
RESET
Temporary Sector Unprotect Completed (Note
Notes: protected sectors unprotected. previously protected sectors protected once again.
Figure Temporary Sector Unprotect Algorithm
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
Start
555H/AAH
2AAH/55H
Fast Mode
555H/20H
XXXH/A0H
Program Address/Program Data
Data Polling Device Fast Program
Verify Byte? Increment Address Last Address Programming Completed
XXXH/90H Reset Fast Mode XXXH/F0H
Figure Embedded Programming Algorithm Fast Mode
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
Start
RESET Wait Device Operating
Temporary Sector Unprotect
Mode
Extended Sector Protect Entry? Setup Sector Protect Write XXXH/60H PLSCNT Sector Protect
Write Sector Address
Time
Verify Sector Protect Increment PLSCNT
Write Sector Address
Read from Sector Address Setup Next Sector Address PLSCNT Remove from RESET Write Reset Command Data 01H? Protect Other Sector Remove from RESET Write Reset Command Device Failed
Sector Protection Completed
Figure Extended Sector Protect Algorithm
REDISTRIBUTE FUJITSU CONFIDENTIAL
ERASE PROGRAMMING PERFORMANCE
Limits Parameter Min. Sector Erase Time Typ. Max. Unit
MBM29BL160D
Comments
Excludes programming time prior erasure Excludes system-level overhead Excludes system-level overhead
Word Programming Time
12.6
Chip Programming Time Erase/Program Cycle 100,000
1,000,000
Cycles
TSOP CAPACITANCE
Parameter Symbol COUT CIN2 Parameter Description Input Capacitance Output Capacitance Control Capacitance VOUT Test Setup Typ. T.B.D. T.B.D. T.B.D. Max. T.B.D. T.B.D. T.B.D. Unit
Notes: Test conditions 25°C, Sampled, 100% tested.
SSOP CAPACITANCE
Parameter Symbol COUT CIN2 Parameter Description Input Capacitance Output Capacitance Control Capacitance VOUT Test Setup Typ. T.B.D. T.B.D. T.B.D. Max. T.B.D. T.B.D. T.B.D. Unit
Notes: Test conditions 25°C, Sampled, 100% tested.
MBM29BL160D
ORDERING INFORMATION Standard Products
REDISTRIBUTE FUJITSU CONFIDENTIAL
Fujitsu standard products available several packages. order number formed combination
MBM29BL160
PFTN
PACKAGE TYPE PFTN= 56-Pin Thin Small Outline Package (TSOP)Standard Pinout 56-Pin Shrink Small Outline Package
SPEED OPTION Product Selector Guide DEVICE REVISION (Contact Fujitsu representative more information)
DEVICE NUMBER/DESCRIPTION MBM29BL160 16Mega-bit 16-Bit) CMOS Flash Memory 3.0V-only Read, Write, Erase 4words sequential Burst Read mode
Valid Combinations MBM29BL160D-70 PFTN MBM29BL160D-75
Valid Combinations Valid Combinations list configurations planned supported volume this device. Consult local Fujitsu sales office confirm availability specific valid combinations check newly released combinations.
REDISTRIBUTE FUJITSU CONFIDENTIAL
PACKAGE DIMENSIONS
56-pin plastic TSOP (FPT-56P-M01)
MBM29BL160D
Dimensions (inches)
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
56-pin plastic SSOP (FPT-56P-M03)
Dimensions (inches)
REDISTRIBUTE FUJITSU CONFIDENTIAL
MBM29BL160D
Rights Reserved. contents this document subject change without notice. Customers advised consult with FUJITSU sales representatives before ordering. information circuit diagrams this document presented examples semiconductor device applications, intended incorporated devices actual use. Also, FUJITSU unable assume responsibility infringement patent rights other rights third parties arising from this information circuit diagrams. FUJITSU semiconductor devices intended standard applications (computers, office automation other office equipment, industrial, communications, measurement equipment, personal household devices, etc.). CAUTION: Customers considering products special applications where failure abnormal operation directly affect human lives cause physical injury property damage, where extremely high levels reliability demanded (such aerospace systems, atomic energy controls, floor repeaters, vehicle operating controls, medical devices life support, etc.) requested consult with FUJITSU sales representatives before such use. company will responsible damages arising from such without prior approval. semiconductor devices have inherently certain rate failure. must protect against injury, damage loss from such failures incorporating safety design measures into your facility equipment such redundancy, fire protection, prevention over-current levels other abnormal operating conditions. products described this document represent goods technologies subject certain restrictions export under Foreign Exchange Foreign Trade Control Japan, prior authorization Japanese government should required export those products from Japan.
MBM29BL160D
REDISTRIBUTE FUJITSU CONFIDENTIAL
FUJITSU LIMITED
further information please contact:
Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-88, Japan Tel: (044) 754-3763 Fax: (044) 754-3329
http://www.fujitsu.co.jp/
North South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street Jose, 95134-1804, U.S.A. Tel: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. Fri.: (PST) Tel: (800) 866-8608 Fax: (408) 922-9179
http://www.fujitsumicro.com/
Europe FUJITSU MIKROELEKTRONIK GmbH Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122
http://www.fujitsu-ede.com/
Asia Pacific FUJITSU MICROELECTRONICS ASIA #05-08, Lorong Chuan Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220
http://www.fmap.com.sg/
P9806 FUJITSU LIMITED 1998
Printed Japan
Other recent searches
SMBB36 - SMBB36 SMBB36 Datasheet
SKY65016-92LF - SKY65016-92LF SKY65016-92LF Datasheet
PS026102-1207 - PS026102-1207 PS026102-1207 Datasheet
LM3485LED - LM3485LED LM3485LED Datasheet
ADA4898-1 - ADA4898-1 ADA4898-1 Datasheet
1796690000 - 1796690000 1796690000 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
