SmartDie® Product Specification Support MMXTechnology Compatible
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Mobile Pentium® Processor with MMXTechnology
SmartDie® Product Specification
Support MMXTechnology Compatible with Large Software Base Voltage CMOS Silicon Technology Mbyte Pages Increased
MS-DOS*, Windows*, OS/2*, UNIX* 32-Bit Processor with 64-Bit Data
Superscalar Architecture
Rate
IEEE 1149.1 Boundary Scan Internal Error Detection Features Power Management Features
Enhanced Pipelines Pipelined Integer Units Capable Instructions/Clock Pipelined Unit Pipelined Floating Point Unit Separate Code Data Caches Kbyte Code, Kbyte Writeback Data MESI Cache Protocol Advanced Design Features Deeper Write Buffers Enhanced Branch Prediction Feature Virtual Mode Extensions
System Management Mode Clock Control Voltage Reduction Technology 2.45 Core Supply Buffer Supply Fractional Operation 150-MHz Core/60-MHz 166-MHz Core/66-MHz Intel SmartDie® Product Full AC/DC Testing Level 105°C (Junction) Temperature Range
NOTICE: This document contains preliminary information products production. valid devices indicated "DEVICE NOMENCLATURE" page This specification subject change without notice. Verify with your local Intel sales office that have latest product specification before finalizing design. REFERENCE INFORMATION: information this document provided supplement standard package datasheet specific product. Please refer standard package datasheet (order number 243292) product information specifications found this document.
INTEL CORPORATION, 1997
February 1997
Order Number: 272998-001
Information this document provided connection with Intel products. license, express implied, estoppel otherwise, intellectual property rights granted this document. Except provided Intel's Terms Conditions Sale such products, Intel assumes liability whatsoever, Intel disclaims express implied warranty, relating sale and/or Intel products including liability warranties relating fitness particular purpose, merchantability, infringement patent, copyright other intellectual property right. Intel products intended medical, life saving, life sustaining applications. Mobile Pentium® Processor with MMXTechnology contain design defects errors known errata. Current characterized errata available request. Intel retains right make changes specifications product descriptions time, without notice. *Third-party brands names property their respective owners. Copies documents which have ordering number referenced this document, other Intel literature, obtained from: Intel Corporation P.O. 7641 Prospect 60056-764 call 1-800-548-4725
©INTEL CORPORATION, 1997
Contents
Mobile Pentium® Processor with MMXTechnology
SmartDie® Product Specification
SPECIFICATIONS INTEL PRODUCTS PROCESSING Wafer Probe Wafer Test Procedure Inspection Packing Procedure Inspection Steps Storage Requirements Electro-Static Discharge (ESD) SPECIFICATIONS Physical Specifications Specifications DEVICE NOMENCLATURE REFERENCE INFORMATION REVISION HISTORY FIGURES Figure Figure TABLES Table Table Mobile Pentium® Processor with MMXTechnology Bond Center Data Mobile Pentium® Processor with MMXTechnology Physical Specifications Mobile Pentium® Processor with MMXTechnology Photo Mobile Pentium® Processor with MMXTechnology Die/Bond Layout
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
SPECIFICATIONS
photo Figure plot Figure indicate orientation GEL-PAK* (shipping container). aligned shown
relative notch which corner GEL-PAK. Intel internal manufacturing name "80P55C appears die. Table describes bond number center data each signal.
Figure Mobile Pentium® Processor with MMXTechnology Photo
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Gel-Pak* Notch
Figure Mobile Pentium® Processor with MMXTechnology Die/Bond Layout
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Table Mobile Pentium® Processor with MMXTechnology Bond Center Data (Sheet Center(1) PAD# SIGNAL(2,3,5) N.C. VCC2 VCC3 LOCK# VCC2 VCC3 VCC2 HLDA BREQ VCC3 APCHK# PCHK# PRDY SMIACT# VCC2 VCC2 N.C. VCC3 N.C. N.C. Mils (=0.001 inch) -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 217.8 214.1 210.4 206.7 203.0 199.3 195.6 191.9 188.2 184.5 180.8 177.1 173.4 169.7 166.0 162.3 158.6 154.9 151.2 147.5 143.8 140.1 136.4 132.7 129.0 125.3 121.6 117.9 114.2 110.5 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 Microns 5533 5439 5345 5251 5157 5063 4969 4875 4781 4687 4593 4499 4405 4311 4217 4123 4029 3935 3841 3747 3653 3559 3465 3371 3277 3183 3089 2995 2901 2807
NOTES: coordinates represent centers relative center die. N.C. signifies connect. These pads must connected. symbol used denote active signals. Boundary Scan (JTAG) implemented through following pads: (TDO), (TCK), (TDI), (TMS), (TRST#) FRCMC# external pull-up compatibility with other Pentium processors.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Table Mobile Pentium® Processor with MMXTechnology Bond Center Data (Sheet Center(1) PAD# SIGNAL
(2,3,5)
Mils (=0.001 inch) 106.8 103.1 99.4 95.7 92.0 88.3 84.6 80.9 77.2 73.5 69.8 66.1 62.4 58.7 55.0 51.3 47.6 43.9 40.2 36.5 32.8 29.1 25.4 21.7 18.0 14.3 10.6 -0.5 -4.2 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9
Microns 2713 2619 2525 2431 2337 2243 2149 2055 1961 1867 1773 1679 1585 1491 1397 1303 1209 1115 1021 -107
N.C. HOLD WB/WT# VCC2 VCC2 BOFF# N.C. BRDY# VCC2 VCC2 KEN# AHOLD EWBE# VCC2 VCC2 VCC3 CACHE# M/IO# VCC3
NOTES: coordinates represent centers relative center die. N.C. signifies connect. These pads must connected. symbol used denote active signals. Boundary Scan (JTAG) implemented through following pads: (TDO), (TCK), (TDI), (TMS), (TRST#) FRCMC# external pull-up compatibility with other Pentium processors.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Table Mobile Pentium® Processor with MMXTechnology Bond Center Data (Sheet Center(1) PAD# SIGNAL
(2,3,5)
Mils (=0.001 inch) -7.9 -11.6 -15.3 -19.0 -22.7 -26.4 -30.1 -33.8 -37.5 -41.2 -44.9 -48.6 -52.3 -56.0 -59.7 -63.4 -67.1 -70.8 -74.5 -78.2 -81.9 -85.6 -89.3 -93.0 -96.7 -100.4 -104.1 -107.8 -111.5 -115.2 -118.9 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 5358 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9
Microns -201 -295 -389 -483 -577 -671 -765 -859 -953 -1047 -1141 -1235 -1329 -1423 -1517 -1611 -1705 -1799 -1893 -1987 -2081 -2175 -2269 -2363 -2457 -2551 -2645 -2739 -2833 -2927 -3021
PM1/BP1 PM0/BP0 FERR# VCC2 VCC2 IERR# VCC3 VCC2 VCC2 VCC3 VCC2 VCC2 VCC3
NOTES: coordinates represent centers relative center die. N.C. signifies connect. These pads must connected. symbol used denote active signals. Boundary Scan (JTAG) implemented through following pads: (TDO), (TCK), (TDI), (TMS), (TRST#) FRCMC# external pull-up compatibility with other Pentium processors.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Table Mobile Pentium® Processor with MMXTechnology Bond Center Data (Sheet Center(1) PAD# SIGNAL
(2,3,5)
Mils (=0.001 inch) -122.6 -126.3 -130.0 -133.7 -137.4 -141.1 -144.8 -148.5 -152.2 -155.9 -159.6 -163.3 -167.0 -170.7 -174.4 -178.1 -181.8 -185.5 -189.3 -193.0 -196.7 -200.4 -204.1 -207.8 -211.5 -215.2 -218.9 -222.6 -226.3 -245.4 -245.4 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -5358 -4588 -4494 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -210.9 -180.6 -176.9
Microns -3115 -3209 -3303 -3397 -3491 -3585 -3679 -3773 -3867 -3961 -4055 -4149 -4243 -4337 -4431 -4525 -4619 -4713 -4807 -4901 -4995 -5089 -5183 -5277 -5371 -5465 -5559 -5653 -5747 -6232 -6232
VCC2 VCC2 VCC3 VCC2 VCC3 VCC3 VCC2 VCC3
NOTES: coordinates represent centers relative center die. N.C. signifies connect. These pads must connected. symbol used denote active signals. Boundary Scan (JTAG) implemented through following pads: (TDO), (TCK), (TDI), (TMS), (TRST#) FRCMC# external pull-up compatibility with other Pentium processors.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Table Mobile Pentium® Processor with MMXTechnology Bond Center Data (Sheet Center(1) PAD# SIGNAL
(2,3,5)
Mils (=0.001 inch) -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -4400 -4306 -4212 -4118 -4024 -3930 -3836 -3742 -3648 -3554 -3460 -3366 -3272 -3178 -3084 -2990 -2896 -2802 -2708 -2614 -2520 -2426 -2332 -2238 -2144 -2050 -1956 -1862 -1768 -1674 -1580 -173.2 -169.5 -165.8 -162.1 -158.4 -154.7 -151.0 -147.3 -143.6 -139.9 -136.2 -132.5 -128.8 -125.1 -121.4 -117.7 -114.0 -110.3 -106.6 -102.9 -99.2 -95.5 -91.8 -88.1 -84.4 -80.7 -77.0 -73.3 -69.6 -65.9 -62.2
Microns -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232
VCC3 VCC3 VCC3 VCC3 VCC3 VCC2
NOTES: coordinates represent centers relative center die. N.C. signifies connect. These pads must connected. symbol used denote active signals. Boundary Scan (JTAG) implemented through following pads: (TDO), (TCK), (TDI), (TMS), (TRST#) FRCMC# external pull-up compatibility with other Pentium processors.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Table Mobile Pentium® Processor with MMXTechnology Bond Center Data (Sheet Center(1) PAD# SIGNAL
(2,3,5)
Mils (=0.001 inch) -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -1486 -1392 -1298 -1204 -1110 -1016 -922 -828 -734 -640 -546 -452 -358 -264 -170 1052 1146 1240 1334 -58.5 -54.8 -51.1 -47.4 -43.7 -40.0 -36.3 -32.6 -28.9 -25.2 -21.5 -17.8 -14.1 -10.4 -6.7 -3.0 11.8 15.5 19.2 22.9 26.6 30.3 34.0 37.7 41.4 45.1 48.8 52.5
Microns -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232
VCC3 VCC3 VCC3 VCC3 VCC3
NOTES: coordinates represent centers relative center die. N.C. signifies connect. These pads must connected. symbol used denote active signals. Boundary Scan (JTAG) implemented through following pads: (TDO), (TCK), (TDI), (TMS), (TRST#) FRCMC# external pull-up compatibility with other Pentium processors.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Table Mobile Pentium® Processor with MMXTechnology Bond Center Data (Sheet Center(1) PAD# 207(4) 208(4) 209(4) 210(4) 215(4) SIGNAL VCC3 VCC2 VCC2 PICCLK PICD0 PICD1 VCC2 VCC3 VCC2 VCC2 TRST#
(2,3,5)
Mils (=0.001 inch) 56.2 59.9 63.6 67.3 71.0 74.7 78.4 82.1 85.8 89.5 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -245.4 -218.9 -215.2 -211.5 -207.8 -204.1 -193.0 -185.5 -181.8 -178.1 -174.4 -170.7 -167.0 -159.6 -155.9 -152.2 -148.5 -144.8 -141.1 -137.4 -133.7 -130.0 1428 1522 1616 1710 1804 1898 1992 2086 2180 2274 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358
Microns -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -6232 -5559 -5465 -5371 -5277 -5183 -4901 -4713 -4619 -4525 -4431 -4337 -4243 -4055 -3961 -3867 -3773 -3679 -3585 -3491 -3397 -3303
NOTES: coordinates represent centers relative center die. N.C. signifies connect. These pads must connected. symbol used denote active signals. Boundary Scan (JTAG) implemented through following pads: (TDO), (TCK), (TDI), (TMS), (TRST#) FRCMC# external pull-up compatibility with other Pentium processors.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Table Mobile Pentium® Processor with MMXTechnology Bond Center Data (Sheet Center(1) PAD# SIGNAL
(2,3,5)
Mils (=0.001 inch) -126.3 -122.6 -118.9 -115.2 -111.5 -107.8 -104.1 -100.4 -96.7 -93.0 -89.3 -85.6 -81.9 -78.2 -74.5 -70.8 -67.1 -63.4 -59.7 -56.0 -52.3 -48.6 -44.9 -41.2 -37.5 -33.8 -30.1 -26.4 -22.7 -19.0 -15.3 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9
Microns -3209 -3115 -3021 -2927 -2833 -2739 -2645 -2551 -2457 -2363 -2269 -2175 -2081 -1987 -1893 -1799 -1705 -1611 -1517 -1423 -1329 -1235 -1141 -1047 -953 -859 -765 -671 -577 -483 -389
VCC2 VCC2 N.C. N.C. VCC2 VCC2 N.C. N.C. VCC2 VCC2 VCC2 VCC2 N.C. N.C. VCC2 VCC2 N.C. N.C. VCC3 VCC2
NOTES: coordinates represent centers relative center die. N.C. signifies connect. These pads must connected. symbol used denote active signals. Boundary Scan (JTAG) implemented through following pads: (TDO), (TCK), (TDI), (TMS), (TRST#) FRCMC# external pull-up compatibility with other Pentium processors.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Table Mobile Pentium® Processor with MMXTechnology Bond Center Data (Sheet Center(1) PAD# SIGNAL
(2,3,5)
Mils (=0.001 inch) -11.6 -7.9 -4.2 -0.5 10.6 14.3 18.0 21.7 25.4 29.1 32.8 36.5 40.2 43.9 47.6 51.3 55.0 58.7 62.4 66.1 69.8 73.5 77.2 80.9 84.6 88.3 92.0 95.7 99.4 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9
Microns -295 -201 -107 1021 1115 1209 1303 1397 1491 1585 1679 1773 1867 1961 2055 2149 2243 2337 2431 2525
VCC2 STPCLK# N.C. VCC2 VCC2 N.C. VCC2 VCC2 N.C. N.C. VCC2 VCC2 N.C.
PEN# INIT IGNNE# VCC2 VCC2 SMI# INTR/LINT0
NOTES: coordinates represent centers relative center die. N.C. signifies connect. These pads must connected. symbol used denote active signals. Boundary Scan (JTAG) implemented through following pads: (TDO), (TCK), (TDI), (TMS), (TRST#) FRCMC# external pull-up compatibility with other Pentium processors.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Table Mobile Pentium® Processor with MMXTechnology Bond Center Data (Sheet Center(1) PAD# SIGNAL
(2,3,5)
Mils (=0.001 inch) 103.1 106.8 121.6 125.3 129.0 132.7 136.4 140.1 143.8 147.5 151.2 154.9 158.6 162.3 166.0 169.7 173.4 177.1 180.8 184.5 188.2 191.9 195.6 199.3 203.0 206.7 210.4 214.1 217.8 221.5 225.2 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9 210.9
Microns 2619 2713 3089 3183 3277 3371 3465 3559 3653 3747 3841 3935 4029 4123 4217 4311 4405 4499 4593 4687 4781 4875 4969 5063 5157 5251 5345 5439 5533 5627 5721
R/S# NMI/LINT1 N.C. VCC3 VCC2 VCC2 VCC3 VCC3 VCC2 VCC2 N.C. N.C.
NOTES: coordinates represent centers relative center die. N.C. signifies connect. These pads must connected. symbol used denote active signals. Boundary Scan (JTAG) implemented through following pads: (TDO), (TCK), (TDI), (TMS), (TRST#) FRCMC# external pull-up compatibility with other Pentium processors.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Table Mobile Pentium® Processor with MMXTechnology Bond Center Data (Sheet Center(1) PAD# SIGNAL
(2,3,5)
Mils (=0.001 inch) 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 4775 4681 4587 4493 4399 4305 4211 4117 4023 3929 3835 3741 3647 3553 3459 3365 3271 3177 3083 2989 2895 2801 2707 2613 2519 2425 2331 2237 2143 2049 1955 188.0 184.3 180.6 176.9 173.2 169.5 165.8 162.1 158.4 154.7 151.0 147.3 143.6 139.9 136.2 132.5 128.8 125.1 121.4 117.7 114.0 110.3 106.6 102.9 99.2 95.5 91.8 88.1 84.4 80.7 77.0
Microns 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232
VCC2 VCC2 VCC3 VCC3 VCC3 VCC2 VCC2 VCC3 VCC3 VCC2
NOTES: coordinates represent centers relative center die. N.C. signifies connect. These pads must connected. symbol used denote active signals. Boundary Scan (JTAG) implemented through following pads: (TDO), (TCK), (TDI), (TMS), (TRST#) FRCMC# external pull-up compatibility with other Pentium processors.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Table Mobile Pentium® Processor with MMXTechnology Bond Center Data (Sheet Center(1) PAD# SIGNAL
(2,3,5)
Mils (=0.001 inch) 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 1861 1767 1673 1579 1485 1391 1297 1203 1109 1015 -113 -1844 -2032 -2126 -2220 -2314 -2408 -2502 -2596 -2690 73.3 69.6 65.9 62.2 58.5 54.8 51.1 47.4 43.7 40.0 36.3 32.5 28.8 25.1 21.4 17.7 14.0 10.3 -0.8 -4.5 -72.6 -80.0 -83.7 -87.4 -91.1 -94.8 -98.5 -102.2 -105.9
Microns 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232
VCC3 VCC2 VCC3 VCC3 VCC2 VCC3 VCC2 RESET N.C. SCYC VCC3 BE7# BE6# BE5# BE4#
NOTES: coordinates represent centers relative center die. N.C. signifies connect. These pads must connected. symbol used denote active signals. Boundary Scan (JTAG) implemented through following pads: (TDO), (TCK), (TDI), (TMS), (TRST#) FRCMC# external pull-up compatibility with other Pentium processors.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Table Mobile Pentium® Processor with MMXTechnology Bond Center Data (Sheet Center(1) PAD# SIGNAL
(2,3,5)
Mils (=0.001 inch) 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 245.4 -2784 -2878 -2972 -3066 -3160 -3254 -3348 -3442 -3536 -3630 -3724 -3818 -3912 -4006 -4100 -4194 -4288 -4382 -4476 -4570 -4664 -109.6 -113.3 -117.0 -120.7 -124.4 -128.1 -131.8 -135.5 -139.2 -142.9 -146.6 -150.3 -154.0 -157.7 -161.4 -165.1 -168.8 -172.5 -176.2 -179.9 -183.6
Microns 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232 6232
VCC3 BE3# BE2# BE1# BE0# A20M# FLUSH# BUSCHK# W/R# VCC3 HIT# HITM# VCC3 ADS# EADS# D/C#
NOTES: coordinates represent centers relative center die. N.C. signifies connect. These pads must connected. symbol used denote active signals. Boundary Scan (JTAG) implemented through following pads: (TDO), (TCK), (TDI), (TMS), (TRST#) FRCMC# external pull-up compatibility with other Pentium processors.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
INTEL PRODUCTS PROCESSING Wafer Probe
backside each adheres membrane GEL-PAK, eliminating risk damage active surface. simple vacuum release mechanism allows pick place removal customer's site. Only from same wafer packaged together GEL-PAK, placed GEL-PAKs with consistent orientation. GELPAKs then sealed labeled with following information: Intel SmartDie Intel Part Number Assembly Process Order Spec Code applicable) Customer Part Number applicable) Assembly Traveler Number Finished Product Order Number Quantity Seal Date Country Origin NOTE: GEL-PAKs require Vacuum Release Station. Contact Vichem* Corporation more information.
Wafer probing performed every wafer produced Intel Fabs. process consists specific electrical tests device-specific functionality tests. wafer level, built-in test structures probed verify that device electrical characteristics control meet specifications. Measurements made transistor threshold voltages current characteristics; poly contact resistance; gate oxide junction integrity; specific parameters critical particular technology device type. Wafer-to-wafer, across-the-wafer run-to-run variation conformance spec limits checked. actual devices each wafer then probed both functionality performance specifications. Additional reliability tests also included probe steps.
Wafer
Probed wafers transferred Intel's assembly sites sawed. cuts completely through wafer.
Inspection Steps
Test Procedure
Multiple inspection steps performed during fabrication packing flow. These steps performed according same specifications criteria established Intel's standard packaged product. Specific inspection steps include wafer visual well final visual just before sealed moisture barrier bags.
Intel instituted full-speed functional testing burn-in level SmartDie products. This level testing ordinarily performed only after assembly into package. Each tested burned-in same electrical limits equivalent packaged unit.
Inspection
Storage Requirements
Upon completion test burn-in, undergo visual inspection. This process same visual inspection standard packaged product. compliant then transferred GEL-PAKs shipment.
Packing Procedure
Intel products will shipped GEL-PAKs sealed moisture-barrier anti-static with desiccant. special storage procedures required while still unopened. Once opened, GEL-PAK should stored dry, inert atmosphere prevent corrosion bond pads.
Intel will ship Intel products GEL-PAKs. GEL-PAKs eliminate edge damage usually associated with cavity plates chip trays.
Electro-Static Discharge (ESD)
Components sensitive.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
SPECIFICATIONS
Physical Specifications
Specifications within this document specific particular revision subject change without notice. Verify with your local Intel Sales Office that have latest data before finalizing design.
Table defines Mobile Pentium® Processor with MMXTechnology physical specifications.
Table Mobile Pentium® Processor with MMXTechnology Physical Specifications Revision: Post-Saw Dimensions: Thickness: Minimum Pitch: Passivation Opening Size: Bond Metallization: (outermost layer first) Pads Die: Backside Material: (outermost layer first) Passivation: (outermost layer first) Intel Fabrication Process:
NOTE:
A-Step Mils: 0.5, associated Die/Bond Layout orientation. mils microns (3.7 mils) Mils: (single pads) Microns: (single pads) 16,800 Angstroms Aluminum (0.5% Copper), 1000 Angstroms Titanium 1600 Angstroms Gold, Angstroms Titanium microns polyimide, 0.75 microns nitride CMOS (min. feature size microns)
specifications provided valid A-step only.
PRELIMINARY
Mobile Pentium® Processor with MMXTechnology
Specifications
NOTICE: This datasheet contains preliminary information products production. valid devices indicated revision history. specifications subject change without notice. Verify with your local Intel Sales Office that have latest data before finalizing design. WARNING: Stressing device beyond "Absolute Maximum Ratings" cause permanent damage. These stress ratings only. Operation beyond "Operating Conditions" recommended extended exposure beyond "Operating Conditions" affect device reliability.
ABSOLUTE MAXIMUM RATINGS
GEL-PAK Storage Temperature +70°C Junction Temperature Under Bias -65°C +110°C Supply Voltage wrt. -0.5 +4.6 Supply Voltage wrt. -0.5 +3.7 Only Buffer Input Voltage -0.5 VCC3 exceed VCC3
OPERATING CONDITIONS
VCC3 (I/O Supply Voltage) VCC2 (Core Supply Voltage) .2.45 0.215/-0.165 (Junction Temperature Under Bias) 105°C(1) Substrate Bias Float (Self Biasing VSS), Alternative Drive Core Operating Frequency 150, (60, Bus) NOTES: Average surface temperature
DEVICE NOMENCLATURE
Package Type
Base Product Number
Speed (MHz)
Core Speed (MHz)
VALID COMBINATIONS: X8050366166 X8050360150
REFERENCE INFORMATION
Document Title Order 243292
Mobile Pentium® Processor with MMXTechnology datasheet
REVISION HISTORY
Revision Date 1/97 Initial Release Description
PRELIMINARY
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