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Pentium PROCESSORS iCOMP INDEX 735T90 610T75 WITH VOLTAGE REDUCTION TECHNOLOGSmartDie Product Specification
Compatible with Large Software Base MS-DOS Windows UNIX 32-Bit with 64-Bit Data Superscalar Architecture Pipelined Integer Units Capable Instructions Clock Pipelined Floating Point Unit Separate Code Data Caches Kbyte Code Kbyte Writeback Data MESI Cache Protocol Advanced Design Features Branch Prediction Virtual Mode Extensions
Mbyte Pages Increased Rate IEEE 1149 Boundary Scan Internal Error Detection Features Enhanced Power Management Features System Management Mode Clock Control Voltage Reduction Technology Core Supply Buffer Supply Fractional Operation Core Core Intel SmartDie Product Full Testing Level (Junction) Temperature Range
Voltage BiCMOS Silicon Technology
NOTICE This document contains preliminary information products production valid devices indicated revision history This specification subject change without notice Verify with your local Intel sales office that have latest product specification before finalizing design REFERENCE INFORMATION information this document provided supplement Standard Package Data Sheet specific product Please reference Standard Package Data Sheet Book (Order 242557) additional product information specifications found this document Pentium processor fully compatible with entire installed base applications Windows UNIX other software that runs earlier Intel 8086 family product Pentium processor's superscalar architecture execute instructions clock cycle Branch prediction separate caches also increase performance pipelined floating-point unit delivers workstation level performance Separate code data caches reduce cache conflicts while remaining software transparent Pentium processor with voltage reduction million transistors built Intel's advanced voltage BiCMOS silicon technology full Enhanced power management features including System Management Mode (SMM) clock control additional Enhanced features core operation along with buffer operation availability SmartDie product version which available Pentium processor (510T60 567T66) make SmartDie product Pentium processor with voltage reduction technology ideal enabling mobile Pentium processor designs
Other brands names property their respective owners Information this document provided connection with Intel products Intel assumes liability whatsoever including infringement patent copyright sale Intel products except provided Intel's Terms Conditions Sale such products Intel retains right make changes these specifications time without notice Microcomputer Products have minor variations this specification known errata
COPYRIGHT
INTEL CORPORATION 1995
November 1995
Order Number 272751-002
Pentium PROCESSORS iCOMP INDEX WITH VOLTAGE REDUCTION TECHNOLOGSmartDie Product Specification
CONTENTS
SPECIFICATIONS Description INTEL PRODUCTS PROCESSING Test Procedure Wafer Probe Wafer Inspection Packing Procedure Inspection Steps Storage Requirements Electro-Static Discharge (ESD) SPECIFICATIONS Physical Specifications Specifications DEVICE NOMENCLATURE REFERENCE INFORMATION REVISION HISTORY FIGURES Figure Pentium Processor Photo Figure Pentium Processor Bond Layout TABLES Table Pentium Processor Bond Center Data Table Pentium Processor Physical Specifications
PAGE
Pentium Processor
272751
Figure Pentium Processor Photo
Pentium Processor
SPECIFICATIONS
plot photo opposite page indicate orientation GEL-PAK (shipping container) aligned shown relative notch which corner GEL-PAK Intel internal manufacturing name 80P54LM appears Pentium processor
272751
Figure Pentium Processor Bond Layout
Pentium Processor
Description
Table Pentium Processor Bond Center Data (Sheet Center Mils inch) Microns SIGNAL 5710 5710 5710 5710 5710 5710 5710 LOCK 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 HLDA 5710 BREQ 5710 5710 5710 APCHK 5710 PCHK 5710 PRDY 5710 SMIACT 5710 5710 5710 5710 5710 5710 5710 5710 5710
5614 5519 5424 5329 5234 5139 5044 4949 4854 4759 4664 4569 4474 4379 4284 4189 4094 3999 3904 3809 3714 3619 3524 3429 3334 3239 3144 3049 2954 2859 2764 2669 2574 2479 2384
Pentium Processor
Table Pentium Processor Bond Center Data (Sheet Center Mils inch) Microns SIGNAL 5710 5710 HOLD 5710 5710 5710 5710 5710 5710 5710 BOFF 5710 BRDY 5710 5710 5710 5710 5710 5710 5710 AHOLD 5710 5710 EWBE 5710 5710 5710 5710 5710 5710 5710 CACHE 5710 5710 5710 5710 5710 5710 5710 5710 FERR 5710 5710 5710
2289 2194 2099 2004 1909 1814 1719 1624 1529 1434 1339 1244 1149 1054 1036 1131
Pentium Processor
Table Pentium Processor Bond Center Data (Sheet Center Mils inch) Microns SIGNAL 5710 5710 IERR 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710
1226 1321 1416 1511 1606 1701 1796 1891 1986 2081 2176 2271 2366 2461 2556 2651 2746 2841 2936 3031 3126 3221 3316 3411 3506 3601 3696 3791 3886 3981 4076 4171 4266 4361 4456 4551 4646
Pentium Processor
Table Pentium Processor Bond Center Data (Sheet Center Mils inch) Microns SIGNAL 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5214 5119 5024 4929 4834 4739 4644 4549 4454 4359 4264 4169 4074 3979 3884 3789 3694 3599 3504 3409 3314 3219 3124 3029 2934 2839
4741 4836 4931 5026 5121 5216 5311 5406 5501 5596 5691 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217
Pentium Processor
Table Pentium Processor Bond Center Data (Sheet Center Mils inch) Microns SIGNAL 2744 2649 2554 2459 2364 2269 2174 2079 1984 1889 1794 1699 1604 1509 1414 1319 1224 1129 1034
6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217
Pentium Processor
Table Pentium Processor Bond Center Data (Sheet Center Mils inch) Microns SIGNAL 6217 6217 6217 6217 1056 6217 1151 6217 1246 6217 1341 6217 1436 6217 1531 6217 1626 6217 1721 6217 1816 6217 1911 6217 2006 6217 2101 6217 2196 6217 2291 6217 2386 6217 2481 6217 2576 6217 2671 6217 2766 6217 2861 6217 2956 6217 3051 6217 3146 6217 3241 6217 3336 6217 3431 6217 3526 5691 5710 5596 5710 5501 5710 5406 5710 5311 5710 5216 5710 5121 5710
Pentium Processor
Table Pentium Processor Bond Center Data (Sheet Center Mils inch) Microns SIGNAL 5026 5710 4931 TRST 5710 4551 5710 4456 5710 4361 5710 4266 5710 3886 5710 3791 5710 3696 5710 3601 5710 3506 5710 3411 5710 3316 5710 3221 5710 2841 5710 2746 5710 2651 5710 2556 5710 2271 5710 2176 5710 2081 5710 1986 5710 1891 5710 1796 5710 1701 5710 1226 5710 1131 5710 1036 5710 5710 5710 5710 5710 5710 5710 5710 5710 STPCLK 5710
Pentium Processor
Table Pentium Processor Bond Center Data (Sheet Center Mils inch) Microns SIGNAL 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 INIT 5710 IGNNE 5710 5710 5710 5710 5710 5710 INTR 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710
1149 1244 1339 1434 1529 1624 1719 1814 2099 2194 2289 2384 2479 2574 2669 2764 2859 2954 3049 3144 3239 3334 3429 3524 3619 3809 3904 3999 4094 4189 4284 4379
Pentium Processor
Table Pentium Processor Bond Center Data (Sheet Center Mils inch) Microns SIGNAL 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5710 5238 5143 5048 4953 4858 4763 4668 4573 4478 4383 4288 4193 4098 4003 3908 3813 3718 3623 3528 3433 3338 3243 3148 3053
4474 4569 4664 4759 4854 4949 5044 5139 5234 5329 5424 5519 5614 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217
Pentium Processor
Table Pentium Processor Bond Center Data (Sheet Center Mils inch) Microns SIGNAL 2958 2863 2768 2673 2578 2483 2388 2293 2198 2103 2008 1913 1818 1723 1628 1533 1438 1343 1248 1153 1058 RESET 2744 2839
6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217
Pentium Processor
Table Pentium Processor Bond Center Data (Sheet Center Mils inch) Microns SIGNAL 2934 SCYC 3029 3124 3219 3314 3409 3504 3599 3694 3789 3884 3979 4074 4169 A20M 4264 FLUSH 4359 BUSCHK 4454 4549 4644 4739 4834 HI244 4929 5024 5119 5214 EADS
6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217 6217
NOTES signifies Connect These pads must connected symbol used signal denote active signal coordinates represent bond centers relative center Boundary Scan (JTAG) implemented through following pads (TCK) (TDO) (TDI) (TMS) (TRST)
Pentium Processor
backside each adheres membrane GEL-PAK eliminating risk damage active surface simple vacuum release mechanism allows pick place removal customer's site Only from same wafer packaged together GEL-PAK placed GEL-PAKs with consistent orientation GELPAKs then sealed labeled with following information Intel SmartDie
INTEL PRODUCTS PROCESSING Test Procedure
Intel instituted full-speed functional testing level SmartDie products This level testing ordinarily performed only after assembly into package Each tested same electrical limits equivalent packaged unit
Wafer Probe
Wafer probing performed every wafer produced Intel Fabs process consists specific electrical tests device-specific functionality tests wafer level built-in test structures probed verify that device electrical characteristics control meet specifications Measurements made transistor threshold voltages current characteristics poly contact resistance gate oxide junction integrity specific parameters critical particular technology device type Wafer-to-wafer across-the-wafer run-to-run variation conformance spec limits checked actual devices each wafer then probed both functionality performance specifications Additional reliability tests also included probe steps
Intel Part Number Assembly Process Order Spec Code applicable) Customer Part Number applicable) Assembly Traveler Number Finished Product Order Number Quantity Seal Date Country Origin NOTE GEL-PAKs require Vacuum Release Station Contact Vichem Corporation more information
Inspection Steps
Multiple inspection steps performed during fabrication packing flow These steps performed according same specifications criteria established Intel's standard packaged product Specific inspection steps include wafer visual well final visual just before sealed moisture barrier bags
Wafer
Probed wafers transferred Intel's assembly sites sawed cuts totally through wafer
Inspection
Upon completion wafer moved pick place equipment that removes reject remaining submitted same visual inspection standard packaged product compliant then transferred GELPAKs shipment
Storage Requirements
Intel products will shipped GEL-PAKs sealed moisture-barrier anti-static with desiccant special storage procedures required while still unopened Once opened GEL-PAK should stored inert atmosphere prevent corrosion bond pads
Packing Procedure
Intel will ship Intel products GEL-PAKs GEL-PAKs eliminate edge damage usually associated with cavity plates chip trays
Electro-Static Discharge (ESD)
Components sensitive
Pentium Processor
SPECIFICATIONS
Specifications within this document specific particular revision subject change without notice Verify with your local Intel Sales Office that have latest data before finalizing design
Physical Specifications
Table defines Pentium processor physical specifications
Table Pentium Processor Physical Specifications Revision Post-Saw Dimensions Thickness Minimum Pitch Passivation Opening Size Bond Metallization (outermost layer first) Pads Backside Material (outermost layer first) Passivation (outermost layer first) Intel Fabrication Process Mils associated Bond Layout orientation mils Pads evenly pitched Minimum pitch microns mils) Mils (single pads) Microns (single pads) Angstroms 1000 Angstroms Angstroms 1600 Angstroms Gold Angstroms Chrome microns polyimide microns nitride BiCMOS (min feature size microns)
Pentium Processor
Specifications
ABSOLUTE MAXIMUM RATINGS
GEL-PAK Storage Temperature
NOTICE This data sheet contains preliminary information products production specifications subject change without notice Verify with your local Intel Sales office that have latest data sheet before finalizing design
Junction Temperature Under Bias Supply Voltage Supply Voltage Only Buffer Input Voltage VCC3 exceed 6V(1) 5V(2) Safe Buffer Input Voltage
WARNING Stressing device beyond ``Absolute Maximum Ratings'' cause permanent damage These stress ratings only Operation beyond ``Operating Conditions'' recommended extended exposure beyond ``Operating Conditions'' affect device reliability
OPERATING CONDITIONS
VCC3 Supply Voltage) VCC2 (Core Supply Voltage) (Junction Temperature Under Bias) Core Operating Frequency Substrate Bias C(3) Bus) DriveVSS
NOTES Applies Pentium processors with Voltage Reduction Technology inputs except Applies Average surface temperature
DEVICE NOMENCLATURE
Valid Combinations X805025075 X805026090
272751
REFERENCE INFORMATION
Document Title Pentium Processors iComp Index with Voltage Reduction Technology Pentium Processors Related Products AP-479 Pentium Processor Clock Design (Application Note) AP-480 Pentium Processor Thermal Design Guidelines (Application Note) Order 242557 241732 241574 241575
REVISION HISTORRevision -001 -002 Date Initial Release Pads Signal names modified Description
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