®1404 complete 600ksps, 12-bit converter which draws only 75mW from su

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

®1404 complete 600ksps, 12-bit converter which draws only 75mW from su

Datasheet Thumbnail

Top Searches for this datasheet

LTC1404 Complete SO-8, 12-Bit, 600ksps with Shutdown
®1404 complete 600ksps, 12-bit converter which draws only 75mW from supplies. This easy-to-use device comes complete with 160ns sample-and-hold precision reference. Unipolar bipolar conversion modes flexibility ADC. LTC1404 power saving modes: Sleep. mode, consumes only 7.5mW power wake convert immediately. Sleep mode, consumes 60µW power typically. Upon powerup from Sleep mode, reference ready (REFRDY) signal available serial data word indicate that reference settled chip ready convert. LTC1404 converts 4.096V unipolar inputs from single supply ±2.048V bipolar inputs from supplies. Maximum specs include ±1LSB INL, ±1LSB 45ppm/°C full-scale drift over temperature. Guaranteed performance includes 69dB S/(N 76dB input frequency 100kHz over temperature. 3-wire serial port allows compact efficient data transfer wide range microprocessors, microcontrollers DSPs.
registered trademarks Linear Technology Corporation. MICROWIRE trademark National Semiconductor Corp.
Complete 12-Bit SO-8 Single Supply Operation Sample Rate: 600ksps Power Dissipation: 75mW (Typ) 72dB S/(N 80dB Nyquist Missing Codes over Temperature Mode with Instant Wake-Up: 7.5mW Sleep Mode: 60µW High Impedance Analog Input Input Range (1mV/LSB): 4.096V 2.048V Internal Reference Overdriven Externally 3-Wire Interface DSPs Processors (SPI MICROWIRECompatible)
APPLICATIONS
High Speed Data Acquisition Digital Signal Processing Multiplexed Data Acquisition Systems Audio Telecom Processing Digital Radio Spectrum Analysis Power Battery-Operated Systems Handheld Portable Instruments
TYPICAL APPLICATION
Single Supply, 600kHz, 12-Bit Sampling Converter
Power Consumption Sample Rate
NORMAL CONVERSION
SUPPLY CURRENT (mA)
10µF* ANALOG INPUT 4.096V) REFOUT 2.43V 10µF 0.1µF
0.1µF
LTC1404
SERIAL DATA LINK
LTC1404 TA01
SLEEP MODE BETWEEN CONVERSION
VREF
CONV DOUT
P1.4 P1.3 P1.2
0.01 9.6MHz CLOCK 0.001 0.01 100k SAMPLE RATE (Hz)
LTC1404 TA02
*AVX TPSD106M035R0300
MODE BETWEEN CONVERSION
LTC1404
ABSOLUTE MAXIMUM RATINGS
(Notes
PACKAGE/ORDER INFORMATION
VIEW VREF CONV DOUT
Supply Voltage (VCC) Negative Supply Voltage (VSS). Total Supply Voltage (VCC VSS) Bipolar Operation Only Analog Input Voltage (Note Unipolar Operation 0.3V (VCC 0.3V) Bipolar Operation. (VSS 0.3V) (VCC 0.3V) Digital Input Voltage (Note Unipolar Operation 0.3V Bipolar Operation.(VSS 0.3V) Digital Output Voltage Unipolar Operation 0.3V (VCC 0.3V) Bipolar Operation. (VSS 0.3V) (VCC 0.3V) Power Dissipation. 300mW Operating Ambient Temperature Range LTC1404C. 70°C LTC1404I. 40°C 85°C Junction Temperature. 125°C Storage Temperature Range 65°C 150°C Lead Temperature (Soldering, sec). 300°C
ORDER PART NUMBER LTC1404CS8 LTC1404IS8
PACKAGE 8-LEAD PLASTIC
TJMAX 125°C, 130°C/
PART MARKING 1404 1404I
Consult factory PDIP packages Military grade parts.
POWER REQUIRE
SYMBOL PARAMETER Positive Supply Voltage Negative Supply Voltage Positive Supply Current
(Note
CONDITIONS Unipolar Bipolar Bipolar Only fSAMPLE 600ksps Mode Sleep Mode fSAMPLE 600ksps, Mode Sleep Mode fSAMPLE 600ksps Mode Sleep Mode 4.75 4.75 2.45
Negative Supply Current
Power Dissipation
5.25 5.25 5.25 20.0
UNITS
ALOG
SYMBOL PARAMETER Analog Input Range
(Note
CONDITIONS 4.75V 5.25V (Unipolar) 4.75V 5.25V, 5.25V 2.45V (Bipolar) During Conversions (Hold Mode) Between Conversions (Sample Mode) During Conversions (Hold Mode)
4.096 ±2.048
UNITS
Analog Input Leakage Current Analog Input Capacitance
LTC1404 VERTER CHARACTERISTICS
PARAMETER Resolution Missing Codes) Integral Linearity Error Differential Linearity Error Offset Error Full-Scale Error Full-Scale Tempco IOUT(REF)
ACCURACY
SYMBOL PARAMETER S/(N Signal-to-Noise Total Harmonic Distortion Harmonic Peak Harmonic Spurious Noise Intermodulation Distortion Full Power Bandwidth
REFERE CHARACTERISTICS
PARAMETER VREF Output Voltage VREF Output Tempco VREF Line Regulation VREF Load Regulation VREF Wake-Up Time from Sleep Mode CONDITIONS IOUT IOUT 4.75V 5.25V 5.25V IOUT CVREF 10µF
DIGITAL PUTS OUTPUTS
SYMBOL PARAMETER High Level Input Voltage Level Input Voltage Digital Input Current Digital Input Capacitance High Level Output Voltage Level Output Voltage
With internal reference (Notes
CONDITIONS (Note (Note
UNITS Bits ppm/°C
fSAMPLE 600kHz
CONDITIONS 100kHz Input Signal 300kHz Input Signal 100kHz Input Signal 300kHz Input Signal 100kHz Input Signal 300kHz Input Signal fIN1 99.17kHz, fIN2 102.69kHz fIN1 298.68kHz, fIN2 304.83kHz
UNITS
Full Linear Bandwidth (S/(N 68dB)
(Note
2.410
2.430 0.01
2.450
UNITS ppm/°C LSB/ LSB/ LSB/mA
(Note
CONDITIONS 5.25V 4.75V 4.75V, 10µA 4.75V, 200µA 4.75V, 160µA 4.75V, 1.6mA
UNITS
0.05 0.10
LTC1404
DIGITAL PUTS OUTPUTS
SYMBOL PARAMETER ISOURCE ISINK Hi-Z Output Leakage DOUT Hi-Z Output Capacitance DOUT Output Source Current Output Sink Current
CHARACTERISTICS
SYMBOL fSAMPLE(MAX) tCONV tACQ fCLK tCLK tWK(NAP) PARAMETER Maximum Sampling Frequency Conversion Time Acquisition Time (Unipolar Mode) (Bipolar Mode Frequency Pulse Width Time Wake from Mode Pulse Width Return Active Mode CONV Setup Time CONV After Leading CONV Pulse Width Time from Sample Mode Aperture Delay Sample-and-Hold
Minimum Delay Between Conversion (Unipolar Mode) (Note (Bipolar Mode Delay Time, DOUT Valid Delay Time, DOUT Hi-Z Time from Previous Data Remains Valid After CLOAD 20pF CLOAD 20pF CLOAD 20pF
denotes specifications which apply over full operating temperature range; other limits typicals apply 25°C. Note Absolute Maximum Ratings those values beyond which life device impaired. Note voltage values with respect GND. Note When these voltages taken below (ground unipolar mode) above VCC, they will clamped internal diodes. This product handle input currents greater than 60mA without latch-up driven below (ground unipolar mode) above VCC. Note When these voltages taken below (ground unipolar mode), they will clamped internal diodes. This product handle input currents greater than 60mA without latch-up driven below (ground unipolar mode). These pins clamped VCC. Note fSAMPLE 600kHz, unless otherwise specified.
(Note
CONDITIONS VOUT VOUT VOUT
UNITS
(Note Figures
CONDITIONS
1.36
UNITS
fCLK 9.6MHz
(Note
(Note Jitter 50ps
Note Guaranteed design, subject test. Note Linearity, offset full-scale specifications apply unipolar bipolar modes. Note Integral nonlinearity defined deviation code from straight line passing through actual endpoints transfer curve. deviation measured from center quantization band. Note Bipolar offset offset voltage measured from 0.5LSB when output code flickers between 0000 0000 0000 1111 1111 1111. Note rising edge CONV starts conversion. CONV returns decision point during conversion, create small errors. best performance, ensure that CONV returns either within 100ns after conversion starts (i.e., before first decision) after clock cycles. (Figure Timing Diagram).
LTC1404 TYPICAL PERFORMANCE CHARACTERISTICS
Unipolar Mode Differential Nonlinearity Output Code
1.00 1.00
INTEGRAL NONLINEARITY (LSBs)
DIFFERENTIAL NONLINEARITY (LSBs)
0.75 0.50 0.25 -0.25 -0.50 -0.75 -1.00 1024 1536 2048 2560 3072 3584 4096 OUTPUT CODE
1404
0.75 0.50 0.25 -0.25 -0.50 -0.75 -1.00 1024 1536 2048 2560 3072 3584 4096 OUTPUT CODE
1404
DIFFERENTIAL NONLINEARITY (LSBs)
fSAMPLE 600kHz
Bipolar Mode Integral Nonlinearity Output Code
1.00 fSAMPLE 600kHz
INTEGRAL NONLINEARITY (LSBs)
0.75 0.50 AMPLITUDE (dB) 0.25 -0.25 -0.50 -0.75 -1.00 -2048 2048 -1024 1024 1536 -1536 -512 OUTPUT CODE
1404
-100 -110 -120 FREQUENCY (kHz)
1404
AMPLITUDE (dB)
Unipolar Mode ENOB Signal/(Noise Distortion) Input Frequency
EFFECTIVE NUMBER BITS
SIGNAL-TO-NOISE RATIO (dB)
SIGNAL-TO-NOISE RATIO (dB)
NYQUIST FREQUENCY
fSAMPLE 600kHz INPUT FREQUENCY (kHz) 1000
1404
Unipolar Mode Integral Nonlinearity Output Code
1.00 fSAMPLE 600kHz 0.75 0.50 0.25 -0.25 -0.50 -0.75
Bipolar Mode Differential Nonlinearity Output Code
fSAMPLE 600kHz
-1.00 -2048 2048 -1024 1024 1536 -1536 -512 OUTPUT CODE
1404
Unipolar Mode 4096 Nonaverage with 100kHz Signal
fSAMPLE 600kHz 99.1699kHz SINAD 71dB -77dB -100 -110 -120
Unipolar Mode 4096 Nonaverage with 300kHz Signal
fSAMPLE 600kHz 298.681kHz SINAD 71dB -73dB
FREQUENCY (kHz)
1404
Unipolar Mode Signal-to-Noise Ratio (Without Harmonics) Input Frequency
SIGNAL/(NOISE DISTORTION) (dB) fSAMPLE 600kHz INPUT FREQUENCY (kHz) 1000
1404
Bipolar Mode Signal-to-Noise Ratio (Without Harmonics) Input Frequency
fSAMPLE 600kHz INPUT FREQUENCY (kHz) 1000
1404
LTC1404 TYPICAL PERFORMANCE CHARACTERISTICS
Unipolar Mode Distortion Input Frequency
AMPLITUDE BELOW FUNDAMENTAL)
AMPLITUDE (dB) -100 INPUT FREQUENCY (kHz) 1000
1404
fSAMPLE 600kHz
Unipolar Mode Intermodulation Distortion Plot 300kHz
fSAMPLE 600kHz 298.6816406kHz 304.8339844kHz
AMPLITUDE (dB)
-100 -110 -120 FREQUENCY (kHz)
Bipolar Mode Intermodulation Distortion Plot 300kHz
fSAMPLE 600kHz 298.6816406kHz 304.8339844kHz
AMPLITUDE (dB)
-100 -110 -120 FREQUENCY (kHz)
Unipolar Mode Intermodulation Distortion Plot 100kHz
-100 fSAMPLE 600kHz 99.16992188kHz 102.6855469kHz
HARMONIC
HARMONIC
-110 -120 FREQUENCY (kHz)
1404
1404
1404
LTC1404 TYPICAL PERFORMANCE CHARACTERISTICS
Unipolar Mode S/(N Input Frequency Amplitude
SIGNAL/(NOISE DISTORTION) (dB)
SPURIOUS-FREE DYNAMIC RANGE (dB)
SIGNAL/(NOISE DISTORTION) (dB)
fSAMPLE 600kHz INPUT FREQUENCY (kHz) 1000
1404
-20dB
-60dB
Bipolar Mode Peak Harmonic Spurious Noise Input Frequency
SPURIOUS-FREE DYNAMIC RANGE (dB)
-100 INPUT FREQUENCY (kHz) 1000
1404
POWER SUPPLY FEEDTHROUGH (dB)
POWER SUPPLY FEEDTHROUGH (dB)
fSAMPLE 600kHz
Reference Voltage Temperature
2.440 2.438
REFERENCE VOLTAGE
REFERENCE VOLTAGE
2.436 2.434 2.432 2.430 2.428 2.426 2.424 2.422 2.420 TEMPERATURE (°C)
2.43 2.42 2.41 2.40 2.39
ACQUISITION TIME (µs)
1404
Bipolar Mode S/(N Input Frequency Amplitude
fSAMPLE 600kHz INPUT FREQUENCY (kHz) 1000
1404
Unipolar Mode Peak Harmonic Spurious Noise Input Frequency
-100 INPUT FREQUENCY (kHz) 1000
1404
fSAMPLE 600kHz
-20dB
-60dB
Unipolar Mode Power Supply Feedthrough Ripple Frequency
FREQUENCY 100kHz fSAMPLE 600kHz (VRIPPLE 1mV) -100 RIPPLE FREQUENCY (kHz) 1000
1404
Bipolar Mode Power Supply Feedthrough Ripple Frequency
-100 RIPPLE FREQUENCY (kHz) 1000
1404
FREQUENCY 100kHz fSAMPLE 600kHz
(VRIPPLE 10mV)
(VRIPPLE 1mV)
Reference Voltage Load Current
2.45 2.44
Acquisition Time Source Impedance
25°C SOURCE RESISTANCE
1404
1404
LOAD CURRENT (mA)
LTC1404 TYPICAL PERFORMANCE CHARACTERISTICS
Unipolar Mode Supply Current Temperature
15.0 12.5 CURRENT CURRENT fSAMPLE 600kHz TEMPERATURE (°C) 10.0 fSAMPLE 600kHz TEMPERATURE (°C)
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
FUNCTIONS
(Pin Positive Supply, Bypass (10µF tantalum parallel with 0.1µF ceramic). (Pin Analog Input. 4.096V (Unipolar), ±2.048V (Bipolar). VREF (Pin 2.43V Reference Output. Bypass (10µF tantalum parallel with 0.1µF ceramic). (Pin Ground. should tied directly analog ground plane. DOUT (Pin conversion result shifted from this pin. (Pin Clock. This clock synchronizes serial data transfer. minimum pulse 40ns signals wake from Sleep mode. CONV (Pin Conversion Start Signal. This active high signal starts conversion rising edge. Keeping pulsing CONV two/four times will into Nap/Sleep mode. (Pin Negative Supply. bipolar operation. Bypass with 10µF tantalum parallel with 0.1µF ceramic. should tied unipolar operation.
Bipolar Mode Supply Current Temperature
SUPPLY CURRENT (µA)
1404
1404
LTC1404
FUNCTIONAL BLOCK DIAGRA
VREF 2.43V
CONV CONTROL LOGIC SUCCESSIVE APPROXIMATION REGISTER/PARALLEL SERIAL CONVERTER
TEST CIRCUITS
DOUT CLOAD DOUT CLOAD
Hi-Z Hi-Z
CSAMPLE ZEROING SWITCH 12-BIT CAPACITIVE COMP DOUT
1404
Hi-Z Hi-Z
1404 TC01
LTC1404
APPLICATIONS INFORMATION
Conversion Details LTC1404 uses successive approximation algorithm internal sample-and-hold circuit convert analog signal 12-bit serial output based precision internal reference. control logic provides easy interface microprocessors DSPs through 3-wire connections. rising edge CONV input starts conversion. start conversion successive approximation register (SAR) reset. Once conversion cycle begun, cannot restarted. During conversion, internal 12-bit capacitive output sequenced from most significant (MSB) least significant (LSB). Referring Figure input connects sample-and-hold capacitor during acquired phase comparator offset nulled feedback switch. this acquire phase, typically takes 160ns sample-and-hold capacitor acquire analog signal. During convert phase, comparator feedback switch opens, putting comparator into compare mode. input switches connect CSAMPLE ground, injecting analog input charge onto summing junction. This input charge successively compared with binary-weighted charges supplied capacitive DAC. decisions made high speed comparator. conversion, output balances input charge. contents 12-bit data word) which represent input voltage, presented through serial DOUT.
SAMPLE SAMPLE HOLD CDAC VDAC DOUT
1404
AMPLITUDE (dB)
AMPLITUDE (dB)
CSAMPLE
COMP
Figure Input
Dynamic Performance LTC1404 excellent high speed sampling capability. (Fast Fourier Transform) test techniques used test ADC's frequency response, distortion noise rated throughput. applying distortion sine wave analyzing digital output using algorithm, ADC's spectral content examined frequencies outside fundamental. Figure shows typical LTC1404 plot.
-100 -110 -120 FREQUENCY (kHz)
1404 F02a
fSAMPLE 600kHz 99.169kHz SINAD 72dB 88dB
Figure LTC1404 Nonaveraged, 4096 Point Plot with 100kHz Input Frequency Bipolar Mode
-100 -110 -120 FREQUENCY (kHz)
1404 F02b
fSAMPLE 600kHz 298.681kHz SINAD 71dB 84dB
Figure LTC1404 Nonaveraged, 4096 Point Plot with 300kHz Input Frequency Bipolar Mode
LTC1404
APPLICATIONS INFORMATION
Signal-to-Noise Ratio signal-to-noise plus distortion ratio [S/(N ratio between amplitude fundamental input frequency amplitude other frequency components output. output band limited frequencies from half sampling frequency. Figure shows typical spectral content with 600kHz sampling rate 100kHz input. dynamic performance excellent input frequencies Nyquist limit 300kHz shown Figure Effective Number Bits effective number bits (ENOBs) measurement effective resolution directly related S/(N equation:
1.76 6.02
AMPLITUDE BELOW FUNDAMENTAL)
where effective number bits resolution S/(N expressed maximum sampling rate 600kHz, LTC1404 maintains very good ENOBs Nyquist input frequency 300kHz (refer Figure
fSAMPLE 600kHz 100k INPUT FREQUENCY (Hz)
1404
NYQUIST FREQUENCY
EFFECTIVE NUMBER BITS
Figure Effective Bits Signal-to-Noise Distortion Input Frequency Bipolar Mode
Total Harmonic Distortion Total harmonic distortion (THD) ratio harmonics input signal fundamental itself. out-of-band harmonics alias into frequency band between half sampling frequency. expressed .Vn2 where amplitude fundamental frequency through amplitudes second through harmonics. input frequency shown Figure LTC1404 good distortion performance Nyquist frequency beyond.
-100 100k INPUT FREQUENCY (Hz)
1404
fSAMPLE 600kHz
HARMONIC HARMONIC
SIGNAL/(NOISE DISTORTION) (dB)
Figure Distortion Input Frequency Bipolar Mode
Intermodulation Distortion input signal consists more than spectral component, transfer function nonlinearity produce intermodulation distortion (IMD) addition THD. change sinusoidal input caused presence another sinusoidal input different frequency.
LTC1404
APPLICATIONS INFORMATION
pure sine waves frequencies applied input, nonlinearities transfer function create distortion products difference frequencies nfb, where etc. example, order terms include while order terms includes (2fa fb), (2fa fb), 2fb) 2fb). input sine waves equal magnitude, value decibels) order products expressed following formula.
IMD( 20log Amplitude Amplitude
Figure shows performance 100kHz input.
AMPLITUDE (dB)
fSAMPLE 600kHz 99.16992188kHz 102.6855469kHz
-100 -110 -120 FREQUENCY (kHz)
1404
Figure Intermodulation Distortion Plot Bipolar Mode
Peak Harmonic Spurious Noise peak harmonic spurious noise largest spectral component excluding input signal This value expressed decibels relative value full-scale input signal. Full Power Full Linear Bandwidth full power bandwidth input frequency which amplitude reconstructed fundamental reduced full-scale input signal. full linear bandwidth input frequency which S/(N dropped 68dB effective bits).
LTC1404 been designed optimize input bandwidth, allowing undersample input signals with frequencies above converter's Nyquist Frequency. noise floor stays very high frequencies; S/(N becomes dominated distortion frequencies beyond Nyquist. Driving Analog Input analog input LTC1404 easy drive. draws only small current spike while charging sampleand-hold capacitor conversion. During conversion, analog input draws only small leakage current. only requirement that amplifier driving analog input must settle after small current spike before next conversion starts. that settles 160ns small load current transient will allow maximum speed operation. slower used, more settling time provided increasing time between conversions. Suitable devices capable driving ADC's input include 1360 LT1363 amps. LTC1404 comes with built-in unipolar/bipolar detection circuit. potential forced below GND, internal circuitry will automatically switch bipolar mode. following list summary amps that suitable driving LTC1404, more detailed information available Linear Technology databooks LinearViewCD-ROM. 1215/LT1216: Dual quad 23MHz, 50V/µs single supply amps. Single ±15V supplies, 6.6mA specifications, 90ns settling 0.5LSB. LT1223: 100MHz video current feedback amplifier. ±15V supplies, supply current. distortion above 600kHz. noise. Good applications. LT1227: 140MHz video current feedback amplifier. ±15V supplies, 10mA supply current. Lowest distortion frequencies above 600kHz. noise. Best applications.
LTC1404
APPLICATIONS INFORMATION
LT1229/LT1230: Dual quad 100MHz current feedback amplifiers. ±15V supplies, supply current each amplifier. noise. Good specs. LT1360: 37MHz voltage feedback amplifier. ±15V supplies. 3.8mA supply current. Good specs. 70ns settling 0.5LSB. LT1363: 50MHz, 450V/µs amps. ±15V supplies. 6.3mA supply current. Good specs. 60ns settling 0.5LSB. LT1364/LT1365: Dual quad 50MHz, 450V/µs amps. ±15V supplies, 6.3mA supply current amplifier. 60ns settling 0.5LSB. Internal Reference LTC1404 on-chip, temperature compensated, curvature corrected, bandgap reference, which factory trimmed 2.43V. internally connected available provide current external load. minimum code transition noise, reference output should decoupled with capacitor filter wideband noise from reference (10µF tantalum parallel with 0.1µF ceramic). VREF driven with other means provide input span adjustment bipolar mode. VREF must driven least 2.46V prevent conflict with internal reference. reference should driven more than Figure shows 1360 driving reference pin. Figure shows typical reference, LT1019A-5 connected LTC1404. This will provide improved
INPUT RANGE ±0.843 VREF(OUT)
LT1360
VREF(OUT) 2.46V 10µF
LTC1404 VREF
1404
Figure Driving VREF with LT1360
INPUT RANGE ±4.215V ±0.843 VREF) LTC1404 VOUT LT1019A-5 10µF
1404
VREF
Figure Supplying Reference Voltage LTC1404 with LT1019A-5
drift (equal maximum 5ppm/°C LT1019A-5) ±4.215V full scale. VREF forced lower than 2.43V, REFRDY serial data output will forced low. UNIPOLAR BIPOLAR OPERATION ADJUSTMENT Figure shows ideal input/output characteristics LTC1404. code transitions occur midway between successive integer values (i.e., 0.5LSB, 1.5LSB, 2.5LSB, 1.5LSB). output code natural binary with 1LSB 4.096/4096 1mV. Figure shows input/output transfer characteristics bipolar mode two's complement format. Unipolar Offset Full-Scale Error Adjustments applications where absolute accuracy important, offset full-scale errors adjusted zero. Figure shows extra components required full-scale error adjustment. Figure shows offset full-scale adjustment. Offset error must adjusted before fullscale error. Zero offset achieved applying 0.5mV (i.e., 0.5LSB) input adjusting offset trim until LTC1404 output code flickers between 0000 0000 0000 0000 0000 0001. zero full-scale error, apply analog input 4.0945V 1.5LSB last code transition) input adjust until LTC1404 output code flickers between 1111 1111 1110 1111 1111 1111.
LTC1404
APPLICATIONS INFORMATION
111.111 111.110 111.101
OUTPUT CODE
1LSB 4.096 4096 4096
111.100
000.011 000.010 000.001 000.000
UNIPOLAR ZERO
INPUT VOLTAGE
1LSB
1404
Figure LTC1404 Unipolar Transfer Characteristics
011.111 011.110 BIPOLAR ZERO
OUTPUT CODE
000.001 000.000 111.111 111.110
100.001 100.000 -FS/2 INPUT VOLTAGE FS/2 1LSB
1404
Figure LTC1404 Bipolar Transfer Characteristics
LTC1404 FULL-SCALE ADJUST
ADDITIONAL PINS OMITTED CLARITY ±20LSB TRIM RANGE
1404 F10a
Figure 10a. LTC1404 Full-Scale Adjust Circuit
ANALOG INPUT 4.096V
100k LTC1404 4.3k FULL-SCALE ADJUST 100k OFFSET ADJUST
100k
1404 F10b
Figure 10b. LTC1404 Offset Full-Scale Adjust Circuit
ANALOG INPUT ±2.048V
100k 4.3k FULL-SCALE ADJUST 100k 100k LTC1404
OFFSET ADJUST
1404 F10c
Figure 10c. LTC1404 Bipolar Offset Full-Scale Adjust Circuit
Bipolar Offset Full-Scale Error Adjustments Bipolar offset full-scale errors adjusted similar fashion unipolar case. Bipolar offset error adjustment achieved applying input voltage 0.5mV 0.5LSB) input Figure adjusting until output code flickers between 0000 0000 0000 1111 1111 1111. full-scale adjustment, input voltage 2.0465V 1.5LSBs) applied input adjusted until output code flickers between 0111 1111 1110 0111 1111 1111.
LTC1404
APPLICATIONS INFORMATION
BOARD LAYOUT BYPASSING obtain best performance from LTC1404, printed circuit board required. Layout printed circuit board should ensure that digital analog signal lines separated much possible. particular, care should taken digital traces alongside analog signal trace underneath ADC. analog input should screened GND. High quality 10µF surface mount capacitor with 0.1µF ceramic should used VCC, VREF pins. better results, another 10µF capacitor added pin. 600ksps, frequency high 9.6MHz. poor quality capacitor lose more than capacitance this frequency range. Therefore, important consult manufacturer's data sheet before capacitor used. LTC1404, 600ksps, every decision must determined within 104ns (9.6MHz). During this short time interval, supply disturbance transition needs settle. must update DAC, make comparator decision based sub-mV overdrive, latch information output serial data. This provides power supply, VCC, which connected both internal analog digital circuitry. ringing poor supply reference bypassing, inductive trace runs, CONV over- undershoot, unnecessary DOUT loading cause errors. Therefore, bypass capacitors must located close pins possible. traces connecting pins bypass capacitors must kept short should made wide possible. unipolar mode operation, must connected directly. Input signal leads signal return leads from (Pin should kept short possible minimize noise coupling. applications where this possible, shielded cable between analog input signal recommended. Also, potential difference grounds between analog signal appears error voltage series with analog input signal. Attention should paid reducing ground circuit impedance much possible. Figure shows recommended system ground connections. analog circuitry grounds should terminated LTC1404 pin. ground return from LTC1404 power supply should impedance noise free operation. Digital circuitry grounds must connected digital supply common. alternative, instead direct short between digital analog circuitry, ferrite bead jumper helps reduce digital noise.
ANALOG SUPPLY
DIGITAL SUPPLY
LTC1404
DIGITAL CIRCUITRY
1404
Figure Power Supply Connection
applications where data outputs control signals connected continuously active microprocessor bus, possible errors conversion results. These errors feedthrough from microprocessor successive approximation comparator. problem eliminated forcing microprocessor into Wait state during conversion using three-state buffers isolate data bus. Power-Down Mode Upon power-up, LTC1404 initialized active state ready conversion. However, chip easily placed into Sleep mode exercising right combination CONV signals. mode, power except internal reference, which still active provides 2.43V output voltage other circuitry. this mode, draws only 7.5mW power instead 75mW (for minimum power, logic
LTC1404
APPLICATIONS INFORMATION
inputs must within 500mV supply rails). Sleep mode, power consumption reduced minimum cutting power internal circuitry including reference. Figure illustrates power-down modes LTC1404. chip enters mode keeping signal pulsing CONV signal twice. Sleep mode operation, CONV signal should pulsed four times while kept low. Sleep modes activated falling edge CONV pulse. LTC1404 returns active mode easily. rising edge wakes LTC1404. From mode, wake-up occurs within 350ns. During transition from Sleep mode active mode, VREF voltage ramp-up time function loading conditions. With 10µF bypass capacitor, wake-up time from Sleep mode typically 2.5ms. REFRDY signal activated once reference settled ready conversion. This REFRDY sent DOUT first followed 12-bit data word (refer Figure 13). save power during wake-up from Sleep mode, chip designed enter mode automatically until reference ready. Once REFRDY goes high, comparator powers immediately ready conversion. During interval, attempt perform analog-to-digital conCLK CONV
SLEEP
VREF
REFRDY REFRDY Hi-Z DOUT NOTE: SLEEP INTERNAL SIGNALS. REFRDY APPEARS FIRST DOUT WORD Hi-Z Hi-Z ZERO REFRDY +12-BIT DATA WORD Hi-Z REFRDY
Figure Mode Sleep Mode Waveforms
version will result all-zero output code, including REFRDY bit. conversion attempted, DOUT remains high impedance state. wakes from Sleep mode, this determined monitoring state REFRDY DOUT pin. DIGITAL INTERFACE digital interface requires only three digital lines. CONV both inputs, DOUT output provides conversion result serial form. Figure shows digital timing diagram LTC1404 during conversion. CONV rising edge starts conversion. Once initiated, restarted until conversion completed. time from CONV signal rising edge less than digital output will delayed clock cycle. digital output data updated rising edge line. digital output data consists REFRDY followed valid 12-bit data word. DOUT data should captured receiving system rising edge. Data remains valid minimum time after rising edge allow capture occur.
REFRDY +12-BIT DATA WORD
1404
LTC1404
APPLICATIONS INFORMATION
CONV INTERNAL STATUS SAMPLE HOLD tACQ SAMPLE DOUT Hi-Z REFRDY Hi-Z REFRDY HOLD
Figure Digital Timing Diagram
Figure DOUT Delay
REFRDY 12-BIT DATA WORD tCONV tSAMPLE
1404
1404
LTC1404
TYPICAL APPLICATIONS
Hardware Interface TMS320C50's Serial Port (Frame Sync Generated from TFSX)
7.8MHz EXTERNAL CLOCK CONV LTC1404 VREF DOUT
1404 TA04a
10µF 0.1µF
Logic Analyzer Waveforms Show 2.05µs Throughput Rate (Input Voltage 1.606V, Output Code 0110 0100 0110 160610)
NOTE: TMS320C50-40MHz LIMITED SERIAL PORT CLOCK SPEED 7.8MHz. ALLOW LTC1404 MAXIMUM SPEED 9.6MHz, TMS320C50-57 TMS320C50-80MHz NEEDED
Data from LTC1404 Loaded into TMS320C50's TRCV Register
1404 TA04c
Data Stored TMS320C50's Memory Right Justified Format)
TMS320C50-40MHZ TCLKX TCLKR TFSX TFSR
UNIPOLAR INPUT
10µF 0.1µF
1404T A04B
1404 TA04d
LTC1404
TYPICAL APPLICATIONS
TMS320C50 Code Circuit
THIS PROGRAM DEMONSTRATES LTC1404 INTERFACE TMS320C50. FRAME SYNC PULSE GENERATED FROM TFSX. DATA SHIFT CLOCK EXTERNALLY GENERATED. *Initialization* .mmregs Initialized data memory zero 0F00h DATA0 .word DATA1 .word DATA2 .word DATA3 .word DATA4 .word DATA5 .word vector 080Ah rint RECEIVE xint TRANSMIT trnt TREC txnt TTRANX Setup reset vector 0A00h .entry START: Defines global symbolic names Initialize data zero Begin sample data location Location data sample data location Serial ports interrupts
*TMS320C50 Initialization* SETC Temporarily disable interrupts data page pointer zero #0834h, PMST PMST status control register LACC SAMM CWSR software wait state SAMM PDWSR *Configure Serial Port* SPLK #0028h, TSPC Serial Port Stand Alone mode DLB=0 loop back FO=0 Bits FSM=1 Burst Mode MCM=0 CLKR generated externally TXM=1 output serial port into reset (XRST=RRST=0) SPLK #00E8h, TSPC Take Serial Port reset (XRST=RRST=1) SPLK #0FFFFh, Clear pending interrupts
*Start Serial Communication* SACL TDXR Generate frame sync pulse SPLK #040h, Turn TRNT receiver interrupt CLRC Enable interrupt CLRC Unipolar input, right shift with sign extension Load auxiliary register pointer with seven AR7, #0F00h Load auxiliary register seven with #0F00h begin address data storage WAIT: Wait receive interrupt SACL TDXR Regenerate frame sync pulse WAIT main program *Receiver Interrupt Service Routine* TREC: LAMM TRCV Load data received from LTC1404 Shift right times #1FFFh, ANDed with #1FFFh converting data right justified format SACL Write data memory pointed increase memory address LACC #0F05h,0 Compare sample address #0F05h BCND END_TRCV, sample address exceeded jump END_TRCV SPLK #040h, Else Re-enable TRNT receive interrupt RETE Return main program enable interrupt *After Obtained Data from LTC1404, Program Jump END_TRCV* END_TRCV: SPLK #002h, Enable INT2 program halt CLRC INSUCCESS: SUCCESS *Fill Unused Interrupt with RETE, avoid program "lost"* TTRANX: RETE RECEIVE: RETE TRANSMIT: RETE INT2: halt Halts running
LTC1404
TYPICAL APPLICATIONS
LTC1404 Interface ADSP2181's SPORT0 (Frame Sync Generated from RFS0)
9.6MHz EXTERNAL CLOCK UNIPOLAR INPUT ADSP2181 SCLKO RFSO
10µF 0.1µF
Logic Analyzer Waveforms Show 1.67µs Throughput Rate (Input Voltage 1.604V, Output Code 0110 0100 0100 160410)
NOTE: WITHOUT EXTERNAL CLOCKING SIGNAL, ADSP2181 SCLK0 PROGRAMMED 8.3MHz
Data Stored ADSP2181's Memory (Normal Mode, SLEN
1404 TA05d
CONV LTC1404 VREF DOUT
10µF 0.1µF
1404 TA05a
1404 TA05b
Data from LTC1404 (Normal Mode)
1404 TA05c
LTC1404
TYPICAL APPLICATIONS
ADSP2181 Code Circuit
THIS PROGRAM DEMONSTRATES LTC1404 INTERFACE ADSP-2181. FRAME SYNC PULSE GENERATED FROM RFS. DATA SHIFT CLOCK EXTERNALLY GENERATED. /*Section Initialization*/ .module/ram/abs adspltc; /*define program module*/ jump start; /*jump over interrupt vectors*/ nop; nop; nop; rti; rti; rti; rti; /*code vectors here upon IRQ2 int*/ rti; rti; rti; rti; /*code vectors here upon IRQL1 int*/ rti; rti; rti; rti; /*code vectors here upon IRQL0 int*/ rti; rti; rti; rti; /*code vectors here upon SPORT0 int*/ rx0; /*Section (0x2000) ax0; /*begin SPORT0 receive interrupt*/ rti; /*end SPORT0 receive interrupt*/ rti; rti; rti; rti; /*code vectors here upon /IRQE int*/ rti; rti; rti; rti; /*code vectors here upon BDMA interrupt*/ rti; rti; rti; rti; /*code vectors here upon SPORT1 (IRQ1) int*/ rti; rti; rti; rti; /*code vectors here upon SPORT1 (IRQ0) int*/ rti; rti; rti; rti; /*code vectors here upon TIMER int*/ rti; rti; rti; rti; /*code vectors here upon POWER DOWN int*/ /*Section Configure SPORT0*/ start: /*to configure SPORT0 control reg*/ /*SPORT0 address 0X3FF6*/ /*RFS used frame sync generation*/ /*RFS internal, used*/ /*bit Slen*/ 1111*/ 1110*/ 1101*/ /*bit data type right justified zero filled MSB*/ /*bit INVRFS /*bit INVTFS /*bit IRFS=1 receive internal frame sync*/ /*bit 9,10,11 (don't care)*/ /*bit RFSW=0 receive Normal mode*/ /*bit RTFS=1 receive framed mode*/ /*bit ISCLK=0 SCLK external /*bit multichannel mode 0x2F0D; /*normal mode, 12=0*/ /*if alternate mode 12=1, ax0=0x3F0E*/ (0x3FF6) =ax0;
/*Section configure CLKDIV RFSDIV, setup interrupts*/ /*Using external clock source=9.6MHz*/ /*Does need configure CLKDIV*/ /*to Configure RFSDIV*/ /*set RFSDIV 15*/ /*=> frame sync pulse every SCLK*/ /*if frame sync pulse every SCLK, ax0=14*/ dm(0x3FF4) =ax0; /*to setup interrupt*/ ifc= 0x0066; /*clear extraneous SPORT interrupts*/ icntl= /*IRQXB level sensitivity*/ /*disable nesting interrupt*/ imask= 0x0020; /*bit timer /*bit SPORT1 IRQ0B /*bit SPORT1 IRQ1B /*bit BDMA /*bit IRQEB /*bit SPORT0 receive /*bit SPORT0 transmit /*bit IRQ2B /*enable SPORT0 receive interrupt*/ /*Section Configure System Control Register Start Communication*/ /*to configure system control reg*/ dm(0x3FFF); /*read system control reg*/ 0xFFF0; ay0; /*set wait state zero*/ 0x1000; ay0; /*bit enable SPORT0*/ dm(0x3FFF) /*frame sync pulse regenerated automatically*/ cntr 5000; waitloop until nop; nop; nop; nop; nop; nop; waitloop: nop; rts; .endmod;
LTC1404
TYPICAL APPLICATIONS
Quick Look Circuit Converting Data Parallel Format
10µF 0.1µF LTC1404 ANALOG INPUT 4.096V) CONV VREF DOUT CONV SRCLR
2.43V REFERENCE OUTPUT
10µF 0.1µF
3-WIRE SERIAL INTERFACE LINK
SRCK 74HC595 SRCLR
SRCK 74HC595
REFRDY
1404 TA03
LTC1404
PACKAGE DESCRIPTION
Dimensions inches (millimeters) unless otherwise noted.
Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC 05-08-1610)
0.189 0.197* (4.801 5.004)
0.228 0.244 (5.791 6.197)
0.150 0.157** (3.810 3.988)
0.010 0.020 (0.254 0.508) 0.008 0.010 (0.203 0.254) 0.053 0.069 (1.346 1.752)
0.004 0.010 (0.101 0.254)
0.016 0.050 0.406 1.270
0.014 0.019 (0.355 0.483)
0.050 (1.270)
*DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH SHALL EXCEED 0.006" (0.152mm) SIDE **DIMENSION DOES INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL EXCEED 0.010" (0.254mm) SIDE
0996
Information furnished Linear Technology Corporation believed accurate reliable. However, responsibility assumed use. Linear Technology Corporation makes representation that interconnection circuits described herein will infringe existing patent rights.
LTC1404
TYPICAL APPLICATIONS
LTC1404 Interface TMS320C50 Running 5MHz without External Clock
TMS320C50 TCLKX TCLKR TFSX TFSR
10µF 0.1µF
LTC1404 Interface ADSP2181 Running 8.3MHz without External Clock
ADSP2181 UNIPOLAR INPUT SCLKO (8.3MHz) RFSO
10µF 0.1µF
RELATED PARTS
12-Bit Parallel Output ADCs
PART NUMBER LTC1273/LTC1275/ LTC1276 LTC1274/LTC1277 LTC1278/LTC1279 LTC1282 LTC1409 LTC1410 DESCRIPTION Complete Sampling 12-Bit ADCs with 70dB SINAD Nyquist Power 12-Bit ADCs with Sleep Mode Shutdown High Speed Sampling 12-Bit ADCs with Shutdown Complete 12-Bit ADCs with 12mW Power Dissipation Power 12-Bit, 800ksps Sampling 12-Bit, 1.25Msps Sampling with Shutdown COMMENTS Lower Power Cost Effective fSAMPLE 300ksps Lowest Power (10mW) fSAMPLE 100ksps Cost Effective 12-Bit ADCs with Convert Start Input Best 300ksps fSAMPLE 600ksps Fully Specified Powered Applications, fSAMPLE 140ksps Best Dynamic Performance fSAMPLE 800ksps, 80mW Dissipation Best Dynamic Performance, SINAD Nyquist
12-Bit Serial Output ADCs
PART NUMBER LTC1285/LTC1288 LTC1286/LTC1298 LTC1290 LTC1296 LTC1400 LTC1401 5/±5V 5/±5V 5/±5V SAMPLE RATE 7.5/6.6ksps 12.5/11.1ksps 50ksps 46.5ksps 400ksps 200ksps POWER DISSIPATION 0.48mW 1.25mV 30mW 30mW 75mW 15mW DESCRIPTION Input, Micropower, SO-8 Input, Micropower, SO-8 Input, Full-Duplex Serial Input, Half-Duplex Serial I/O, Power Shutdown Output Complete 12-Bit, 400ksps, SO-8 with Shutdown Complete 12-Bit, 200ksps, SO-8 with Shutdown
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, 95035-7417q (408)432-1900 FAX: (408) 434-0507q TELEX: 499-3977 www.linear-tech.com
UNIPOLAR INPUT
CONV LTC1404 VREF DOUT
10µF 0.1µF
1404 TA07
CONV LTC1404 VREF DOUT
10µF 0.1µF
1404 TA06
1404f LT/TP 0398 PRINTED
LINEAR TECHNOLOGY CORPORATION 1998

®1404 complete 600ksps, 12-bit converter which draws only 75mW from su

Top Searches for this datasheet

Other recent searches