LH0024 LH0032 High Speed Applications INTRODUCTION LH0024 LH0032
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LH0024 LH0032 High Speed Applications
LH0024 LH0032 High Speed Applications
INTRODUCTION LH0024 LH0032 very high speed general purpose operational amplifiers exhibiting bandwidths slew rates settling time LH0032 added advantage input characteristics Both however drive loads with peak currents milliamperes (mA) amps stable without external compensation when operating closedloop gains more than Both constructed with thick film hybrid technology actively trimmed consistent device performance Table summarizes typical performance data these amps Additional information obtained from respective data sheets This note divided into three parts with first giving general description circuit topology each following section several high performance applications discussed Finally last section consolidates application techniques into integral design approach much which applicable high frequency circuit LH0024 CIRCUIT DESCRIPTION LH0024 contains gain stages differential pair other single-ended stage complete schematic shown Figure input stage differential pair biased current source made First stage differential voltage gain typically output applied differentially from base emitter second stage transistor which gain about This stage also converts differential signal single-ended output Current source provide bias current high impedance load Overall amplifier gain product gains stages 1700
National Semiconductor Application Note January 1982
output complementary pair with class bias provides impedance sourcing sinking output drive Although class bias contributes small amount cross-over distortion barely detectable closed loop operation LH0032 CIRCUIT DESCRIPTION LH0032 general purpose operational amplifier similar LH0024 with JFET input devices instead bipolar result LH0032 input bias offset currents three orders magnitude lower than LH0024 output drive capability improved larger package with lower thermal resistance class output which normally biased virtually eliminates cross-over distortion improved performance part incorporation monolithic dual junction FETs input stage LH0032 providing matched tracking good
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FIGURE Complete LH0024 Schematic Diagram
TABLE Typical Performance Characteristics Parameter Input Offset Voltage Input Bias Current Large Signal Voltage Gain Slew Rate Small Signal Rise Time Settling Time Final Value Settling Time Final Value Unity Gain Bandwidth Conditions LH0024 LH0032 Units
VOUT DVIN DVIN DVIN (uncompensated)
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C1995 National Semiconductor Corporation
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RRD-B30M115 Printed
common-mode input characteristics First stage operating current current source made transistors resistors shown Figure first stage voltage gain (1st stage) Where mmho (re3 2R3) second stage consists identical pairs differential transistors cascode configuration Each side operates emitter resistor bias first stage differential amplifier feeds common-base pair with base voltage fixed volts diode string Q13-A15 Thus collectors differential pair held drop more positive than reference voltage signal amplified differential stage produces only very small change collector voltage Consequently Miller effect (base-to-collector capacitances) virtually eliminated Using hybrid model transistor voltage gain cascode stage approximated (2nd stage)
Where
026V (b11 (RL) hob6 hoe10
Notice that full differential gain realized with current mirror which also provides high active load resistance cascoded pair resulting high amplifier gain collector output cascode stage buffered pair complementary emitter follower transistors This class output stage normally biased voltage produced emitter degeneration resistors provide protection from thermal runaway APPLICATIONS LH0024 LH0032 Applications high speed LH0024 LH0032 range from video amplifiers sampling circuits applications described below include high speed sample hold circuits photo-detector amplifiers fast settling digital analog converters buffered amplifiers
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FIGURE Complete LH0032 Schematic Diagram
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FIGURE High Speed Sample Hold Circuit
High Speed Circuit High Speed sample-and-hold circuits require high slew rate fast settling amplifiers LH0032 ideal these applications example shown Figure complementary emitter-follower sources sinks large peak current rapidly charge discharge hold capacitor during step changes thus effectively buffering switch whose rD(ON) would otherwise slow charge time LH0033 FET-input amplifier buffers output signal providing drive capability circuit exhibits acquisition time accuracy droop rate only ambient condition even faster acquisition time obtained using smaller value hold-capacitor decreasing value from 1000 acquisition time improves step However droop rate increases Fiber Optic Transmitter-Receiver Applications Many fiber optic applications require analog drivers receivers operating megahertz region where many socalled wide-band amps simply steam Packed with gain-bandwidth product (unity gain compensated) LH0032 quite suitable optical communication applications Figure demonstrates complete analog transmission system using this device transmitter incorporates LF356 drive light emitter normally biased operating current input capacitively coupled ranges from modulating current from
circuit easily modified operate from single power supply only requirement that amplifier must biased within input common mode range receiver circuit uses LH0032 configured transimpedance amplifier photodiode with watt responsivity such Hewlett-Packard type HP50824220 generates signal receiver output light input Expectedly bandwidth entire optical link rests receiver circuit Therefore response time optimized should reverse bias photodiode minimize junction capacitance result rise time improves more than orders magnitude Next feedback resistor value should chosen large possible order maximize sensitivity within limits allowable bandwidth degradation Using feedback resistor maximum system bandwidth Fast Settling 12-BIT Converter high resolution fast-settling constructed using LH0032 input bias current causes significant error conversion accuracy Great care must exercised circuit layout assure highest performance single point analog ground should used with digital ground separated complete circuit with 12-bit resolution shown Figure converter typically settles full-scale swing Similarly 10-bit 8-bit resolution DACs constructed using DAC1020 DAC0808 respectively
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FIGURE Fiber Optic Link
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FIGURE Fast Settling
Buffered Amplifier Whenever higher output current required buffer amplifier added loop shown Figure LH0033 boosts output drive capability continuous peak
DESIGN CONSIDERATIONS Optimizing LH0024 Performance LH0024 LH0032 allow considerable flexibility designing high performance circuits care taken they used implemented Indeed printed circuit board layout high frequency circuits important design hybrid devices themselves good practice ground plane board design provides resistance inductance path reduces stray signal coupling sensitive circuitry double-sided ground plane usually better should considered addition signal trace connections should kept short wide possible Avoid closely-spaced parallel signal traces signal cross-coupling occur Circuit elements should placed close amplifier particularly critical components that directly affect amplifier's frequency response such compensation capacitors possible should maintain single point ground throughout circuit minimize signal phase delay Examples single-sided layouts LH0024 LH0032 shown Figure Figure respectively layouts include settling time test circuit optional inverting noninverting mode Note that summing junction side feedback resistor kept very close device thus minimizing lead capacitance power supply decoupling capacitors should also kept close device pins preferably inch Input Guarding Bootstrapping applications where input leakage currents important trace guarding such used sample hold circuits improve performance additional cost
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FIGURE Wide Band Amplifier with Output Capability Despite bandwidth LH0033 introduces about degrees phase LH0032 unity-gain frequency result phase margin degraded same amount Slight overcompensation required order restore adequate phase margin increase feedback capacitor from slightly larger value should sufficient load predominantly capacitive total phase shift buffer stage exceed appear negative impedance seen looking into input buffer resistor restores some real resistance alleviate this condition prevents potential oscillation cases where load capacitance relatively large 100X necessary compensate
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FIGURE Single-Sided Sample Layout LH0024
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FIGURE Single-Sided Sample Layout LH0032 guard conductor serves intercept leakage currents from inputs surrounding circuit most effective when driven same potential guarded circuit Figures show technique implemented inverting non-inverting configurations respectively other benefit input guarding reduction input stray capacitance effects comprehensive discussion this technique described Application Note AN-63 Input Capacitance Cancellation intrinsic input capacitance amplifier cannot totally eliminated input guarding technique This input capacitance introduces pole amplifier response frequency given 2qRS This pole become extremely important example (typical input capacitance LH0024 LH0032) with 500X effective source resistance creates pole about well before amplifier's natural frequency response rolls unity gain closed-loop gain unity more than total phase introduced even before crossover frequency reached will destroy phase margin Oscillation certain occur solution cancel effect shown Figure lead capacitor across feedback resistor used introduce zero loop response such that exactly cancels pole caused input network
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FIGURE Guarding Inverting Figure Amplifier
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FIGURE Compensating Amplifier Input Capacitance
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FIGURE Guarding Non-Inverting Unity Gain Amplifier
Ideally ratio input capacitance lead capacitor should equal closed-loop gain amplifier Under this condition exact pole-zero cancellation realized Note that Equation dictates source resistance values less than circuits operating near unity gain keep greater than Frequency Compensation High-performance wideband amps such LH0024 LH0032 require external frequency compensation depending closed-loop gain Optimum performance will affected given circuit layout Several compensation techniques recommended best should selected according particular application Each discussed following sections Compensating LH0024 Table provides guide compensate LH0024 several values closed-loop gain Figure shows basic scheme
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FIGURE Input Compensation Circuit Compensating LH0032 With LH0032 compensation schemes used depending designer's specific needs first technique shown Figure offers best settling time square wave input compensation capacitors should selected from Figure various closed-loop gains Figure shows LH0032 frequency response modified different value compensation capacitors Although this approach offers shortest settling time falling edge exhibits overshoot lasting Figure shows typical pulse response
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FIGURE LH0024 Frequency Compensation Circuit When operating with closed-loop gain required need slight adjustment completely cancel input capacitance device typically TABLE Closed-Loop Gain
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FIGURE LH0032 Frequency Compensation Circuit
alternate technique compensation closed-loop gain input compensation network shown Figure With resistor values circuit should respectively difficulty using this compensation involved calculation experimenting required order find optimum values resistors other than used when above values longer valid must redetermined this reason optimum compensation almost always determined empirically were values given
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FIGURE Recommended Value Compensation Capacitor Closed-Loop Gain Optimum Settling Time
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FIGURE Effect Various Compensation Capacitors LH0032 Open Loop Frequency Response
FIGURE Recommended Value Compensation Capacitor Closed-Loop Gain Optimum Slew Rate
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FIGURE LH0032 Unity Gain Non-Inverting Large Signal Pulse Response obtaining minimum ringing falling edge primary objective slight modification above recommended based same circuit that Figure values unity gain compensation capacitors should modified 1000 respectively Figure shows suitable capacitance various closed-loop gains resulting unity gain pulse response waveform shown Figure settling time final value actually superior first method compensation However LH0032 suffers slow settling thereafter accuracy falling edge nearly four times much rising edge compared previous scheme Note however that falling edge ringing considerably reduced Furthermore slew rate consistently superior using this compensation because smaller value Miller capacitance required Typical improvement much more detailed discussion this effect provided Slew Response section this Application Note second compensation scheme works well with both inverting non-inverting modes Figure shows circuit
FIGURE LH0032 Unity Gain Non-Inverting Large Signal Pulse Response 1000 schematic which 270X resistor capacitor shunted across inputs device This compensation introduces zero loop modifying response such that adequate phase margin preserved unity gain crossover frequency Note that circuit requires additional compensation
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FIGURE LH0032 Non-Compensated Unity Gain Compensation
Output Drive Capability LH0024 LH0032 amps designed deliver exceed peak output current durations under duty cycles under output drive capability these amps limited primarily device power dissipation Figure shows maximum drive capabilities under various conditions These limits should observed Furthermore open loop gain decreases slightly result increased output loading this reason continuous output current should kept under LH0024
Power Dissipation simple design rule that often bent broken that relating power dissipation limits LH0024 LH0032 shown Figure Under circumstances should these guidelines exceeded within temperature range specified total power dissipation easily calculated from following equation PTotal POut Where quiescent power given supply voltage current specified data sheet POut drive power dissipated device output stage computed collector-emitter voltage output transistor times load current Determining power dissipation when driving capacitive load more involved peak power required charge discharge load capacitor (DV)2 PPeak Where change voltage across IPeak charging time into Over full charge discharge cycle power directly roportional frequency input pulse waveform pulse repetition frequency increases does power dissipation LH0024
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LH0032
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FIGURE Continuous Output Drive Capability Capacitive Load Compensation Capacitive loads cause increased phase shifts such that phase margin decreases toward unstable state oscillating result cure overcompensate isolate load with series resistor (100 200X) shown Figure example unterminated coaxial cable presents capacitive load Slight overcompensation required maintain stability LH0032
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FIGURE Maximum Power Dissipation
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FIGURE Output Protection when Driving Capacitive Load
Short Circuit Protection Since LH0024 LH0032 have internal short circuit protection their relatively high drive capability sustain current levels sufficient destroy devices high frequency oscillation induced This occur with large capacitance load design protection current limiting resistor should inserted output amplifier inside feedback loop shown Figure value determined from following equation power supply voltage Where Heat Sinking Considerations Under severe environmental electrical operating conditions thermal resistance heat sink should used assure safe operation following list heat sinks from various sources recommended TO-8 case style Thermalloy 2240A Wakefield 215CB IERC UP-TO 8-48CB Heat sinks TO-5 case style readily available from many manufacturers reasonably priced clip-on unit from Thermalloy Model 2228B offers modest thermal resistance Case Grounding Grounding case device offers improved immunity from circuit cross-talk compromises additional stray capacitance every device (usually rare situation where case grounding required slight recompensation necessary However most applications demanding enough warrant There several ways strap ground case LH0032 best approach solder small metal washer small piece wire between base device metal base unassigned lead post Dedicating LH0032 this purpose recommended although other ``no connection'' acceptable High temperature solder should used avoid solder reflow during normal assembly operations LH0024 unused pins available thus readily adaptable case strapping alternative approach electrically conductive heatsink with board-mountable option such Thermalloy type 2230C-5 uses case grounding lookout groundinduced noise into signal path short sure ground quiet ground Power Supply Bypass Power supply pins must bypassed cases prevent oscillation disc monolithic ceramic capacitor each supply ground adequate capacitors should placed more than inch from device pins
Adjustment Offset Voltages When required offset voltage operational amplifiers nulled using balance potentiometer shown Figure 100X series resistors prevent adverse oscillation malfunction when shorted either adjustment range
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FIGURE Offset Voltage Adjustment Slew Response Improvement Slew rate internally limited maximum rate rise fall maximum amplifier output swing when driven large signal step input primarily limited operating current input stage When overdriven step fuction input stage operating current charges discharges effective circuit capacitance second stage rate charge Input Stage CNode case LH0032 where Miller Compensation used external capacitance adds internal circuit capacitance resulting reduced slew rate Figure illustrates this effect function capacitance value
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FIGURE LH0032 Slew Rate Frequency Compensation Capacitance
Figures demonstrate rising falling slew capabilities LH0024 LH0032 Notice improved slew rate peformance LH0032 using alternative compensation technique Figure compared Figure difference smaller Miller capacitance used former LH0024 does Miller Compensation slew rate compromised Consequently large signal frequency response significantly higher than that LH0032
Finally power supply voltage affects slew rate voltage decreases input stage operating current decreases accordingly effect reduction slew rate available charging current drops Figure shows typical slew response each function supply voltage
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FIGURE LH0024 Slew Response Unity Gain Inverting Mode
FIGURE LH0032 Slew Response Unity Gain Inverting Mode Standard Compensation
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FIGURE LH0032 Slew Response Unity Gain Inverting Mode Improved Compensation 1000 LH0024 LH0032
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FIGURE Slew Rate Response Function Supply Voltages
Settling Time Settling time time between start step input time takes output settle within specified error band final voltage This parameter heavily influenced frequency compensation amplifier (degree damping) Undercompensation results excessive phase shift overshoot ringing therefore long settling time Equally poor performance results from overcompensation which yields overdamped system slow decay again long settling time Expectedly settling time affected loop gain amplifier Figure illustrates this effect these devices most demanding applications driving capacitive load circuit such high speed sample-and-hold where accuracy fast settling time both important Because additional phase shift introduced driving sampling capacitor LH0032 must recompensated Figure presents optimum compensation obtain fastest settling time under these conditions CONCLUSION first glance LH0024 LH0032 seem harmless enough more in-depth look reveals challenges apLH0024
plying these high performance amps ultimate capabilities that extracted direct function careful engineering With prudence these devices harmless indeed Application these high performance amplifiers requires understanding compensation layout technique With information presented this note designer should able enjoy benefits their superior capabilities REFERENCES National Semiconductor Special Functions Databook Underwood ``New Design Techniques Amps'' National Semiconductor AN-63 March 1972 Wong Sherwin ``Applications Wide-Band Buffer Amplifiers'' National Semiconductor AN-227 October 1979 ``LH0082 Optical Communication Receiver'' Data Sheet National Semiconductor Corp Miller ``Introduction Practical Fiber Optics'' National Semiconductor AN-244 1980
LH0032
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FIGURE Settling Time Closed-Loop Gain
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FIGURE Frequency Compensation Load Capacitance
LH0024 LH0032 High Speed Applications
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