CMOS Converters Match Most Microprocessors With double buffering

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

CMOS Converters Match Most Microprocessors With double buffering

Datasheet Thumbnail

Top Searches for this datasheet

CMOS Converters Match Most Microprocessors
CMOS Converters Match Most Microprocessors
With double buffering 10-bit multiplying units useful microprocessor control gain attenuation family complementary multiplying digital-toanalog converters arrived scene promises make microprocessor interfacing truly universal double-buffered MICRO-DACunits eliminate many common problems bridging host applications that include microprocessor-controlled gain attenuation multiplication proliferation microprocessor electronic circuits brought with equal proliferation microprocessorcompatible converters Many these converters however have shortcomings that they often require additional external components truly microprocessor-compatible Furthermore depending converter's resolution data format designer sometimes forced adopt additional interfacing circuitry total microprocessor compatibility Transient output voltage errors occur during updating 10-bit converter from 8-bit microprocessor when words transferred converter Left-justified (fractional binary) right-justified (positionally weighted binary) converter data formats require different interfacing schemes these problems must considered interfacing microprocessor unit
LEVELS BUFFERING MICRO-DAC family multiplying converters consists 10-bit accurate units designed interface directly with 8080 8048 8085 Z-80 other popular
National Semiconductor Application Note James Cecil July 1981
microprocessors converters appear microprocessor memory location input output port require interfacing logic Each levels input buffers input latch register (Figure converter's register holds digital data undergoing conversion while input latch kept busy acquiring input data digital input data used update converter double buffering feature allows bits microprocessor data assembled from data bytes also prevents analog output from changing while digital input word updated Even when used with 16-bit microprocessors double buffering feature necessary simultaneous updating many converters Double buffering establishes proper conditions next test lets system parameters same time groups MICRO-DAC converters available DAC1000 DAC1001 DAC1002 24-pin units with 8-bit accuracy levels respectively Each contains necessary logic functions interfacing with rightjustified left-justified microprocessor data DAC1006 DAC1007 DAC1008 20-pin units designed left-justified data accuracy levels bits respectively members this family multiplying converters feature standard chip select (CS) write (WR) microprocessor control signals Data microprocessor written into converter standard write cycle
8715
AN-275
FIGURE Double buffered MICRO-DAC family 10-bit digital-to-analog converters levels input buffers input latch register They designed interface with 8080- 8048 8085 Z-80 other popular microprocessors with interfacing logic
MICRO-DACand BI-FETare trademarks National Semiconductor Corp C1995 National Semiconductor Corporation
8715
RRD-B30M115 Printed
HANDLING DIFFERENT DATA FORMATS Different data formats exist many converter products which must readily handled when interfacing with microprocessor Left-justified (fractional number VREF) right-justified (positional number VREF 024) main ones Initially converter manufacturers favored left-justified approach which most significant labeled Newer converters have changed rightjustified approach match data format microprocessor data buses Nevertheless left-justified approach still widely used previously mentioned MICRO-DAC family readily handle left- right-justified data formats with additional interfacing circuitry When MICRO-DAC converter uses either 8-bit (two write cycles) 16-bit (one write cycle) data locations converter's input latch enabled first write cycle from microprocessor Depending data format next write cycle used overwrites locations proper data rate Digital data transferred from input latch register internally three ways automatically when second write byte occurs through microprocessor control which allows updating several converters this necessary through external strobe converter's CMOS logic levels made compatible with those special biasing circuit that uses parasitic bipolar transistor available CMOS chip bipolar transistor supplies base-emitter voltage (VBE) that acts reference converter's digital inputs supplies input threshold voltage that same amplitude that devices Details biasing circuit shown Figure Note that reference N-channel field-effect transistor tied feedback loop have gate voltage biased level VTHN causing conduct shown drain circuit three transistors loop voltage VTHN output emitter-follower causes loss thus producing voltage reference
VTHN logic input circuits Each input stages FETs like whose source digital input applied whose geometry same that Like also current feeding drain When logic input voltage equals conducts thereby pulling input standard CMOS inverter level This threshold continues independent converter's supply voltage logic threshold voltage standard gates ACHIEVING HIGH ACCURACY design MICRO-DAC's resistor network simple even though provides high levels converter accuracy Figure shows current switching inverted R-2R ladder used which consists passive components operation ladder network requires that legs connect ground level This means that external operational amplifier shown must have minimal offset voltage Only offset voltage introduce linearity error into converter's operation Operational amplifiers like National's LM308A series available with offset voltages they require zero adjustments When zero adjustment operational amplifier's offset voltage required resistor temporarily switched between converter's IOUT terminal (which tied amplifier's negative input terminal) ground balancing resistance should used operational amplifier's grounded positive input terminal since create errors operational amplifier BI-FET LF356 (made with bipolar field-effect transistors) input bias current which makes ideal choice current-to-voltage converter amplifier's offset voltage should adjusted with digital input zeros force IOUT converter zero current level manually switched-in resistor provides gain about offset voltage makes zeroing easier sense converter chip provides feedback resistor good initial matching well tracking over temperature
VTHRESHOLD
8715
FIGURE Threshold This basic logic threshold loop provides biasing MICRO-DAC family converters interface with voltage levels This circuit uses parasitic bipolar structure which delivers input threshold biasing circuit
LOOKING INSIDE examination internal details single-pole double-throw current-mode switches employed converters shows that N-channel FETs' gates driven from converter's supply voltage contrast supply level reduces FETs' on-resistances thereby improves converter's performance MICRO-DAC converters relatively stable gain linearity during variations supply voltage example drop supply voltage down results gain error only Even smaller change linearity error same supply voltage swing just 005%
usefulness converter determined magnitude linearity errors resulting from changes reference voltage applications like multiplication that require small values reference voltage small linearity errors essential case MICRO-DAC converters reducing reference voltage from results worst-case linearity error change approximately 005%
Figure shows typical application MICRO-DAC unipolar voltage output device This circuit inverts negative reference voltage positive output with maximum value reference voltage multiplied VREF BI-FET operational amplifier used LF356 that slews settles within
8715
FIGURE Ladder current-switching current-mode R-2R resistor ladder MICRO-DAC family converters simple provides high levels converter accuracy external operational amplifier chosen minimal offset voltage least converter linearity error
VOUT
8715
FIGURE Unipolar typical unipolar application MICRO-DAC converter inverts negative reference voltage positive positive output negative reference voltage multiplied output amplifier slews within
Operating MICRO-DAC's R-2R resistor ladder voltage switching mode shown Figure gives faster slewing settling time ladder being used backwards reference voltage that derived from LM336 reference diode applied IOUT output voltage produced converter's where reference voltage previously located Figure This output voltage ranges from 024) VDC) LF356 operational amplifier used supplies gain little more than overall output voltage ranging from less than VDC) compensating diodes ends full-scale adjustment potentiometer LM336 reference improve temperature stability reference voltage bipolar output voltage circuit Figure used bipolar output voltage results from adding subtracting reference voltage from converter's output voltage
output operational amplifier ranges from VREF VDC) This voltage then applied operational amplifier where gain doubles voltage range offset voltage output operational amplifier provided adding converter's reference voltage amplifier's input Resistors circuit operational amplifier must stay matched even during temperature changes circuit Figure order work properly bipolar converter Figure adjusted first entering digital code composed zeros into converter Next offset potentiometer operational amplifier adjusted zero amplifier output voltage then offset potentiometer operational amplifier adjusted amplifier output voltage Finally digital code applied 500X potentiometer series with converter adjusted output voltage This voltage VREF where VREF
VOUT
8715
FIGURE Voltage mode Operating MICRO-DAC converter's resistor ladder voltage-switching mode provides faster slewing settling time than that Figure Note that converter's R-2R ladder being used backwards
VOUT
8715
FIGURE Bipolar adding subtracting MICRO-DAC converter's reference voltage from output voltage bipolar output results this circuit work properly however resistors circuit must stay matched during temperature changes
VOUT Where digital input (expressed fractional binary number)
8715
FIGURE Control MICRO-DAC converter used microprocessor control amplifier circuit Since converter 4-quadrant multiplication capability signals handler feedback resistors referred shown converter USING MICROPROCESSOR CONTROL MICRO-DAC multiplying converter used microprocessor-controlled amplifier circuit feedback element amplifier (Figure Since converter 4-quadrant multiplication capability both signals handled feedback resistor (not shown) internal converter's chip converter Figure automatically provides output voltage that causes current from converter's IOUT terminal VREF terminal equal input current VINRfB Note that when microprocessor provides data converter with relatively large value reference voltage needed balance input current This value corresponds maximum gain minimum gain obtained converter digital input gain steps provided addition another amplifier converter's IOUT produces microprocessor-controlled amplifier attenuator Compared with gain circuit that appears Figure gain here noninverted ranges from POINT BEST-STRAIGHT-LINE maximize their product yields manufacturers digitalto-analog converters like best-straight-line linearity guarantee Unfortunately this method based iteration zero full-scale converter adjustments that errors optimally split equidistant from straight line converter user best-straight-line specification means that converter must undergo sophisticated adjustment procedure linearity proven Furthermore each converter different best-straight-line making necessary adjust every them individually Another specify converter linearity end-point method current output converter offset voltage current-to-voltage output amplifier first adjusted output Then converter adjusted with full-scale input digital code produce full-scale output voltage This simple technique ensures that each 10-bit unit's steps within stated linearity specification Further pretrimmed output amplifier used eliminate zero offset adjustment leaving only full-scale adjustment differences between best-straight-line endpoint specification techniques shown illustration (below) where converter with error least significant shown failing end-point linearity test Note that readjusting converter's full-scale output converter's error optimally split either side ideal line best-straight-line which time-consuming procedure particularly when done large number individual converters many application where converter already mounted printed circuit board end-point adjustment zero full-scale much less time-consuming Furthermore this end-point procedure more stringent guarantee converter linearity than best-straight-line approach end-point method used converters MICRODAC family
8715
CMOS Converters Match Most Microprocessors
LIFE SUPPORT POLICY NATIONAL'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT NATIONAL SEMICONDUCTOR CORPORATION used herein Life support devices systems devices systems which intended surgical implant into body support sustain life whose failure perform when properly used accordance with instructions provided labeling reasonably expected result significant injury user critical component component life support device system whose failure perform reasonably expected cause failure life support device system affect safety effectiveness
AN-275
National Semiconductor Corporation 1111 West Bardin Road Arlington 76017 1(800) 272-9959 1(800) 737-7018
National Semiconductor Europe (a49) 0-180-530 Email cnjwge tevm2 Deutsch (a49) 0-180-530 English (a49) 0-180-532 Fran (a49) 0-180-532 Italiano (a49) 0-180-534
National Semiconductor Hong Kong 13th Floor Straight Block Ocean Centre Canton Tsimshatsui Kowloon Hong Kong (852) 2737-1600 (852) 2736-9960
National Semiconductor Japan 81-043-299-2309 81-043-299-2408
National does assume responsibility circuitry described circuit patent licenses implied National reserves right time without notice change said circuitry specifications

CMOS Converters Match Most Microprocessors With double buffering

Top Searches for this datasheet

Other recent searches