This document details limitations cascading option AD73360 current sil
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AD73360 Rev. Errata Document
This document details limitations cascading option AD73360 current silicon. Analog Devices Inc. committed, through future silicon revisions continuously improve silicon functionality. Analog Devices Inc. will best endeavors ensure that these future silicon revisions remain compatible with your present software/systems implementing recommended work-arounds outlined this document.
Background
AD73360 option being cascaded allowing additional analog input channels easily added required. present silicon there limitations many devices cascaded together also dependent sample rate serial clock rate used.
Issue Description
When number AD73360s cascaded together they each output channel data time-division multiplexed (TDM) format. cascade devices with channels enabled output sequence read Micro-controller would Device Channel Device Channel Device Channel
Device Channel Device Channel Device Channel Device Channel Device Channel6 Device Channel
each device programmed with number devices cascade should therefore allow sufficient SCLKs other devices transmit result channel before starting transmit next. example cascade devices, Device will transmit Channel result Device SCLK cycles. same time Device transmitting Channel result Microcontroller. Device will then allow SCLKs, when does transmit anything, allowing Device transmit Channel data from Device DSP. additional SCLK cycle added allow next channels data begin being transmitted falling edge SDOFS pulse. Figure shows timing device cascade.
Figure Cascade Timing Two-Device Cascade
cascades more than devices AD73360 will leave many SCLKs between transmitting channel information. This increases time takes transmit data since microcontroller must read data from ADCs cascade sample period number devices which cascaded will limited. Figure shows effect additional SCLKs have cascade three devices. Rev.A 6-2000
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Analog Devices. Technology Way, 9106, Norwood, 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Site: http://www.analog.com Fax: 781/326-8703 Analog Devices, Inc., 2000
ERRATA DOCUMENT
AD73360 Rev.1
SCLK SDOFS
vice vice vice vice
Figure Cascade Timing Three-Device Cascade
Choosing SCLK rate Sample Period
cascade given length, SCLK rate Sample Period will determine cascade used successfully. sample rate will allow more time data read. Similarly high SCLK rate will transmit data shorter time. Since both SCLK rate Sample Rate derived from same DMCLK number combinations limited. most applications will require predetermined sample rate, SCLK speed will limitating factor cascade length that used. Table shows maximum cascade length given SCLK Sample Rate. table assumes that MCLK 16.384MHz used.
Table Maximum Cascade Length with Various SCLK Sample Rates
SCLK (MHz) 16.384
Max. Number Devices
8.192
Sample Rate (KHz)
4.096
2.048
REV.A
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