Added Chip Select Output Controls IDT7198S IDT7198L Integrat

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Added Chip Select Output Controls IDT7198S IDT7198L Integrat

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CMOS STATIC RAMs (16K 4-BIT)
Added Chip Select Output Controls
IDT7198S IDT7198L
Integrated Device Technology, Inc.
FEATURES:
Fast Output Enable (OE) available added system flexibility Multiple Chip Selects (CS1, CS2) simplify system design operation High speed (equal access cycle times) Military: 20/25/35/45/55/70/85ns (max.) power consumption Battery back-up operation-2V data retention version only) 24-pin CERDIP, high-density 28-pin leadless chip carrier, 24-pin CERPACK packaging available Produced with advanced CMOS technology Bidirectional data inputs outputs Inputs/outputs TTL-compatible Military product compliant MIL-STD-883, Class
DESCRIPTION:
IDT7198 65,536 high-speed static orga-
nized fabricated using IDT's high-performance, high-reliability technology-CMOS. This state-of-theart technology, combined with innovative circuit design techniques, provides cost effective approach memory intensive applications. Access times fast 20ns available. IDT7198 offers reduced power standby mode, ISB1, which activated when goes HIGH. This capability decreases power, while enhancing system reliability. low-power version also offers battery backup data retention capability where circuit typically consumes only 30µW when operating from battery. inputs outputs TTL-compatible operate from single supply. lDT7198 packaged either 24-pin ceramic DlP, 28-pin leadless chip carrier, 24-pin CERPACK. Military grade product manufactured compliance with latest revision MIL-STD-883, Class making ideally suited military temperature applications demanding highest level performance reliability.
FUNCTIONAL BLOCK DIAGRAM
DECODER 65,536-BIT MEMORY ARRAY
I/O0 I/O1 I/O2 I/O3
COLUMN INPUT DATA CONTROL
2985
logo registered trademark Integrated Device Technology, Inc.
MILITARY TEMPERATURE RANGE
©1994 Integrated Device Technology, Inc.
1994
DSC-1027/4
IDT7198S/L CMOS STATIC (16K 4-BIT) Added Chip Select Output Enable Controls
MILITARY TEMPERATURE RANGE
MEMORY CONTROL
IDT7198 high-speed CMOS static incorporates additional memory control features extra chip select output enable pin) which offer additional benefits many system memory applications. Both chip selects, Chip Select (CS1) Chip Select (CS2), must select memory. either chip select pulled HIGH, memory will deselected remain standby mode. This dual chip select feature (CS1, CS2) also brings convenience improved system speeds large memory designer reducing external logic required perform decoding.
DESCRIPTIONS
Name A0-A13
Description Address Inputs Chip Select Chip Select Write Enable Output Enable Data Power Ground
2985
I/O0-I/O3
CONFIGURATIONS
TRUTH TABLE(1)
Mode
High-Z High-Z DOUT High-Z
Power Standby Standby Active Active Active
2985
D24-1 E24-1
Standby Standby Read Write Read
NOTE: VIH, VIL, don't care.
2985
DIP/SOJ/CERPACK VIEW
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM Rating Terminal Voltage with Respect Operating Temperature Temperature Under Bias Storage Temperature Power Dissipation Output Current Mil. -0.5 +7.0 +125 +135 +150 Unit
INDEX
TBIAS TSTG
L28-2
I/O3 I/O2 I/O1
2985
IOUT
NOTE: 2985 Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability.
VIEW
IDT7198S/L CMOS STATIC RAMS (16K 4-BIT) Added Chip Select Output Enable Controls
MILITARY TEMPERATURE RANGE
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Supply Voltage Supply Voltage Input High Voltage Input Voltage Min. -0.5(1) Typ. Max. Unit
RECOMMENDED OPERATING TEMPERATURE SUPPLY VOLTAGE
Grade Military Ambient Temperature -55°C +125°C
2985
CAPACITANCE +25°C, 1.0MHz,
Symbol CI/O Parameter(1) Input Capacitance Capacitance Conditions VOUT Max. Unit
NOTE: 2985 (min.) -3.0V pulse width less than 20ns, once cycle.
NOTE: 2985 This parameter determined device characterization, production tested.
ELECTRICAL CHARACTERISTICS
5.0V 10%, Military Temperature Range Only
IDT7198S Symbol |ILI| |ILO| Parameter Input Leakage Current Output Leakage Current Output Voltage Test Condition Max., Max., VIH, VOUT 10mA, Min. 8mA, Min. Output High Voltage -4mA, Min. Min. Max. IDT7198L Min. Max.
2985
Unit
TEST CONDITIONS
Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Test Load 3.0V 1.5V 1.5V Figures
2985
DATA 30pF*
DATA 5pF*
2985
2985
Figure Test Load
Figure Test Load (for tCLZ1, tOLZ, tCHZ1, tOHZ, tWHZ) *Includes scope capacitances
IDT7198S/L CMOS STATIC (16K 4-BIT) Added Chip Select Output Enable Controls
MILITARY TEMPERATURE RANGE
ELECTRICAL CHARACTERISTICS(1)
(VCC 10%, 0.2V, 0.2V)
7198S20 7198L20 Symbol ICC1 Parameter Operating Power Supply Current, VIL, Outputs Open Max., 0(2) Dynamic Operating Current, VIL, Outputs Open Max., fMAX(2) Standby Power Supply Current (TTL Level), VIH, Max., Outputs Open, fMAX(2) Full Standby Power Supply Current (CMOS Level) VCC= Max., VLC, 0(2) Power Military 7198S25 7198L25 Military 7198S35 7198L35 Military 7198S45 7198S55/70 7198S85 7198L45 7198L55/70 7198L85 Military Military Military Unit
ICC2
ISB1
2985
NOTES: values maximum guaranteed values. fMAX address data inputs cycling maximum frequency read cycles 1/tRC. means input lines change.
DATA RETENTION CHARACTERISTICS OVER MILITARY TEMPERATURE RANGE
Version Only) 0.2V, 0.2V
Typ. Symbol ICCDR tCDR(3) tR(3) |ILI|
Max. 2.0V 3.0V Unit
2985
Parameter Data Retention Data Retention Current Chip Deselect Data Retention Time Operation Recovery Time Input Leakage Current
Test Condition
Min. tRC(2)
2.0v
3.0V
NOTES: +25°C. Read Cycle Time. This parameter guaranteed device characterization production tested.
DATA RETENTION WAVEFORM
DATA RETENTION MODE
2985
4.5V
4.5V
IDT7198S/L CMOS STATIC RAMS (16K 4-BIT) Added Chip Select Output Enable Controls
MILITARY TEMPERATURE RANGE
ELECTRICAL CHARACTERISTICS (VCC 5.0V 10%, Military Temperature Range)
7198S20 7198L20 Symbol Read Cycle tACS1,2 tCLZ1,2 tOLZ
7198S25 7198L25
7198S35/45 7198L35/45
7198S55 7198L55
7198S70 7198L70
7198S85 7198L85
Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
Read Cycle Time Address Access Time Chip Select-1,2 Access Time Chip Select-1,2 Output Low-Z Output Enable Output Valid Output Enable Output Low-Z Chip Select Output High-Z Output Disable Output High-Z Output Hold from Address Change Chip Select Power Time Chip Deselect Power Down Time
35/45
2985
35/45 35/45
20/25
tCHZ1,2 tOHZ
35/45
NOTES: Both chip selects must active device selected. This parameter guaranteed device characterization production tested.
TIMING WAVEFORM READ CYCLE 1(1)
ADDRESS
tOLZ
CS1,
tOHZ
tACS1, tCLZ1, DATAOUT
tCHZ1, DATA VALID
2985
NOTES: HIGH Read cycle. Device continuously selected, LOW, LOW. Address valid prior coincident with transition LOW. LOW. Transition measured ±200mV from steady state voltage.
IDT7198S/L CMOS STATIC (16K 4-BIT) Added Chip Select Output Enable Controls
MILITARY TEMPERATURE RANGE
TIMING WAVEFORM READ CYCLE 2(1,
ADDRESS DATAOUT PREVIOUS DATA VALID DATA VALID
2985
TIMING WAVEFORM READ CYCLE 3(1,
CS1,2
tACS1, tCLZ1, DATAOUT SUPPLY CURRENT DATA VALID
tCHZ1,
2985
NOTES: HIGH Read cycle. Device continuously selected, LOW, LOW. Address valid prior coincident with transition LOW. LOW. Transition measured ±200mV from steady state voltage.
ELECTRICAL CHARACTERISTICS (VCC 5.0V 10%, Temperature Ranges)
7198S20 7198L20 Symbol Write Cycle tWR1,2 tWHZ(2) tOW(2) Write Cycle Time Address Valid End-of-Write Address Set-up Time Write Pulse Width Write Recovery Time Write Enable Output High-Z Data Valid End-of-Write Data Hold Time Output Active from End-of-Write 30/40 25/35 25/35 25/35 15/20
2985
7198S25 7198L25
7198S35/45 7198L35/45
7198S55 7198L55
7198S70 7198L70
7198S85 7198L85
Parameter
Min. Max. Min. Max. Min.
Max. Min. Max. Min. Max. Min. Max. Unit
tCW1,2(1) Chip Select End-of-Write
10/15
NOTES: Both chip selects must active device selected. This parameter guaranteed device characterization production tested.
IDT7198S/L CMOS STATIC RAMS (16K 4-BIT) Added Chip Select Output Enable Controls
MILITARY TEMPERATURE RANGE
TIMING WAVEFORM WRITE CYCLE CONTROLLED TIMING)(1,
ADDRESS
CS1,
tWHZ DATAOUT
DATAIN
DATA VALID
2985
TIMING WAVEFORM WRITE CYCLE CONTROLLED TIMING)(1)
ADDRESS
CS1,
DATAIN DATA VALID
2985
NOTES: must HIGH during address transitions. write occurs during overlap (tWP) CS2. measured from earlier CS1, going HIGH write cycle. During this period, pins output state, input signals must applied. transition occurs simultaneously with after transition, outputs remain high-impedance state. Transition measured ±200mV from steady state. during controlled write cycle, write pulse width must larger (tWHZ tDW) allow drivers turn data placed required tDW. HIGH during controlled write cycle, this requirement does apply write pulse short specified tWP.
IDT7198S/L CMOS STATIC (16K 4-BIT) Added Chip Select Output Enable Controls
MILITARY TEMPERATURE RANGE
ORDERING INFORMATION
IDT7198 Device Type Power Speed Package Process/ Temperature Range Military (-55°C +125°C) Compliant MIL-STD-883, Class Ceramic (D24-1) Leadless Chip Carrier (L28-2) CERPACK (E24-1)
Military Only Military Only Military Only Military Only Military Only Military Only Military Only
Speed nanoseconds
Standard Power Power
2985

Added Chip Select Output Controls IDT7198S IDT7198L Integrat

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