Product specification Supersedes data 1999 2000 Product specifica
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GTL2010 10-bit processor voltage clamp
Product specification Supersedes data 1999 2000
Product specification
10-bit processor voltage clamp
GTL2010
FEATURES
Direct interface with level ON-state connection between port
DESCRIPTION
GTL2010 high speed 10-bit voltage clamp. ON-state resistance clamp allows connections made with minimal propagation delay. device organized 10-bit voltage clamp. When low, clamp ON-state resistance connection exists between ports. When port port high, clamp OFF-state very high impedance exists between ports. When port high, voltage port clamped applied reference voltage GREF port.
CONFIGURATION
SREF GREF DREF
FUNCTION TABLE
GREF1 DREF1 SREF2 Switch Driven Input Output Driven Input
SA00527
High voltage level voltage level Don't Care NOTES: GREF DREF connected together tied high through resistor. GREF must least higher than SREF proper switch operation.
QUICK REFERENCE DATA
SYMBOL tPLH COFF PARAMETER Propagation delay Channel capacitance (OFF-state) CONDITIONS Tamb 25°C; VDD1 3.3V; VDD2 2.5V; VREF 1.5V; unloaded 1.5V TYPICAL UNIT
ORDERING INFORMATION
PACKAGES 24-Pin Plastic TSSOP Type TEMPERATURE RANGE +85°C ORDER CODE GTL2010 NUMBER SOT355-1
DESCRIPTION
NUMBER SYMBOL SREF DREF GREF NAME FUNCTION Ground (0V) Source reference transistor Port Port Port Port Drain reference transistor Gate reference transistor
2000
853-2153 24452
Product specification
10-bit processor voltage clamp
GTL2010
CLAMP SCHEMATIC
DREF GREF
SREF
SA00526
ABSOLUTE MAXIMUM RATINGS1,
SYMBOL VS_REF VD_REF VG_REF IREFK IMAX Tstg PARAMETER source reference voltage drain reference voltage gate reference voltage voltage Port voltage Port reference diode current diode current Port diode current Port clamp current channel Storage temperature range Channel ON-state CONDITIONS RATING -0.5 +7.0 -0.5 +7.0 -0.5 +7.0 -0.5 +7.0 -0.5 +7.0 +150 UNIT
NOTES: Stresses beyond those listed cause permanent damage device. These stress ratings only functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. performance capability high-performance integrated circuit conjunction with thermal environment create junction temperatures which detrimental reliability. maximum junction temperature this integrated circuit should exceed 150°C. input output negative voltage ratings exceeded input output clamp current ratings observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL VS_REF VD_REF VG_REF Tamb PARAMETER source reference voltage drain reference voltage gate reference voltage voltage Port (OFF-state) voltage Port (ON-state) voltage Port (OFF-state) voltage Port (ON-state) Switch input leakage current (OFF-state) GREF input leakage current Operating ambient temperature range free CONDITIONS LIMITS VS_REF VS_REF VS_REF VS_REF UNIT
2000
Product specification
10-bit processor voltage clamp
GTL2010
CHARACTERISTICS VDD1 3.6V; VDD2 2.36 2.64V; VREF 1.365 1.635V range
Over recommended operating conditions. Voltage referenced (ground 0V). Refer Test Circuit diagram. LIMITS SYMBOL PARAMETER level output voltage TEST CONDITIONS 0.175V; ICLAMP 15.2mA Tamb +85°C NOTE: typical values measured VDD1 3.3V, VDD2 2.5V, VREF 1.5V Tamb 25°C. Typ1 UNIT
CHARACTERISTICS VDD1 3.6V; VDD2 2.36 2.64V; VREF 1.365 1.635V range
3.0ns. Refer Test Circuit diagram. SYMBOL PARAMETER Propagation delay LIMITS WAVEFORM tPLH2 Tamb +85°C TYP1 UNIT
NOTES: typical values measured VDD1 3.3V, VDD2 2.5V, VREF 1.5V Tamb 25°C. Propagation delay guaranteed characterization. CON,MAX 30pF COFF,MAX 15pF guaranteed design.
WAVEFORMS
INPUT
TEST CIRCUIT
VDD1
200K
VDD2
VDD2
VDD2
tPHL
tPLH
VDD2 OUTPUT HIGH-to-LOW LOW-to-HIGH
tPHL tPHL
DREF tPLH tPLH
GREF
VDD2 OUTPUT HIGH-to-LOW LOW-to-HIGH
SREF
SA00524
VREF
Waveform Input (Sn) Output (Dn) Propagation Delays
PULSE GENERATOR
SA00525
Waveform Load circuit
2000
Product specification
10-bit processor voltage clamp
GTL2010
TSSOP24: plastic thin shrink small outline package; leads; body width
SOT355-1
2000
Product specification
10-bit processor voltage clamp
GTL2010
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition This data sheet contains design target goal specifications product development. Specification change manner without notice. This data sheet contains preliminary data, supplementary data will published later date. Philips Semiconductors reserves right make changes time without notice order improve design supply best possible product. This data sheet contains final specifications. Philips Semiconductors reserves right make changes time without notice order improve design supply best possible product.
Production
Please consult most recently issued datasheet before initiating completing design.
Definitions
Short-form specification data short-form specification extracted from full data sheet with same type number title. detailed information relevant data sheet data handbook. Limiting values definition Limiting values given accordance with Absolute Maximum Rating System (IEC 134). Stress above more limiting values cause permanent damage device. These stress ratings only operation device these other conditions above those given Characteristics sections specification implied. Exposure limiting values extended periods affect device reliability. Application information Applications that described herein these products illustrative purposes only. Philips Semiconductors make representation warranty that such applications will suitable specified without further testing modification.
Disclaimers
Life support These products designed life support appliances, devices systems where malfunction these products reasonably expected result personal injury. Philips Semiconductors customers using selling these products such applications their risk agree fully indemnify Philips Semiconductors damages resulting from such application. Right make changes Philips Semiconductors reserves right make changes, without notice, products, including circuits, standard cells, and/or software, described contained herein order improve design and/or performance. Philips Semiconductors assumes responsibility liability these products, conveys license title under patent, copyright, mask work right these products, makes representations warranties that these products free from patent, copyright, mask work right infringement, unless otherwise specified. Philips Semiconductors East Arques Avenue P.O. 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 Copyright Philips Electronics North America Corporation 2000 rights reserved. Printed U.S.A. Date release: 08-00 Document order number: 9397 07462
2000
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