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DESCRIPTIO 3-Wire Serial Digital Interface Data Retransmission Al


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LTC1390 8-Channel Analog Multiplexer with Serial Interface
DESCRIPTIO
3-Wire Serial Digital Interface Data Retransmission Allows Series Connection with Serial Converters Single Supply Operation Analog Inputs Extend Supply Rails Charge Injection RON: Leakage: ±5nA Guaranteed Break-Before-Make TTL/CMOS Compatible Digital Inputs Cascadable Allow Additional Channels Used Demultiplexer
LTC1390 high performance CMOS 8-to-1 analog multiplexer. features 3-wire digital interface with bidirectional data retransmission feature, allowing wired series with serial converter while using only serial port. interface also allows several LTC1390s wired series parallel, increasing number channels available using only single digital port. above features also valid when LTC1390 operates demultiplexer such with converter. LTC1390 features typical typical switch leakage 50pA, guaranteed break-before-make operation. Charge injection ±10pC maximum. digital inputs CMOS compatible when operated from single dual supplies. inputs withstand 100mA fault currents. LTC1390 available 16-pin PDIP narrow packages.
registered trademarks Linear Technology Corporation.
APPLICATI
Data Acquisition Systems Communication Systems Signal Multiplexing/Demultiplexing
TYPICAL APPLICATI
ANALOG INPUTS 3-WIRE SERIAL INTERFACE DATA OPTIONAL INPUT FILTER
LTC1390
DATA DATA
ON-RESISTANCE
LTC1096 DOUT VREF
LTC1390 TA01
ON-Resistance Analog Input Voltage
25°C ANALOG INPUT VOLTAGE,
LTC1390 TA02
LTC1390 ABSOLUTE
(Note
RATI
PACKAGE/ORDER ATIO
VIEW DATA DATA
Total Supply Voltage Input Voltage Analog Inputs 0.3V 0.3V Digital Inputs 0.3V Digital Outputs. 0.3V 0.3V Power Dissipation 500mW Operating Temperature Range 70°C Storage Temperature Range 65°C 150°C Lead Temperature (Soldering, sec). 300°C
ORDER PART NUMBER LTC1390CN LTC1390CS
PACKAGE 16-LEAD PDIP
PACKAGE 16-LEAD PLASTIC
TJMAX 150°C, 70°C/ TJMAX 150°C, 100°C/
Consult factory Industrial Military grade parts.
ELECTRICAL CHARACTERISTICS
operating temperature unless otherwise noted.
SYMBOL Switch VANALOG Analog Signal Range Resistance (Note ±3.5V, TMIN 25°C TMAX
PARAMETER
CONDITIONS
UNITS %/°C
Temperature IS(OFF) ID(OFF) ID(ON) Input VINH VINL IINL, IINH High Level Input Voltage Level Input Voltage High Level Current High Level Output Voltage Level Output Voltage 5.25V 4.75V 4.75V, 10µA 4.75V, 360µA 4.75V, 0.5mA
Input Leakage Output Leakage Channel Leakage
Channel Channel Channel
0.05
0.05
0.05
4.74 4.50 0.16
LTC1390
ELECTRICAL CHARACTERISTICS
operating temperature unless otherwise noted.
SYMBOL Dynamic fCLK tOFF tOPEN OIRR OINJ CS(OFF) CD(OFF) Supply Positive Supply Current Negative Supply Current Logic Inputs Tied Together, Logic Inputs Tied Together,
PARAMETER Clock Frequency Enable Turn-On Time Enable Turn-Off Time Break-Before-Make Interval Isolation Charge Injection Source Capacitance Drain Capacitance
CONDITIONS
UNITS
2.5V, 35pF 2.5V, 35pF 2VP-P, 100kHz 1000pF, (Note
operating temperature unless otherwise noted.
SYMBOL Switch VANALOG Analog Signal Range Resistance (Note 1.2V, TMIN 25°C TMAX
PARAMETER
CONDITIONS
UNITS %/°C
Temperature IS(OFF) ID(OFF) ID(ON) Input VINH VINL IINL, IINH High Level Input Voltage Level Input Voltage High Level Current High Level Output Voltage Level Output Voltage 3.3V 2.7V 2.7V, 20µA 2.7V, 400µA 2.7V, 20µA 2.7V, 300µA
Input Leakage Output Leakage Channel Leakage
2.5V, 0.5V; 0.5V, 2.5V (Note Channel 2.5V, 0.5V; 0.5V, 2.5V (Note Channel 0.5V, 2.5V (Note Channel
±0.05
±0.05
±0.05
2.68 2.27 0.01 0.15
LTC1390
ELECTRICAL CHARACTERISTICS
operating temperature unless otherwise noted.
SYMBOL Dynamic fCLK tOFF tOPEN OIRR OINJ CS(OFF) CD(OFF) Supply Positive Supply Current Logic Inputs Tied Together,
PARAMETER Clock Frequency Enable Turn-On Time Enable Turn-Off Time Break-Before-Make Interval Isolation Charge Injection Source Capacitance Drain Capacitance
CONDITIONS
UNITS
1.5V, 35pF (Note 1.5V, 35pF (Note (Note 2VP-P, 100kHz 1000pF, (Note
denotes specifications which apply over full operating temperature range. Note Absolute maximum ratings those beyond which safety device impaired. Note Guaranteed design.
Note Leakage current with single supply guaranteed correlation with leakage current supply. Note Timing specifications with single supply guaranteed correlation with timing specifications supply.
TYPICAL PERFORMANCE CHARACTERISTICS
ON-Resistance Temperature
ON-RESISTANCE
1.2V
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
LTC1390
Driver Output Voltage Output Current
DATA DATA
Driver Output High Voltage Output Current
DATA 25°C DATA
25°C
OUTPUT VOLTAGE
LTC1390
OUTPUT VOLTAGE
LTC1390
LTC1390
FUNCTIONS
(Pins Analog Multiplexer Inputs/Analog Demultiplexer Outputs. (Pin Digital Ground. Connect system ground. (Pin 10): System Clock (TTL/CMOS Compatible). clock synchronizes channel selection bits serial data transfer from Data Data (Pin 11): Chip Select Input (TTL/CMOS Compatible). logic high this input enables LTC1390 read channel selection bits allow data transfer from Data Data logic enables desired channel analog signal transmission allows data transfer from Data Data Data (Pin 12): Bidirectional Digital Input/Output (TTL/ CMOS Compatible). Input channel selection bits. Data (Pin 13): Bidirectional Digital Input/Output (TTL/ CMOS Compatible). (Pin 14): Negative Supply. (Pin 15): Analog Multiplexer Output/Analog Demultiplexer Input. (Pin 16): Positive Supply.
APPLICATIO ATIO
Multiplexer Operation
Figure shows block diagram components within LTC1390 required operation. LTC1390 uses Data select channels chip select input switch selected channel shown Figure
DATA CONTROL LOGIC 4-BIT SHIFT REGISTER
ANALOG INPUT
BLOCK
ANALOG OUTPUT
LTC1390
Figure Simplified Block Diagram Operation
HIGH DATA ANALOG INPUTS
LTC1390
Figure Multiplexer Operation
When high, input data Data latched into 4-bit shift register each rising clock edge. input data consists "EN" string three bits channel selection. "EN" logic high illustrated first input data sequence, enables selected channel. ensure correct operation, must pulled before next rising clock edge. Once pulled low, channels simultaneously switched ensure break-before-make interval. After delay tON, selected channel switched allowing signal transmission. selected channel remains until next falling edge after delay tOFF, terminates analog signal transmission subsequently allows selection next channel. "EN" logic low, illustrated second data sequence, disables channels there will analog signal
tOFF
LTC1390
APPLICATIO ATIO
Table Logic Table Channel Selection
CHANNEL STATUS
transmission. Table shows various combinations channel selection.
Digital Data Transfer Operation block diagram Figure shows components contained within LTC1390 required digital data transfer. Digital data transfer operation performed from Data Data vice versa shown Figure When high, Buffer enabled Buffer disabled. digital input data into 4-bit shift register then shifted switches channel
4-BIT SHIFT REGISTER SWITCHES
BUFFER
DATA
BUFFER
Figure Simplified Block Diagram Digital Data Transfer Operation
DATA DATA Hi-Z
DATA DATA
DATA DATA
LTC1390
Figure Digital Data Transfer Operation
selection Data Buffer data transfer. Data appears Data after fourth rising edge clock. When low, Buffer enabled Buffer disabled, thus digital input data directly transferred from Data Data without clock delay. Multiplexer Expansion Several LTC1390s daisy-chained expand number multiplexer inputs. additional interface ports required expansion. Figure shows LTC1390s connected their analog outputs form 16to-1 multiplexer input LTC1286 converter.
VREF LTC1390 DATA ANALOG INPUTS DATA
DATA
LTC1286 DOUT
LTC1390 DATA DATA
ANALOG INPUTS
LTC1390
DATA
LTC1390
Figure Daisy-Chaining LTC1390s Expansion
ensure that only channel switched time, sets channel selection bits needed Data shown Figure first data sequence used switch second data sequence used select channel from other MUX, vice versa. other words, "ENA" high "ENB" low, channel switched channels switched off. "ENA" "ENB" high, channels switched channel switched
LTC1390
APPLICATIO ATIO
DATA
tSMPL
DIGITAL INPUT FROM LTC1390
Figure Timing Diagram Figure
TYPICAL APPLICATIONS
Daisy-Chaining Five LTC1390s
BYPASS CAPACITOR FROM REQUIRED EACH LTC1390
ANALOG INPUTS
LTC1390 DATA DATA
LTC1286 DOUT
ANALOG INPUTS
LTC1390 DATA DATA
ANALOG INPUTS
LTC1390 DATA DATA
Information furnished Linear Technology Corporation believed accurate reliable. However, responsibility assumed use. Linear Technology Corporation makes representation that interconnection circuits described herein will infringe existing patent rights.
NULL Hi-Z tDATA
LTC1390
tCONV DIGITAL OUTPUT FROM LTC1286
VREF
ANALOG INPUTS
LTC1390 DATA DATA
ANALOG INPUTS
LTC1390 DATA DATA
DATA* *REQUIRES FIVE 4-BIT CHANNEL SELECTION DATA BYTES
LTC1390 TA03
LTC1390
TYPICAL APPLICATIONS
Interfacing LTC1390 with LTC1257 Demultiplex Operation
OPTIONAL OUTPUT FILTER
ANALOG OUTPUTS DATA
LTC1390
PACKAGE DESCRIPTION
0.130 0.005 (3.302 0.127) 0.015 (0.381)
0.300 0.325 (7.620 8.255)
0.009 0.015 (0.229 0.381)
+0.025 0.325 -0.015 +0.635 8.255 -0.381
0.125 (3.175)
*THESE DIMENSIONS INCLUDE MOLD FLASH PROTRUSIONS. MOLD FLASH PROTRUSIONS SHALL EXCEED 0.010 INCH (0.254mm).
0.010 0.020 (0.254 0.508) 0.008 0.010 (0.203 0.254)
0.053 0.069 (1.346 1.752)
0.016 0.050 0.406 1.270
0.014 0.019 (0.355 0.483)
*THESE DIMENSIONS INCLUDE MOLD FLASH PROTRUSIONS. MOLD FLASH PROTRUSIONS SHALL EXCEED 0.006 INCH (0.15mm).
RELATED PARTS
PART NUMBER LTC201A/LTC202/LTC203 LTC221/LTC222 LTC128x/LTC129x DESCRIPTION Micropower, Charge Injection, Quad CMOS Analog Switches Micropower, Charge Injection, Quad CMOS Analog Switches with Data Latches Serial A/Ds with Integral MUXs
LT/GP 0695 PRINTED
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, 95035-7487
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
LTC1257 VOUT LOAD VREF DOUT
DATA DATA
LTC1390
Dimensions inches (millimeters) unless otherwise noted. Package 16-Lead Plastic
0.045 0.065 (1.143 1.651) 0.770* (19.558)
0.255 0.015* 0.065 (6.477 0.381) (1.651) 0.045 0.015 (1.143 0.381) 0.100 0.010 (2.540 0.254) 0.018 0.003 (0.457 0.076)
Package 16-Lead Plastic SOIC
0.004 0.010 (0.101 0.254)
0.386 0.394* (9.804 10.008)
0.050 (1.270)
0.228 0.244 (5.791 6.197)
0.150 0.157* (3.810 3.988)
COMMENTS Each Channel Independently Controlled Parallel Controlled with Data Latches
LINEAR TECHNOLOGY CORPORATION 1995

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