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Synchronous Buck Controller Single Power Supply Required 0.8V Ref


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APW7074
Synchronous Buck Controller
Single Power Supply Required 0.8V Reference with Accuracy Shutdown Soft-start Function 300KHz Fixed Switching Frequency Voltage Mode Control Design 100% Duty Cycle Under-Voltage Protection Over-Current Protection SOP-14 Package Lead Free Available (RoHS Compliant)
General Description
APW7074 uses fixed 300KHz switching frequency, voltage mode, synchronous controller which drives dual N-channel MOSFETs. device integrates control, monitoring protecting functions into single package, provides controlled power output with under-voltage over-current protections. APW7074 provides excellent regulation output load variation. internal 0.8V temperaturecompensated reference voltage designed meet requirement output voltage applications. APW7074 with excellent protection functions: POR, UVP. Power-On-Reset (POR) circuit monitor VCC, OCSET voltage make sure supply voltage exceeds their threshold voltage while controller running. Over-Current Protection (OCP) monitors output current using voltage drop across upper lower MOSFET' RDS(ON). When output curs rent reaches trip point, controller will soft-start function until fault events removed. Under-Voltage Protection (UVP) monitors voltage (VFB) short-circuit protection, when less VREF, controller will shutdown directly.
Applications
Graphic Cards
Outs
OCSET COMP SOP-14 PGND BOOT PHASE
ANPEC reserves right make changes improve reliability manufacturability without notice, advise customers obtain latest version relevant information verify before placing orders. Copyright ANPEC Electronics Corp. Rev. Feb., 2006 www.anpec.com.tw
APW7074
Ordering Marking Information
APW7074 Lead Free Code Handling Code Temp. Range Package Code APW7074 APW7074 XXXXX Package Code Temp. Range 70°C Handling Code Tube Lead Free Code Lead Free Device
Tape Reel Blank Original Device
XXXXX- Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials 100% matte plate termination finish; which fully compliant with RoHS compatible with both SnPb lead-free soldering operations. ANPEC lead-free products meet exceed lead-free requirements IPC/JEDEC STD-020C classification lead-free peak reflow temperature.
Block Diagram
OCSET
BOOT Power-On Reset IOCSET 200uA UGATE O.C.P Comparator 0.27V Soft Start O.C.P Comparator 50%VREF U.V.P Comparator PVCC Comparator Error VREF Oscillator Sawtooth Wave FOSC 300KHz PGND PHASE
10uA
Gate Control
LGATE
COMP
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
www.anpec.com.tw
APW7074
Absolute Maximum Ratings
Symbol VCC, PVCC BOOT UGATE LGATE PHASE OCSET COMP PGND TSTG TSDR VESD VCC, PVCC BOOT PHASE UGATE PHASE <400ns pulse width >400ns pulse width LGATE PGND PHASE OCSET COMP PGND Junction Temperature Range Storage Temperature Soldering Temperature Seconds) Minimum Rating <400ns pulse width >400ns pulse width <400ns pulse width >400ns pulse width Parameter Rating -0.3 -0.3 BOOT+5 -0.3 BOOT +0.3 PVCC+5 -0.3 BOOT +0.3 -0.3 VCC+0.3 -0.3 -0.3 +0.3 +150 Unit
Note Absolute Maximum Ratings those values beyond which life device impaired. Exposure absolute maximum rating conditions extended periods affect device reliability.
Recommended Operating Conditions
Symbol VCC, PVCC VOUT IOUT Supply Voltage Converter Input Voltage Converter Output Voltage Converter Output Current Ambient Temperature Range Junction Temperature Range Parameter Rating 10.8 13.2 13.2 Unit
Electrical Characteristics
Unless otherwise specified, these specifications apply over VCC=12V, =-20~70°C. Typical values TA=25°C.
Symbol
Parameter
Test Conditions
APW7074
Unit
INPUT SUPPLY CURRENT Supply Current (Shutdown mode) Supply Current
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
UGATE, LGATE UGATE LGATE Open
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APW7074
Electrical Characteristics (Cont.)
Unless otherwise specified, these specifications apply over VCC=12V, =-20~70°C. Typical values TA=25°C.
Symbol
Parameter
Test Conditions
APW7074 10.0
Unit
POWER-ON RESET Rising Threshold Falling Threshold Rising VOCSET Threshold VOCSET Hysteresis Voltage Rising threshold Voltage Hysteresis Voltage OSCILLATOR FOSC VOSC Duty VREF Oscillator Frequency Ramp Amplitude Duty Cycle Range Reference Voltage Reference Voltage Tolerance ERROR AMPLIFIER Gain Open Loop Gain Slew Rate Input Current VCOPM COMP High Voltage VCOPM COMP Voltage ICOMP COMP Source Current ICOMP COMP Sink Current GATE DRIVERS IUGATE Upper Gate Source Current IUGATE Upper Gate Sink Current ILGATE Lower Gate Source Current ILGATE Lower Gate Sink Current RUGATE Upper Gate Sink Impedance BOOT 12V, VUGATE -VPHASE BOOT 12V, VUGATE -VPHASE PVCC 12V, VLGATE PVCC 12V, VLGATE BOOT 12V, IUGATE 0.1A 1.05 VCOMP VCOMP 10k, 10pF (Note3) 10k, 10pF (Note3) 10k, 10pF (Note3) 0.8V V/us GBWP Open Loop Bandwidth (nominal 1.35V 2.95V) 0.80
REFERENCE
RUGATE Upper Gate Source Impedance BOOT 12V, IUGATE 0.1A
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
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APW7074
Electrical Characteristics (Cont.)
Unless otherwise specified, these specifications apply over VCC=12V, =-20~70°C. Typical values TA=25°C.
Symbol
Parameter
Test Conditions
APW7074 1.25 1.95 1.88
Unit
GATE DRIVERS (Cont.) RLGATE RLGATE UVFB IOCSET VOCP Lower Gate Source Impedance Lower Gate Sink Impedance Dead Time Under Voltage Level Voltage (Low-Side) Soft-Start Charge Current Percent VREF PVCC 12V, ILGATE 0.1A PVCC 12V, ILGATE 0.1A
PROTECTION
OCSET Source Current (Hi-Side) VOCSET 11.5V
SOFT START
Note 3:Guaranteed design.
Typical Application Circuit
PVCC OCSET
22nF
1N4148 2.37K
470uFx2
470uF
BOOT
0.1uF
UGATE PHASE
APM2509 2.2uH
VOUT
1.5nF APM2506 SCD24 7.5R 1000uFx2
COMP
2.7K
LGATE PGND
33nF 8.2nF
68nF
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
www.anpec.com.tw
APW7074
Function Descriptions
(Pin14) Power supply input pin. Connect nominal power supply this pin. power-on reset function monitors input voltage this pin. recommended that decoupling capacitor 10uF) connected noise decoupling. PVCC (Pin13) This provides supply voltage lower gate drive, connect this normal use. BOOT (Pin10) This provides bootstrap voltage upper gate driver driving N-channel MOSFET. PHASE (Pin8) This return path upper gate driver. Connect this upper MOSFET source. This also used monitor voltage drop across MOSFET over-current protection. (Pin7) This signal ground pin. Connect good ground plane. PGND (Pin11) This power ground lower gate driver. should tied board. COMP (Pin4) This output error amplifier. used compensation components. (Pin5) This inverting input error amplifier. used output voltage compensation components. This also monitored undervoltage protection; voltage under reference voltage, device will shut down. (Pin6) Pull this above 1.3V enable device pull this below 1.2V disable device. shutdown, discharged UGATE LGATE pins held low. Note that don' leave this open. UGATE (Pin9) This gate driver upper MOSFET output. LGATE (Pin12) This gate driver lower MOSFET output. (Pin3) Connect capacitor 10uA current source charges this capacitor soft-start time. OCSET (Pin2) This serves functions: shutdown control setting over current limit threshold. Pulling this below 1.3V will shutdown controller, forcing UGATE LGATE signals low. resistor (Rocset) connected between this drain high side MOSFET will determine over current limit. internal 200uA current source will flow through this resistor, creating voltage drop, which will compared with voltage across high side MOSFET. threshold over current limit therefore given
IPEAK IOCSET (200uA OCSET DS(ON)
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
www.anpec.com.tw
APW7074
Typical Characteristics
Power
Power
VCC=12V, Vin=12V Vo=1.5V, L=1uH
VCC=12V, Vin=12V Vo=1.5V, L=1uH
CH1: (5V/div) CH2: (2V/div) CH3: (1V/div) Time: 10ms/div
CH1: (5V/div) CH2: (2V/div) CH3: (1V/div) Time: 2ms/div
(EN=Vcc)
Shutdown (EN=GND)
VCC=12V, Vin=12V Vo=1.5V, L=1uH
VCC=12V, Vin=12V Vo=1.5V, L=1uH
CH1: (5V/div) CH2: (5V/div) CH3: (1V/div) Time: 10ms/div
CH1: (5V/div) CH2: (5V/div) CH3: (1V/div) Time: 10ms/div
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
www.anpec.com.tw
APW7074
Typical Characteristics
UGATE Rising
UGATE Falling
VCC=12V, Vin=12V Vo=1.5V, L=1uH
VCC=12V, Vin=12V Vo=1.5V, L=1uH
CH1: (20V/div) CH2: (5V/div) CH3: Phase (10V/div) Time: 50ns/div
CH1: (20V/div) CH2: (5V/div) CH3: Phase (10V/div) Time: 50ms/div
Load Transient Response
VCC=12V, Vin=12V Vo=1.5V, L=1uH
Under Voltage Protection
VCC=12V, Vin=12V Vo=1.5V, L=1uH
CH1: (500mV/div) CH2:Io (5A/div) Time: 200us/div
CH1: (5V/div) CH2: (5A/div) CH3: (1V/div) CH4: (10V/div) Time: 50ms/div
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
www.anpec.com.tw
APW7074
Typical Characteristics
Over Current Protection
Short Test
Vcc=12V, Vin=12V Vo=1.5V, L=1uH
Vcc=12V, Vin=12V,Vo=1.5V, L=1uH Rocset=1K Rds(on)=8m
CH1: (5V/div) CH2: (10A/div) CH3: (1V/div) CH4:Ug (20V/div) Time: 10ms/div
CH1: (5V/div) CH2: (10A/div) CH3: (1V/div) CH4:Ug (20V/div) Time: 10ms/div
Switching Frequency Junction Temperature
Reference Voltage Junction Temperature
0.804
Switching Frequency(KHz)
0.802
Reference Voltage(V)
0.798 0.796
0.794
0.792
Junction Temperature
Junction Temperature
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
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APW7074
Typical Characteristics
UGATE Source current UGATE Voltage
UGATE Sink current UGATE Voltage
VBOOT=12V
VBOOT=12V
UGATE Source Current
UGATE Sink Current
UGATE Voltage
UGATE Voltage
LGATE Source current LGATE Voltage
LGATE Sink current LGATE Voltage
LGATE Source Current
PVCC=12V
LGATE Sink Current
PVCC=12V
LGATE Voltage
LGATE Voltage
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
www.anpec.com.tw
APW7074
Function Descriptions
Power Reset (POR) Power-On Reset (POR) function APW7074 continually monitors input supply voltage (VCC), enable (EN) OCSET pin. supply voltage (VCC) must exceed rising threshold voltage. voltage OCSET equal less fixed voltage drop (Vocset VIN- VROCSET). pulled high with connecting resistor VCC. function initiates soft-start operation after VCC, OCSET voltages exceed their thresholds. operation with single +12V power source, equivalent +12V power source must exceed rising threshold. function inhibits operation disabled status low). With both input supplies above their thresholds, device initiates soft-start interval. Soft-Start/EN SS/EN pins control soft-start enable disable controller. Connect soft-start capacitor from soft-start interval. Figure1. shows soft-start interval. When reaches Power-On-Reset threshold (9.5V), internal 10uA current source starts charge capacitor. When reaches enabled threshold about 1.8V, internal 0.8V reference starts rise follows error amplifier output (COMP) suddenly raises 35V, which valley triangle wave oscillator, leads VOUT start Until reaches about 4.2V, internal reference completes soft-start interval reaches 0.8V; then VOUT regulation. still rises 5.5V then stops. TSoft Start Where: external Soft-Start capacitor Soft-Start current=10uA resistor (ROCSET) connected between OCSET drain upper MOSFET will determine over current limit. internal 200uA current source will flow through this resistor, creating voltage drop, which will compared with voltage across upper MOSFET. When voltage across upper MOSFET exceeds voltage drop across OCSET, over-current will detected. threshold over current limit therefore given Over-Current Protection (monitor upper MOSFET) APW7074 provides manners protect converter from abnormal output load; monitors voltage across upper MOSFET OCSET over-current trip point, other monitors voltage across lower MOSFET comparing with internal reference voltage (0.27V).
Time 1.8V VOUT 4.2V Voltage
Figure Soft-Start Internal
ILIMIT
IOCSET OCSET
over-current never occurred normal operating load range; variation parameters above equation should determined.
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
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APW7074
Function Descriptions (Cont.)
Over-Current Protection (Cont.) MOSFET'RDS(ON) varied temperature gate source voltage, user should determine maximum RDS(ON) manufacturer' datasheet. minimum IOCSET (170uA) minimum ROCSET should used above equation. Note that ILIMIT current flow through upper MOSFET; ILIMIT must greater than maximum output current half inductor ripple current. over current condition will shut down device discharge with 10uA sink current then initiate soft-start sequence. over current condition removed during soft-start interval, device will shut down while over current detected still rises complete cycle. soft start function will cycled until over current condition removed. Both over-current protections have same behavior while over current condition detected. Over-Current Protection (monitor lower MOSFET) other over-current protection monitors output current using voltage drop across lower MOSFET' RDS(ON) this voltage drop will coms pared with internal 0.27V reference voltage. voltage drop across lower MOSFET' RDS(ON) larger than 0.27V, over-current condition detected. threshold over current limit given
ILIMIT
0.27V DS(ON)
over-current never occurred normal operating load range; parameters RDS(ON) ILIMIT above equation also have same notices previous section. Under Voltage Protection monitored during converter operation their Under Voltage (UV) comparator. voltage drops below reference voltage (50% 0.8V 0.4V), fault signal internally generated, device turns both high-side low-side MOSFET converter' output latched floating.
Application Information
Output Voltage Selection output voltage programmed with resistive divider. better resistors resistive divider recommended. inverter input error amplifier, reference voltage 0.8V. output voltage determined Output Inductor Selection inductor value determines inductor ripple current affects load transient response. Higher inductor value reduces inductor' ripple current induces lower output ripple voltage. ripple current ripple voltage approximated
VOUT
IRIPPLE
VOUT VOUT
Where ROUT resistor connected from VOUT RGND resistor connected from GND.
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
VOUT IRIPPLE
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APW7074
Application Information (Cont.)
Output Inductor Selection (Cont.) where switching frequency regulator. Although increase inductor value frequency reduces ripple current voltage, tradeoff will exist between inductor' ripple current regulator load transient response time. smaller inductor will give regulator faster load transient response expense higher ripple current. Increasing switching frequency (FS) also reduces ripple current voltage, will increase switching loss MOSFET power dissipation converter. maximum ripple current occurs maximum input voltage. good starting point choose ripple current approximately maximum output current. Once inductance value been chosen, select inductor that capable carrying required peak current without going into saturation. some types inductors, especially core that made ferrite, ripple current will increase abruptly when saturates. This will result larger output ripple voltage. Output Capacitor Selection Higher capacitor value lower reduce output ripple load transient drop. Therefore, selecting high performance capacitors intended switching regulator applications. some applications, multiple capacitors have parallel achieve desired value. small decoupling capacitor parallel bypassing noise also recommended, voltage rating output capacitors also must considered. tantalum capacitors used, make sure they surge tested manufactures. doubt, consult capacitors manufacturer. Input Capacitor Selection input capacitor chosen based voltage rating current rating. reliable operation, select capacitor voltage rating least times higher than maximum input voltage. maximum current rating requirement approximately IOUT/2, where IOUT load current. During power input capacitors have handle large amount surge current. tantalum capacitors used, make sure they surge tested manufactures. doubt, consult capacitors manufacturer. high frequency decoupling, ceramic capacitor connected between drain upper MOSFET source lower MOSFET. MOSFET Selection selection N-channel power MOSFETs determined RDS(ON), reverse transfer capacitance (CRSS) maximum output current requirement. There components loss MOSFETs: conduction loss transition loss. upper lower MOSFET, losses approximately given following: PUPPER IOUT TC)(RDS(ON))D (0.5)( IOUT)(VIN)( tSW)FS PLOWER IOUT TC)(RDS(ON))(1-D) Where IOUT load current temperature dependency RDS(ON) switching frequency switching interval duty cycle Note that both MOSFETs have conduction loss while upper MOSFET include additional transition loss. switching internal, function reverse transfer capacitance RSS. (1+TC) term factor temperature dependency RDS(ON) extracted from "RDS(ON) Temperature" curve power MOSFET.
Copyright ANPEC Electronics Corp. Rev. Feb., 2006 www.anpec.com.tw
APW7074
Application Information (Cont.)
Compensation output filter step down converter introduces double pole, which contributes with -40dB/decade gain slope degrees phase shift control loop. compensation network among COMP, VOUT should added. compensation network shown Fig. output filter consists output inductor output capacitors. transfer function filter given
GAIN
modulator shown Figure input output error amplifier output PHASE node. transfer function modulator given
GAIN
Driver Comparator PHASE
poles zero this transfer functions are:
Output Error Amplifier Driver
FESR
Figure Modulator compensation network shown Figure provides close loop transfer function with highest zero crossover frequency sufficient phase margin. transfer function error amplifier given
double poles filter, FESR zero introduced output capacitor.
PHASE OUTPUT
GAIN
COMP
R1//
Figure Output Filter
-40dB/dec GAIN (dB)
poles zeros transfer function are:
-20dB/dec
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Frequency(Hz)
Figure Filter GAIN Frequency
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
APW7074
Application Information (Cont.)
Compensation (Cont.)
COMP
5.Set second pole half switching frequency also second zero output filter double pole FLC. compensation gain should exceed error amplifier open loop gain, check compensation gain with capabilities error amplifier. Combine equations will following component calculations:
Figure Compensation Network closed loop gain converter written GAINLC GAINPWM GAINAMP Figure shows asymptotic plot closed loop converter gain, following guidelines will help design compensation network. Using below guidelines should give compensation similar curve plotted. stable closed loop -20dB/ decade slope phase margin greater than degree. 1.Choose value usually between
GAIN (dB)
2.Select desired zero crossover frequency (1/5 1/10) >FO>FESR following equation calculate VOSC 3.Place first zero before output filter double pole frequency FLC. 0.75 Calculate equation: 0.75 4.Set pole zero frequency FESR: FESR Calculate equation:
20log (R2/R1)
20log
Compensation Gain
Filter Gain Frequency(Hz) Converter Gain
Figure Converter Gain Frequency Layout Considerations high switching frequency converter, correct layout important ensure proper operation regulator. With power devices switching 300KHz, resulting current transient will cause voltage spike across interconnecting impedance parasitic
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FESR
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
APW7074
Application Information (Cont.)
Layout Considerations (Cont.) circuit elements. example, consider turn-off transition MOSFET. Before turn-off, MOSFET carrying full load current. During turn-off, current stops flowing MOSFET free-wheeling lower MOSFET parasitic diode. parasitic inductance circuit generates large voltage spike during switching interval. general, using short, wide printed circuit traces should minimize interconnecting impedances magnitude voltage spike. signal power grounds kept separate till combined using ground plane construction single point grounding. Figure illustrates layout, with bold lines indicating high current paths; these traces must short wide. Components along bold lines should placed lose together. Below checklist your layout: Keep switching nodes (UGATE, LGATE PHASE) away from sensitive small signal nodes since these nodes fast moving signals. Therefore, keep traces these nodes short possible. traces from gate drivers MOSFETs (UG, should short wide. Place source high-side MOSFET drain low-side MOSFET close possible. Minimizing impedance with wide layout plane between pads reduces voltage bounce node. Decoupling capacitor, compensation component, resistor dividers, boot capacitors, capacitors should close their pins. (For example, place decoupling ceramic capacitor near drain high-side MOSFET close possible. bulk capacitors also placed Figure 7.Layout Guidelines near drain). input capacitor should near drain upper MOSFET; output capacitor should near loads. input capacitor should close output capacitor lower MOSFET GND. drain MOSFETs (VIN Phase nodes) should large plane heat sinking.
APW7074 PVCC BOOT UGATE PHASE LGATE
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
www.anpec.com.tw
APW7074
Package Information
(150mil)
0.015
GAUGE PLANE SEATING PLANE
0.010
Millimeters Min. 1.477 0.102 0.331 0.191 8.558 3.82 1.274 5.808 0.382 6.215 1.274 0.228 0.015 Max. 1.732 0.255 0.509 0.2496 8.762 3.999 Min. 0.058 0.004 0.013 0.0075 0.336 0.150
Inches Max. 0.068 0.010 0.020 0.0098 0.344 0.157 0.050 0.244 0.050
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
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APW7074
Physical Specifications
Terminal Material Lead Solderability Solder-Plated Copper (Solder Material 90/10 63/37 SnPb), 100%Sn Meets Specification RSI86-91, ANSI/J-STD-002 Category
Reflow Condition
(IR/Convection Reflow)
Critical Zone
Ramp-up
Temperature
Tsmax
Tsmin Ramp-down Preheat
Peak
Classification Reflow Profiles
Profile Feature Average ramp-up rate Preheat Temperature (Tsmin) Temperature (Tsmax) Time (min max) (ts) Time maintained above: Temperature (TL) Time (tL) Peak/Classificatioon Temperature (Tp) Time within actual Peak Temperature (tp) Ramp-down Rate Sn-Pb Eutectic Assembly 3°C/second max. 100°C 150°C 60-120 seconds 183°C 60-150 seconds table 10-30 seconds Pb-Free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds table 20-40 seconds
6°C/second max. 6°C/second max. minutes max. minutes max. Time 25°C Peak Temperature Notes: temperatures refer topside package .Measured body surface.
Copyright ANPEC Electronics Corp. Rev. Feb., 2006 www.anpec.com.tw
APW7074
Classification Reflow Profiles(Cont.)
Table SnPb Entectic Process Package Peak Reflow Temperatures Package Thickness Volum Volume <350 <2.5 +0/-5°C +0/-5°C +0/-5°C +0/-5°C Table Pb-free Process Package Classification Reflow Temperatures Package Thickness Volume Volume Volume <350 350-2000 >2000 <1.6 +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* *Tolerance: device manufacturer/supplier shall assure process compatibility including stated classification temperature (this means Peak reflow temperature +0°C. example 260°C+0°C) rated level.
Reliability Test Program
Test item SOLDERABILITY HOLT Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD Description 245°C, 1000 Bias @125°C Hrs, 100%RH, 121°C -65°C~150°C, Cycles VHBM 2KV, 200V 10ms, 100mA
Carrier Tape Reel Dimensions
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
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APW7074
Carrier Tape Reel Dimensions(Cont.)
Application
SOP-14 (150mil)
330REF
100REF 0.50
13.0 1.50 (MIN)
16.5REF
16.0 2.10
0.3±0.05
1.75
(mm)
Cover Tape Dimensions
Application SOP- Carrier Width Cover Tape Width 21.3 Devices Reel 2500
Customer Service
Anpec Electronics Corp. Head Office No.6, Dusing Road, SBIP, Hsin-Chu, Taiwan, R.O.C. 886-3-5642000 886-3-5642050 Taipei Branch 137, Lane 235, Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, 886-2-89191368 886-2-89191369
Copyright ANPEC Electronics Corp. Rev. Feb., 2006
www.anpec.com.tw

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