Synchronous Buck Controller Simple Single-Loop Control Design Vol

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Synchronous Buck Controller Simple Single-Loop Control Design Vol

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APW7062B
Synchronous Buck Controller
Simple Single-Loop Control Design Voltage-Mode Control Fast Transient Response Full 0-100% Duty Ratio Excellent Output Voltage Regulation 0.8V Internal Reference Over Line Voltage Temperature
General Description
APW7062B voltage mode, synchronous controller which drives dual N-Channel MOSFETs. integrates control, monitoring protection functions into single package, provides controlled power outputs with under-voltage over-current protection. APW7062B provide excellent regulation output load variation. internal 0.8V temperature-compensated reference voltage designed meet requirement output voltage applications. includes 200kHz free-running triangle-wave oscillator that adjustable from 70kHz 800kHz. power-on-reset (POR) circuit monitors VCC, OCSET input voltage start-up shutdown over-current protection (OCP) monitors output current using voltage drop across upper MOSFET's RDS(ON), eliminating need current sensing resistor. under-voltage protection (UVP) monitors voltage short-circuit protection. over-current protection trip cycle soft-start function until fault events removed. Under-voltage protection will shutdown directly.
Over Current Fault Monitor Uses Upper MOSFETs (ON) Converter Source Sink Current Small Converter Size 200kHz Free-Running Oscillator Programmable from 70kHz 800kHz
14-Lead SOIC Package Lead Free Available (RoHS Compliant)
Applications
Graphic Cards Memory Power Supply Memory Termination Voltage Low-Voltage Distributed Power Supplies
Pinouts
OCSET COMP PVCC LGATE PGND BOOT UGATE PHASE
ANPEC reserves right make changes improve reliability manufacturability without notice, advise customers obtain latest version relevant information verify before placing orders. Copyright ANPEC Electronics Corp. Rev. Mar., 2005 www.anpec.com.tw
APW7062B
Ordering Marking Information
7062B
ange ackage Tube Tape
7062B
7062B XXXXX
Notes ANPEC lead-free products contain molding compounds/die attach materials 100% matte plate termination finish; which fully compliant with RoHS compatible with both SnPb lead-free soldiering operations. ANPEC lead-free products meet exceed lead-free requirements IPC/JEDEC STD-020C classification lead-free peak reflow temperature.
Block Diagram
OCSET
ower-O 200uA
BOOT
10uA
5.8V
tart
.C.P parator
parator
PVCC
parator ontrol
LGATE
rror illator
Triangle
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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APW7062B
Application Cicuit
1N4148 APW7062B OCSET PVCC LGATE COMP PGND BOOT UGATE PHASE 470uF 30mR 470uF 30mR
APM4220 2.2uH SR24 2A/40V 4.7uF
100uF
0.1uF
0.1uF SHDN 47pF
1.2V
8200pF
APM4220
1000uF 6.3V 30mR
1000uF 6.3V 30mR
4.7uF
VOUT VREF
Absolute Maximum Ratings
Symbol VBOOT VPHASE TSTG TSDR VESD BOOT PHASE Operating Junction Temperature Storage Temperature Soldering Temperature Seconds) Minimum Rating Parameter Rating 0~150 Unit
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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APW7062B
Electrical Characteristics
APW7062B Symbol Parameter Test Conditions EN=VCC; UGATE LGATE Open EN=0V VOCSET=4.5V VOCSET=4.5V VOCSET=4.5V 1.27 RT=OPEN, VCC=12 200K RT=OPEN 0.80 VBOOT=12V, VUGATE=6V ILGATE=0.3A PVCC=12V, VLGATE=6V ILGATE=0.3A VOUT=2.5V, IOUT=1A, RT=OPEN VOCSET=4.5V 10.4 SUPPLY CURRENT Nominal Supply Shutdown Supply POWER-ON-RESET Rising Threshold Falling Threshold Enable-Input Threshold Voltage Rising VOCSET Threshold OSCILLATOR Free Running Frequency Total Variation VOSC VREF VREF IUGATE RUGATE ILGATE RLGATE Ramp Amplitude Reference Voltage Tolerance Error Amplifier Upper Gate Source Upper Gate Sink Lower Gate Source Lower Gate Sink Dead Time Under Voltage IOCSET OCSET Current Source Soft-Start Current REFERENCE VOLTAGE ACCURANCY VP-P Unit
GATE DRIVERS
PROTECTION
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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APW7062B
Functional Description
(Pin1) This adjust switching frequency. Connect resistor from increasing switching frequency:
200kHz 4.15
GND,FS 200kHz 400kHz)
Conversely, connect resistor from decreasing switching frequency:
200kHz 3.51
200kHz 75kHz)
OCSET (Pin2) This serves functions: shutdown control setting over current limit threshold. Pulling this below 1.27V will shutdown controller, forcing UGATE LGATE signals resistor (Rocset) connected between this drain high side MOSFET will determine over current limit. internal 200uA current source will flow through this resistor, creating voltage drop, which will compared with voltage across high side MOSFET. threshold over current limit therefore given
(Pin3) Connect capacitor from soft-start interval converter. internal 10uA current source charges this capacitor 5.8V. voltage clamps error amplifier output, Figure1 shows soft-start interval. voltage reaches valley oscillator's triangle wave. comparator starts generate signal control logic, output rising rapidly. Until output regulation clamp COMP released. This method provides rapid controlled output voltage rise. When over current protection occurs, VOUT shutdown, re-soft-start again, over current condition still exists soft-start VOUT shutdowned again, after reaches 4.5V, discharged zero. soft-start recurring until over current condition eliminated.
TAGE VSOF STAR
VOSC VSS=
Erro
IPEAK
IOCSET (200uA ROCSET RDS(ON)
TIME
avoid noise interference from switching transient, delay time designed comparator. over current protection active only when high side MOSFET turned longer than 300ns.
FIGURE1. SOFT-START INTERVAL
(VOSC(MIN)+
SteadyState
tSoftStart
VOSC
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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APW7062B
Functional Description (Cont.)
Where t1=1.2V Soft Start Capacitor Soft Start Current 10µA VOSC(MIN) Bottom Oscillator 1.35V Input Voltage Vosc Peak Peak Oscillator Voltage 1.9V VOUTSteadyState Steady State Output Voltage COMP (Pin4) This output error amplifier. external resistor capacitor network provide loop compensation converter (see Application Information). (Pin5) inverter input error amplifier. receives feedback voltage from external resistive divider across output (VOUT). output voltage determined
VOUT 0.8V
LGATE pins held low. opencollector, will floating. (Pin7) Signal ground PHASE (Pin8) This connected source high-side MOSFET used monitor voltage drop across high-side MOSFET over-current protection.
UGATE (Pin9) Connect external MOSFET, provides gate drive upper MOSFET. BOOT (Pin This provides supply voltage high side MOSFET driver. driving logic level N-channel MOSEFT, bootstrap circuit used create suitable driver's supply. PGND (Pin11) Power ground gate diver. Connect lower MOSFET source this pin. LGATE (Pin Connect external MOSFET, provides gate drive signal lower MOSFET.
ROUT RGND
where ROUT resistor connected from VOUT RGND resistor connected from GND.
voltage under VREF, because short circuit other influence will cause under voltage protection, device shutdowned. Remove error condition restart voltage pull from high once, device enabled again. (Pin6) Pull higher than enable device, pull lower than 0.8V shutdown device. shutdown, discharged UGATE
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
PVCC (Pin13) This provides supply voltage lower gate drive, connect common use.
(Pin14) This provides supply voltage device, when above rising threshold 10.4V, device turned conversely, below falling threshold, device turned off.
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APW7062B
Typical Characteristics
Power
Power Down
VCC=12V, VIN=12V VOUT=2.5V, L=2.2uH
(5V/div) SS(2V/div)
VCC=12V, VIN=12V VOUT=2.5V, L=2.2uH
CC(5V/div) SS(2V/div)
VOUT(1V/div)
VOUT(1V/div)
Time(10ms/div)
Time(10ms/div)
Enable VCC)
Shutdown (EN=GND)
EN(10V/div)
VCC=12V, IN=12V VOUT=2.5V, L=2.2uH
EN(10V/div)
VCC=12V, VIN=12V VOUT=2.5V, L=2.2uH
SS(2V/div)
SS(2V/div)
OUT(1V/div)
VOUT(1V/div)
Time(10ms/div)
Time(2ms/div)
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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APW7062B
Typical Characteristics (Cont.)
Load Transient Response
VOUT(100mV/div) VCC=12V, VIN=12V VOUT=2.5V, L=2.2uH
Under Voltage Protection
VCC=12V, VIN=12V VOUT=2.5V, RT=Open L=2.2uH
VOUT(2V/div)
SS(5V/div) IOUT(2A/div) IL(10A/div)
UGATE(20V/div)
Time(20us/div)
Time(20us/div)
UGATE Rising
UGATE Falling
VCC=12V, VIN=12V VOUT=2.5V, RT=Open UGATE(10V/div)
VCC=12V, VIN=12V VOUT=2.5V, RT=Open UGATE(10V/div)
LGATE(10V/div)
LGATE(10V/div)
Phase(10V/div)
Phase(10V/div)
Time(50ns/div)
Time(50ns/div)
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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APW7062B
Typical Characteristics (Cont.)
UGATE Source Current UGATE Voltage
VBOOT=12V
UGATE Sink Current UGATE Voltage
VBOOT=12V
UGATE Source Current
UGATE Sink Current
UGATE Voltage
UGATE Voltage
LGATE Source Current LGATE Voltage
PVCC=12V
LGATE Sink Current LGATE Voltage
PVCC=12V
LGATE Source Current
LGATE Sink Current
LGATE Voltage
LGATE Voltage
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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APW7062B
Typical Characteristics (Cont.)
Over Current Protection
VCC=12V, VIN=12V, VOUT=2.5V, ROCEST=1K, RT=Open, RDS(ON)=14m, IOUT=16.3A, L=2.2uH, LOUT=16.3A VOUT(1V/div)
Resistance Switching Frequency
10000
pull
SS(5V/div)
Resistance
1000
IL(10A/div)
pull down
UGATE(20V/div)
1000
Switching Frequency (kHz) Time(20ms/div)
Reference Voltage Junction Temperature
Switching Frequency Junction Temperature
=12V RT=Open
Reference Voltage
0.798
Switching Frequency
0.796
0.794
0.792
0.79
Junction Temperature (°C)
Junction Temperature (°C)
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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APW7062B
Application Information
Component Selection Guidelines
Output Capacitor Selection selection COUT determined required effective series resistance (ESR) voltage rating rather than actual capacitance requirement. Therefore select high performance capacitors that intended switching regulator applications. some applications, multiple capacitors have paralled achieve desired value. tantalum capacitors used, make sure they surge tested manufactures. doubt, consult capacitors manufacturer. Input Capacitor Selection input capacitor chosen based voltage rating current rating. reliable operation, select capacitor voltage rating least times higher than maximum input voltage. maximum current rating requirement approximately IOUT/2 where IOUT load current. During power input capacitors have handle large amount surge current. tantalum capacitors used, make sure they surge tested manufactures. doubt, consult capacitors manufacturer. high frequency decoupling, ceramic capacitor between 0.1uF connected between ground pin. Inductor Selection inductance inductor determined output voltage requirement. larger inductance, lower inductor's current ripple. This will translate into lower output ripple voltage. ripple current ripple voltage approximated IRIPPLE VOUT VOUT
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VOUT IRIPPLE where switching frequency regulator. There tradeoff exists between inductor's ripple current regulator load transient response time smaller inductor will give regulator faster load transient response expense higher ripple current vice versa. maximum ripple current occurs maximum input voltage. good starting point choose ripple current approximately maximum output current. Once inductance value been chosen, select inductor that capable carrying required peak current without going into saturation. some type inductors, especially core that make ferrite, ripple current will increase abruptly when saturates. This will result larger output ripple voltage. Compensation output filter introduces double pole, which contributes with -40dB/decade gain slope degrees phase shift control loop. compensation network between COMP ground should added. simplest loop compensation network shown Fig. output filter consists output inductor output capacitors. transfer function filter given GAINLC
COUT COUT
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
APW7062B
Application Information (Cont.)
Compensation (Cont.) poles zero this transfer function are: GAINPWM
VOSC Driver Comparator VOSC Output Error Amplifier Driver PHASE
COUT
FESR
COUT
double poles filter, FESR zero introduced output capacitor.
PHASE COUT Output
Figure Modulator
Figure Output Filter
compensation circuit shown Figure introduce zero introduces pole reduce switching noise. transfer function error amplifier given GAINAMP
-40dB/dec
Gain
FESR
-20dB/dec
(R3sC1
poles zero compensation network are:
Frequency
Figure Output Filter Gain Frequency modulator shown Figure. input output error amplifier output PHASE node. transfer function modulator given
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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APW7062B
Application Information (Cont.)
Compensation (Cont.) Calculate equation:
rror plifier
log(gm
FZ=0.75FLC FP=0.5FS
Compensation Gain
Figure Compensation Network closed loop gain converter written GAINLC GAINPWM
FESR
Filter Gain
Converter Gain
VOSC
GAINAMP
Frequency
Figure Converter Gain Frequency MOSFET Selection selection N-channel power MOSFETs determined RDS(ON), reverse transfer capacitance (CRSS) maximum output current requirement.The losses MOSFETs have components: conduction loss transition loss. upper lower MOSFET, losses approximately given following PUPPER Iout2 TC)(RDS(ON))D (0.5)(Iout)(VIN)(tsw)FS PLOWER Iout2 TC)(RDS(ON))(1-D) where IOUT load current temperature dependency RDS(ON) switching frequency switching interval duty cycle
Figure shows converter gain following guidelines will help design compensation network. 1.Select desired zero crossover frequency (1/5 1/10) >FO>FZ following equation calculate
Where:
gm=900uA/V 2.Place zero before filter double poles FLC: 0.75 Calculate equation:
pole half switching frequency: 0.5xFS
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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APW7062B
Application Information (Cont.)
Note that both MOSFETs have conduction losses while upper MOSFET include additional transition loss.The switching internal, tsw, function reverse transfer capacitance CRSS. Figure illustrates switching waveform internal MOSFET. (1+TC) term factor temperature dependency RDS(ON) extracted from "RDS(ON) Temperature" curve power MOSFET. single point grounding. Figure illustrates layout, with bold lines indicating high current paths. Components along bold lines should placed close together. Below checklist your layout:
Keep switching nodes (UGATE, LGATE
PHASE) away from sensitive small signal nodes since these nodes fast moving signals. There fore keep traces these nodes short possible.
Layout Considerations
high power switching regulator, correct layout important ensure proper operation regulator. general, interconnecting impedances should minimized using short, wide printed circuit traces. Signal power grounds kept separate finally combined using ground plane construction
ground return must return combine
COUT terminal.
Capacitor CBOOT should connected close
BOOT PHASE pins possible.
Voltage across drain source SFET
7062B
UGATE
Figure Switching waveform across MOSFET
igure ended iagram
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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APW7062B
Package Information
(150mil)
Millimeters Min. 1.477 0.102 0.331 0.191 8.558 3.82 1.274 5.808 0.382 6.215 1.274 0.228 0.015 Max. 1.732 0.255 0.509 0.2496 8.762 3.999 Min. 0.058 0.004 0.013 0.0075 0.336 0.150
Inches Max. 0.068 0.010 0.020 0.0098 0.344 0.157 0.050 0.244 0.050
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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APW7062B
Physical Specifications
Terminal Material Lead Solderability Packaging Solder-Plated Copper (Solder Material 90/10 63/37 SnPb Meets Specification RSI86-91, ANSI/J-STD-002 Category 2500 devices reel
(IR/Convection Reflow)
p-up Critical Zone
Reflow Condition
Temperature
p-down Preheat
Peak
Classificatin Reflow Profiles
Profile Feature Average ramp-up rate Preheat Temperature (Tsmin) Temperature (Tsmax) Time (min max) (ts) Time maintained above: Temperature (TL) Time (tL) Peak/Classificatioon Temperature (Tp) Time within actual Peak Temperature (tp) Ramp-down Rate Sn-Pb Eutectic Assembly 3°C/second max. 100°C 150°C 60-120 seconds 183°C 60-150 seconds table 10-30 seconds Pb-Free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds table 20-40 seconds
6°C/second max. 6°C/second max. minutes max. minutes max. Time 25°C Peak Temperature Notes: temperatures refer topside package .Measured body surface.
Copyright ANPEC Electronics Corp. Rev. Mar., 2005 www.anpec.com.tw
APW7062B
Classificatin Reflow Profiles(Cont.)
Table SnPb Entectic Process Package Peak Reflow peratures Package Thickness Volum Volum <350 <2.5 +0/-5°C +0/-5°C +0/-5°C +0/-5°C Table Pb-free Process Package Classification Reflow peratures Package Thickness Volum Volum Volum <350 350-2000 >2000 <1.6 +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* *Tolerance: device anufacturer/supplier shall assure process patibility including stated classification perature (this eans Peak reflow perature +0°C. exam 260°C+0°C) rated level.
Reliability Test Program
Test item SOLDERABILITY HOLT Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD Description 245°C, 1000 Bias @125°C Hrs, 100%RH, 121°C -65°C~150°C, Cycles VHBM 2KV, 200V 10ms, 100mA
Carrier Tape Reel Dimension
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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APW7062B
Carrier Tape Reel Dimension
Application
SOP-14 (150mil)
330REF
13.0 100REF 0.50 1.50 (MIN)
16.5REF
16.0 2.10
0.3±0.05
1.75
(mm)
Cover Tape Dimensions
Application SOP- Carrier Width Cover Tape Width 21.3 Devices Reel 2500
Customer Service
Anpec Electronics Corp. Head Office Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. 886-3-5642000 886-3-5642050 Taipei Branch 137, Lane 235, Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, 886-2-89191368 886-2-89191369
Copyright ANPEC Electronics Corp. Rev. Mar., 2005
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Synchronous Buck Controller Simple Single-Loop Control Design Vol

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