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Synchronous Buck Controller Fast Transient Response 0~85% Duty Ra


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APW7061
Synchronous Buck Controller
Fast Transient Response 0~85% Duty Ratio Excellent Output Voltage Regulation 0.8V Internal Reference Over Line Voltage Temperature
General Description
APW7061 voltage mode, synchronous cont roller which drives dual hannel MOSFETs integrates rols, monitoring protec tion funct ions into single package, which provides ontrolled power output under-voltage over-current protections. APW7061 provides excellent regulation output load variation. internal 0.8V temperature-compensated reference voltage designed meet various output voltage applications. power-on-reset (POR) circuit limits minimum opearting upply voltage ontroller working well. Over current protec tion achieved monit oring volt drop MOSFET, eliminating need current sensing resistor short circuit condition detected through pin. over-current protection triggers soft -start function until fault events removed, Under-voltage protection will shutdown directly. Pull COMP below 0.4V will shutdown controller, both gate drive signals will low.
Internal Soft-Start Typical Over Current Protection Sense Low-side MOSFET's RDS(ON) Under Voltage Lockout Small Converter Size 250kHz Free-running Oscillator 8-lead SOIC Package Lead Free Available (RoHS Compliant)
Applications
Graphic Cards Memory Power Supplies Cable MODEMs Boxes Low-Voltage Distributed Power Supplies
Pinouts
COMP LGATE BOOT UGATE PHASE
ANPEC reserves right make changes improve reliability manufacturability without notice, advise customers obtain latest version relevant information verify before placing orders. opyright ANPEC Electronics orp. Rev. Nov., 2005 www.anpec.com.tw
APW7061
Ordering Marking Information
APW7061
Lead Free Code Handling Code Temp. Range Package Code APW7061 APW7061 XXXXX Package Code SOP-8 Operating Junction Temp. Range Handling Code Tube Tape Reel Lead Free Code Lead Free Device Blank Original Device XXXXX Date Code
ANPEC d-fre ducts ntain comp attach matte rmin atio nish full compl iant with compa tibl both SnPb ad-free sold ieri ad-free produ exceed -free uireme /JEDEC classi ficati d-fre temp ture.
Block Diagram
Power-On Reset
BOOT
Soft Start Gate Control
IOCSET 250uA
UGATE
PHASE
50%VR
U.V.P Comparator
Comparator
O.C.P Comparator
LGATE
Error Triangle Wave
COMP
opyright ANPEC Electronics orp. Rev. Nov., 2005
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APW7061
Application Circuit
470uF 25mR 1N4148 LGATE BOOT UGATE PHASE 620R 0.01uF 0.1uF APM4220 2.2uH 100R SR24 2A/40V 2.32KF 2.5V APM4220 4.7uF 470uF 25mR 470uF 25mR
/SHDN 56pF APW7061 COMP
1000uF 6.3V 30mR
1000uF 6.3V 30mR
4.7uF
0.1uF
1.07KF
Absolute Maximum Ratings
Symbol VCC, LGATE Parameter GND, LGATE Rating 0~150 Unit
VBOOT, UGATE BOOT GND, UGATE PHASE Operating Junction Temperature TSDR VESD Storage Temperature Soldering Temperature Seconds) Minimum Rating
Recommended Operating Conditions
Symbol VBOOT Supply Voltage Boot Voltage Parameter Min. Nom. Max. Unit
Thermal Characteristics
Symbol Parameter Junction Ambient Resistance free (SOP-8)
Value
Unit
opyright ANPEC Electronics orp. Rev. Nov., 2005
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APW7061
Electrical Characteristics
Unless otherswise specified, these specifications apply over VCC= 12V, VBOOT 70oC. Typlcal values 25oC.
Symbol SUPPLY CURRENT IBOOT
Parameter
Test Conditions
APW7061 0.80
Unit
Nominal Supply BOOT Nominal Supply Rising Threshold Falling Threshold
UGATE LGATE Open UGATE Open
VP-P
POWER-ON-RESET
OSCILLATOR FOSC Free Running Frequency Ramp Upper Threshold Ramp Lower Threshold VOSC VREF Ramp Amplitude Reference Voltage Reference Voltage Tolerance ERROR AMPLIFIER Gain UGATE Duty Range Input Current GATE DRIVERS IUGATE UGATE ILGATE RLGATE Upper Gate Source Upper Gate Sink Lower Gate Source Lower Gate Sink Dead Time Under Voltage Level OCSET source current SOFT START SHUTDOWN Internal Soft-Start Interval Shutdown Threshold Shutdown Hysteresis
opyright ANPEC Electronics orp. Rev. Nov., 2005
VCC=12V
REFERENCE
VBOOT=12V, UGATE=6V IUGATE=0.3A VCC=12V, LGATE ILGATE =0.3A
PROTECTION Falling
COMP Falling
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APW7061
Functional Description
(Pin This provides supply voltage device, When rising above threshold 4.2V, device turned convers ely, when drops below falling threshold, device turned off. decoupling capacitor recommended. (Pin inverting input error amplifier, receives feedback voltage from external resistive divider across output OUT). output voltage determined COMP (Pin This output error amplifier. ternal resist capacitor work provide loop ompensation onverter Applicat Informat ion). Pull this below 0.4V will shutdown controller, forcing UGATE LGATE signals soft ycle will init iated upon release this pin. PHASE (Pin resistor (ROCSET) connected between this drain low-side MOSFET will determine over current limit. ernally generated 250uA current source will flow through this resistor, creating voltage drop. This voltage will compared with voltage across low-side MOSFET. threshold over current limit therefore given
VOUT
0.8V
where ROUT resistor connected from VOUT RGND resistor connected from GND. When voltage under VREF, will cause under voltage protection, shutdown device. Remove condit restart voltage, will enable again device. (Pin Signal ground UGATE (Pin This provides gate drive high-side MOSFET. BOOT (Pin This provides supply voltage high side driver. driving logic level N-channel MOSEFT, boots trap circuit create suitable driver' supply. LGATE (Pin This provides gate drive signal side MOSFET.
ILIMIT
OCSET DS(ON)
over current condit will soft tart funct over current condition removed. Because comparator delay time, time low-side MOSFET must longer than 800ns have over current protection work.
opyright ANPEC Electronics orp. Rev. Nov., 2005
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APW7061
Typical Characteristics
Power
Power Down
VCC(5V/div) VCC(5V/div)
VOUT(1V/div)
VOUT(1V/div)
Time (2ms/div)
Time (5ms/div)
Enable (COMP left open)
Shutdown(COMP pulled GND)
COMP(1V/div)
COMP(1V/div)
VOUT(1V/div) VOUT(1V/div)
Time (2ms/div)
Time (5ms/div)
opyright ANPEC Electronics orp. Rev. Nov., 2005
www.anpec.com.tw
APW7061
Typical Characteristics (Cont.)
UGATE Falling
VCC=12V, N=12V
UGATE Rising
VCC=12V, VIN=12V
LGATE(10V/div)
LGATE(10V/div)
PHASE(10V/div) PHASE(10V/div)
UGATE(10V/div)
UGATE(10V/div)
Time (50ns/div)
Time (50ns/div)
Over Current Protection Under Voltage Protection
VCC=12,VIN=12V VOUT=2.5V, L=2.2mH
VCC=12V,VIN=12V, VOUT =2.5V, ROCSET=1kW RDS(ON)=16mW, L=2.2mH, IOUT =15A
IL(10A/div)
IL(10A/div)
UGATE (20V/div)
UGATE (20V/div)
VOUT (1V/div)
VOUT (1V/div)
Time (10us/div)
Time (2us/div)
opyright ANPEC Electronics orp. Rev. Nov., 2005
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APW7061
Typical Characteristics (Cont.)
Supply Current Supply Voltage
Load Transient
VCC=12V VIN=12V VOUT =3.3V OUT=470mFx2 ESR=22.5mW L=1.5mH f=400kHz
Supply Current (mA)
ICC(SHDN)
VOUT(100mV/div)
IOUT1(5A/div)
Supply Voltage
Time (20us/div)
UGATE Source Current UGATE Voltage
UGATE Sink Current UGATE Voltage
UGATE Source Current
VBOOT=12V
VBOOT=12V
UGATE Sink Current
UGATE Voltage
UGATE Voltage
opyright ANPEC Electronics orp. Rev. Nov., 2005
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APW7061
Typical Characteristics (Cont.)
LGATE Source Current LGATE Voltage
VCC=12V
LGATE Sink Current LGATE Voltage
VCC=12V
LGATE Source Current
LGATE Sink Current
LGATE Voltage
LGATE Voltage
Sink Current Comp Voltage
VCC=12V
Source Current Comp Voltage
VCC=12V
Source Current (µA)
Sink Current (µA)
Comp Voltage
Comp Voltage
opyright ANPEC Electronics orp. Rev. Nov., 2005
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APW7061
Typical Characteristics (Cont.)
Reference Voltage Junction Temperature
Reference Voltage
0.798
0.796
0.794
0.792
0.79
Junction Temperature (°C)
Application Information
Component Selection Guidelines
Output Capacitor Selection election determined required effective series resist ance (ESR) voltage tual apacit requirement Therefore select high performance capacitors that intended switching regulator applications. some applications, multiple capacitors have paralled achieve desired value. tantalum capacitors used, make sure they surge tested manufactures. doubt, consult capacitors manufac turer. Input Capacitor Selection input capacitor chos based volt urrent ing. reliable operation, select capacitor voltage rating
opyright ANPEC Electronics orp. Rev. Nov., 2005
least times higher than maximum input voltage. maximum urrent rating requirement approximately IOUT/2 where IOUT load current. During power input capacitors have handle large amount surge current. tantalum capacitors make they surge manufact ures doubt, onsult apac manufac turer. high frequency decoupling, ceramic capacitor between 0.1uF connected between ground pin.
Inductor Selection inductanc inductor determined output voltage requirement. larger inductance, lower inductor' current ripple. This will translate
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APW7061
Application Information (Cont.)
Inductor Selection (Cont.) into lower output ripple voltage. ripple current ripple voltage approximated IRIPPLE VOUT VOUT FESR poles zero this transfer function are:
COUT
COUT
VOUT IRIPPLE where switching frequency regulator. There tradeoff exists between inductor' ripple current regulator load transient response time smaller inductor will give regulator faster load trans ient ponse expens higher ripple current vice versa. maximum ripple current occurs maximum input voltage. good starting point choose ripple current approximately maximum output current. Once induct ance value been chosen, elect inductor that capable carrying required peak current without going into aturation. induc tors, ially core that make ferrite, ripple current will increase abruptly when saturates. This will result larger output ripple voltage. Compensation output filter introduces double pole, which contributes 40dB/decade gain slope degrees phase shift control loop. compensation network between COMP ground should added. simplest loop compensation network shown Figure. filter consist output induc output capacitors. transfer function filter given GAINLC
double poles filter, FESR zero introduced output capacitor.
PHASE
COUT
Output
Figure Output Filter
-40dB/dec FESR Gain -20dB/dec
Frequency
Figure Output Filter Gain Frequency modulator shown Figure. input output error amplifier output node. trans func tion modulator given
COUT COUT
GAINPWM
opyright ANPEC Electronics orp. Rev. Nov., 2005
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APW7061
Application Information (Cont.)
Compensation (Cont.)
Driver Comparator Output Error Amplifier Driver PHASE
losed loop gain converter written GAINLC GAINPWM
GAINAMP
Figure hows converter gain following guidelines will help ompens network. 1.Select desired zero crossover frequency (1/5 1/10) >FO>FZ following equation calculate
Figure Modulator compens ation circuit hown Figure introduce zero introduces pole reduce switc hing noise. transfer function error amplifier given
Where:
VOSC
900uA/V 2.Place zero before filter double poles FLC: 0.75 Calculate equation:
GAINAMP
poles zero compensation network are:
0.75
pole half switching frequency: Calculate equation:
FZ=0.75FLC
20log(gmR3)
FP=0.5FS
Error Amplifier COMP
Compensation Gain
Gain
VOSC
FESR
Converter Gain
Filter Gain
Frequency
Figure Compensation Network
opyright ANPEC Electronics orp. Rev. Nov., 2005
Figure Converter Gain Frequency
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APW7061
Application Information (Cont.)
MOSFET Selection election hannel power MOSFETs determined RDS(ON), reverse transfer capacitance RSS) imum urrent requirement MOSFE have components: conduc tion loss transition loss. upper lower MOSFE losses approximately given following PUPPER Iout TC)(RDS(ON))D (0.5)(Iout)(VIN)(tsw)FS
Keep switching nodes (UGATE, LGATE
away from ensit small signal nodes since these nodes fast moving signals. Therefore keep traces these nodes short possible.
ground return must return combine
COUT terminal.
Capacitor CBOOT should connected close
BOOT PHASE pins possible.
PLOWER Iout TC)(RDS(ON))(1-D)
where IOUT load current temperature dependency RDS(ON) switching frequency switching interval duty cycle Note that both MOSFETs have conduction losses while upper MOSFET include additional transition loss. switching internal, tsw, function reverse transfer capac CRSS. Figure illustrat switching waveform internal MOSFET. (1+TC) term factor temperature dependency RDS(ON) extracted from "RDS(ON) Temperature" curve power MOSFET
Voltage across drain source MOSFET
Time
Figure Switching waveform across MOSFET
Layout Considerations high power switching regulator, correct layout important ensure proper operation regulator. general, erconnec ting impedanc should minimized using short, wide printed circuit traces. Signal power grounds kept separate finally combined using ground plane cons truction single point grounding. Figure illustrates layout, bold lines indic high urrent Component along bold lines should placed close together. Below checklist your layout: Figure Recommended Layout Diagram
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PGND APW7061
LGATE UGATE PHASE
opyright ANPEC Electronics orp. Rev. Nov., 2005
APW7061
Package Information
SOP-8 Reference JEDEC Registration MS-012)
0.004max.
Millimeters Min. 1.35 0.10 4.80 3.80 5.80 0.40 0.33 1.27BSC Max. 1.75 0.25 5.00 4.00 6.20 1.27 0.51 Min. 0.053 0.004 0.189 0.150 0.228 0.016 0.013
0.015X45
Inches Max. 0.069 0.010 0.197 0.157 0.244 0.050 0.020 0.50BSC
opyright ANPEC Electronics orp. Rev. Nov., 2005
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APW7061
Physical Specifications
Terminal Material Lead Solderability Solder-Plated Copper (Solder Material 90/10 63/37 SnPb), 100%Sn Meets Specification RSI86-91, ANSI/J-STD-002 Category
(IR/Convection Reflow)
Reflow Condition
Ramp-up
Critical Zone
Temperature
Tsmax
Tsmin Ramp-down Preheat
Peak
Time
Classification Reflow Profiles
Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Average ramp-up rate 3°C/second max. C/second max. Preheat 100°C 150° Temperature (Tsmin) 150°C 200° Temperature (Tsmax) 60-120 seconds 60-180 seconds Time (min max) (ts) Time maintained above: 183°C 217° Temperature (TL) 60-150 seconds 60-150 seconds Time Peak/Classificatioon Temperature (Tp) table table Time within actual 10-30 seconds 20-40 seconds Peak Temperature (tp) Ramp-down Rate 6°C/second max. C/second max. minutes max. minutes max. Time Peak Temperature Notes: temperatures refer topside package .Measured body surface.
opyright ANPEC Electronics orp. Rev. Nov., 2005 www.anpec.com.tw
APW7061
Classification Reflow Profiles(Cont.)
Table SnPb Entectic Process Package Peak Reflow Temperatures Package Thickness Volume <350 <2.5 +0/-5° +0/-5° Volume +0/-5° +0/-5°
Table Pb-free Process Package Classification Reflow Temperatures Package Thickness Volume Volume Volume <350 350-2000 >2000 <1.6 +0°C* +0°C* +0°C* +0°C* *Tolerance: device manufacturer/supplier shall assure process compatibility including stated classification temperature (this means Peak reflow temperature example °C+0° rated level.
Reliability Test Program
Test item SOLDERABILITY HOLT Method MIL-STD-883D-2003 MIL-STD 883D-1005.7 JESD-22-B, A102 MIL-STD 883D-1011.9 Description 245°C,5 1000 Bias 125°C Hrs, 100% 121°C -65°C 150°C, Cycles
Carrier Tape Reel Dimensions
opyright ANPEC Electronics orp. Rev. Nov., 2005
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APW7061
Reel Dimensions
Application SOP- 12.4 1.75±
+1.5 12.75+ 0.15
1.55 +0.1 1.55+ 0.25
0.3± 0.013
Cover Tape Dimensions
Application SOP- Carrier Width Cover Tape Width Devices Reel 2500
Customer Service
Anpec Electronics Corp. Head Office No.6, Dusing Road, SBIP, Hsin-Chu, Taiwan, R.O.C. 886-3-5642000 886-3-5642050 Taipei Branch 137, Lane 235, Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, 886-2-89191368 886-2-89191369
opyright ANPEC Electronics orp. Rev. Nov., 2005
www.anpec.com.tw

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