Dual Advanced Source-Sink Linear Controller Regulated Voltages pr

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APW7046
Dual Advanced Source-Sink Linear Controller
Regulated Voltages provided
General Description
APW7046 provides power controls protections three output voltages AGP/PCI Graphic Card applications. integrates controllers SOURCE-SINK linear controller, well monitor protection functions into single package. converter (PWM1) supplies VCORE(1.5V) with standard buck converter. other standard buck converter (PWM2) regulates VMEM(2.5V) power memory. SOURCE-SINK linear controller control external MOSFETs linear regulator with capability sourcing sinking current. regulates (1.25V) power Termination voltage. Additional built-in over-voltage protection (OVP) will started when VCORE VMEM output above 115% each setting (VCORE VMEM). function will shutdown output voltages until re-powering each converter, over-current function monitors output current sensing voltage drop across MOSFET`s rDS(ON) eliminating need current sensing resistor.
Standard Buck Converter VCORE
(1.15~1.50V)
Standard Buck Converter VMEM
(2.40~3.15V)
-Linear Controller with SOURCE-SINK Regulation VTT(1.25V)
Simple Single-Loop Control Design
Voltage-Mode Control
Excellent Output Voltage Regulation
VCORE Output Over Temperature VMEM Output ±1.5% Over Temperature Output ±25mV Over Temperature Min. 1.7V
Fast Transient Response
Built-in Feedback Compensation Full 100% Duty Ratio Over-Voltage Over-Current Fault Monitor Constant Frequency Operation(200kHz) pins, SOIC Package
Description
BOOT UGATE PHASE2 MEM2 MEM1 MEM0 CORE2 CORE1 CORE0 OCSET2
UGATE
Applications
Power Regulation AGP/PCI Graphics Power Regulation SSTL-2 Termination
PHASE1
URCE SINK
OCSET1
ANPEC reserves right make changes improve reliability manufacturability without notice, advise customers obtain latest version relevant information verify before placing orders. Copyright ANPEC Electronics Corp. Rev.A.2 Mar., 2002 www.anpec.com.tw
APW7046
Ordering Marking Information
7046
ange ackage Code ackage Code ange Tube Tape Reel
7046K
7046 XXXXX
Block Diagram
CSET1
OVP1
200µA
eset
115%
ATE1 PHASE1 VSEN1
CORE0 CORE1 CORE2 VSEN2
illa
SOURCE OVP2 115%
ATE2 PGND PHASE2
200uA
CSET2
Absolute Maximum Ratings
Symbol TSTG Supply Voltage Input Output Voltage Operating Ambient Temperature Junction Temperature Storage Temperature Soldering Temperature
Parameter
Rating -0.3 +0.3 Range Range Range +150 seconds
Unit
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Copyright ANPEC Electronics Corp. Rev. Rev.A.2 Mar., 2002
APW7046
Thermal Characteristics
Symbol Parameter Thermal Resistance Free SOIC SOIC (with 3in2 Copper) Value Unit °C/W
Electrical Characteristics
Unless otherwise specified, these specifications apply over VCC=VBOOT=12V TA=0~70°C. Typical values refer TA=25°C.
Supply urrent inal upply urrent Shutdow Supply urrent ising Threshold Falling Threshold Input High Voltage Input Voltage scillator Free Running Frequency plitude Controller eference Voltage eference Voltage CORE Accuracy E0-C Input Voltage E0-C Input Voltage eference Voltage Accuracy Input Voltage Input Voltage E-SIN Linear Controller egulation Voltage accuracy Drive urrent rive Current
Copyright ANPEC Electronics Corp. Rev. Rev.A.2 Mar., 2002
Param eter
Test Conditions =0V, ATE1,UG Vocset=3V Vocset=3V
7046 Typ.
Power-on Reset
-1.5 egulator Sourcing Sinking urrent +1.5
0.5VIN
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APW7046
Electrical Characteristics (Cont.)
Unless otherwise specified, these specifications apply over VCC=VBOOT=12V TA=0~70°C. Typical values refer TA=25°C.
Symbol Parameter Test Conditions VIN=2.5V VCC=VBOOT=12V, VUGATE1,2=6V VCC=12V,VUGATE1,2=6V APW7046 Typ. Max. Unit
Min.
IVIN Input Bias Current Controllers Gate Drivers IUGATE RGATE Protection VSEN1,2 trip point (VSEN1/VCORE VSEN2/VMEM VSEN1,2 O.V. Hysteresis IOCSET Ocset Current Source Soft start Current UGATE1,2 Source UGATE Sink
0.74
VSEN Rising
Vocset=3V
Functional Description
(Pin Provide +12V bias supply this pin. This also provides gate bias charge MOSFETs SOURCE-SINK regulator. voltage this monitored Power-On Reset (POR) purposes. UGATE1 (Pin Connect this MOSFET gate PWM1 converter. This provides gate drive MOSFET. PHASE1 (Pin Connect this PWM1 converter's MOSFET source.This used monitor voltage drop across MOSFET over-current protection. (Pin Connect capacitor from this ground.This capacitor, along with internal 28uA current source,
Copyright ANPEC Electronics Corp. Rev. Rev.A.2 Mar., 2002
sets soft-start interval power controls preventing outputs from overshoot well limiting input current (Pin shuts down power outputs. compatible logic level high signal applied this immediately discharges soft-start capacitor,disabling power outputs. When re-enabled, undergoes soft-start cycle. Left open, this pulled internal pull-down resistor, enabling operation. SOURCE (Pin Connect this upper MOSFET gate drive SOURCE-SINK regulator. This drives upper external MOSFET sourcing regulator. SINK (Pin Connect this lower MOSFET gate drive
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APW7046
Functional Description (Cont.)
SOURCE-SINK regulator. This drives lower external MOSFET sinking regulator. (Pin Connect this output SOURCE-SINK regulator. This provides voltage feedback path sourcing sinking regulators. This internally connected negative input SOURCE controller, also connected positive input SINK controller. (Pin Connect this VMEM fixed voltage source. voltages, about 0.5VIN, generated internal resistor divider reference voltages sourcing sinking regulators. sinking regulation voltage higher than sourcing prevent direct current path through upper lower MOSFETs. OCSET1 (Pin Connect resistor (ROCSET from this drain PWM1 converter's MOSFET. ROCSET, internal 200uA current source (IOCSET MOSFET's onresistance(rDS(ON)) converter's over-current (OC) trip point according following equation:
OCSET
(Pin Signal ground voltage levels measured with respect this pin. VSEN2 (Pin This connected PWM2 converter's output voltage provide voltage feedback path. overvoltage protection(OVP) comparator uses this monitor output voltage over- voltage protection. OCSET2 (Pin
Connect resistor (ROCSET from this drain PWM2 converter's MOSFET. function this similar OCSET1(pin detection purposes.
CORE0-2 (Pin 15-17) CORE0-2 TTL-compatible logic level input pins 3-bit DAC. states three pins internal reference voltage (VCORE) PWM1 converter also threshold voltage PWM1 converter. MEM0-2 (Pin 18-20) MEM0-2 TTL-compatible logic level input pins other 3-bit DAC. states three pins internal reference voltage (VMEM) PWM2 converter also threshold voltage PWM2 converter. PGND (Pin Connect this anode flywheel diodes converters. PHASE2 (Pin Connect this PWM2 converter's MOSFET source.This used monitor voltage drop across MOSFET over-current protection.
IPEAK
over-current trip cycles soft-start function. voltage this monitored Power-On Reset (POR) purposes. VSEN1 (Pin This connected PWM1 converter's output voltage provide voltage feedback path. overvoltage protection(OVP) comparator uses this monitor output voltage over- voltage protection
Copyright ANPEC Electronics Corp. Rev. Rev.A.2 Mar., 2002
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APW7046
Functional Description
UGATE2 (Pin Connect this MOSFET gate PWM2 converter. This provides gate drive MOSFET. BOOT (Pin Connect this +12V. This provides bias voltage MOSFET drivers.
Table Table
APW7046
APW7046
CORE2 MEM2
Name CORE1 CORE0 Name MEM1 MEM0
CORE Voltage 1.15 1.20 1.25 1.30 1.35 1.40 1.45 1.50 Voltage 2.40 2.45 2.50 2.55 2.60 2.65 2.70 2.75
CORE2 MEM2
Name CORE1 CORE0 Name MEM1 MEM0
CORE Voltage 1.15 1.20 1.25 1.30 1.35 1.40 1.45 1.50 Voltage 2.80 2.85 2.90 2.95 3.00 3.05 3.10 3.15
Copyright ANPEC Electronics Corp. Rev. Rev.A.2 Mar., 2002
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APW7046
Simplified Power System Diagram
tandard erter
7046
tandard erter
+3.3V
CORE
SOURCE-SINK Linear onverter
Typical Application Circuit
10uF 200pF 1.5K
200pF 1.5K
3.3V
10uF 330uF 10uF 330uF 10uF
4.7uH
PM9410
PM9410 MBRD835L
7.8uH
CORE
330uF 330uF
VMEM
MBRD835L
VSEN
VSEN
330uF
VMEM
330uF PM3055
MEM2 MEM1 MEM0 CORE2 CORE1 CORE0
0.1uF
330uF
PM3055
0.68uF
C10, C13, 330uF/6.3V tantalum Capac itor
Copyright ANPEC Electronics Corp. Rev. Rev.A.2 Mar., 2002
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APW7046
Typical Performance
SOURCE-SINK Linear Regulator Transient Response output capacitor 330uF (Low tantalum capacitor) Define output cerrent (IVTT) sourcing from regulator positive. interval current transitions figures smaller than 1uS. figure IVTT transition from -0.2A figure IVTT transition from 0.2A -4A.
Figure
Figure
Copyright ANPEC Electronics Corp. Rev. Rev.A.2 Mar., 2002
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APW7046
Packaging Information
300mil Reference JEDEC Registration MS-013)
GAUGE PLANE
Millimeters Min. 2.35 0.10 0.33 7.40 0.40 Max. 2.65 0.30 0.51 7.60 10.65 1.27
Variations- Variations SO-16 SO-18 SO-20 SO-24 SO-28 SO-14 Min. 10.10 11.35 12.60 15.20 17.70 8.80 Max. 10.50 11.76 15.60 18.11 9.20
Inches Min.
Variations- Max. Variation Min. Max. SO-16 SO-18 SO-20 SO-24 SO-28 SO-14 0.398 0.447 0.496 0.599 0.697 0.347 0.413 0.463 0.512 0.614 0.713 0.362
0.093 0.1043 0.004 0.0120 0.013 0.020 variations 0.2914 0.2992 0.050BSC 0.394 0.016 0.419 0.050
variations 1.27BSC
variations
variations
Copyright ANPEC Electronics Corp. Rev. Rev.A.2 Mar., 2002
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APW7046
Physical Specifications
Terminal Material Lead Solderability Packaging Solder-Plated Copper (Solder Material 90/10 63/37 SnPb), 100%Sn Meets Specification RSI86-91, ANSI/J-STD-002 Category 1000 devices reel SO-16 2500 devices reel SSOP-16.
Reflow Condition
(IR/Convection Reflow)
ritical Zone
p-up
p-down Preheat
Peak
Classificatin Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly Large Body Small Body
Pb-Free Assembly Large Body Small Body 3°C/second max. 150°C 200°C 60-180 seconds 3°C/second 217°C 60-150 seconds +0/-5°C +0/-5°C 10-30 seconds 20-40 seconds
Average ramp-up rate 3°C/second max. Preheat Temperature (Tsmin) 100°C Temperature (Tsmax) 150°C Time (min max)(ts) 60-120 seconds Tsmax Ramp-up Rate Tsmax Temperature(TL) 183°C Time (tL) 60-150 seconds Peak Temperature(Tp) +0/-5°C +0/-5°C Time within actual Peak 10-30 seconds 10-30 seconds Temperature(tp) Ramp-down Rate 6°C/second max. minutes max. Time 25°C Peak Temperature
Copyright ANPEC Electronics Corp. Rev. Rev.A.2 Mar., 2002
6°C/second max. minutes max.
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Note: temperatures refer topside package. Measured body surface.
APW7046
Reliability test program
Test item SOLDERABILITY HOLT Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD Description 245°C 1000 Bias Hrs, 121°C -65°C 150°C, Cycles VHBM 2KV, 200V 10ms 100mA
Carrier Tape Reel Dimensions
Application
330±1
±1.5
12.75 0.15
24.4
1.75±
SOP-
11.5 1.55 +0.1 1.5+ 0.25
10.9 15.9±
3.1± 0.35±0.05
(mm)
Copyright ANPEC Electronics Corp. Rev. Rev.A.2 Mar., 2002
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APW7046
Cover Tape Dimensions
Application SOP- Carrier Width Cover Tape Width 21.3 Devices Reel 1000
Customer Service
Anpec Electronics Corp. Head Office Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. 886-3-5642000 886-3-5642050 Taipei Branch 137, Lane 235, Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, 886-2-89191368 886-2-89191369
Copyright ANPEC Electronics Corp. Rev. Rev.A.2 Mar., 2002
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