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1.1W Mono Low-Voltage Audio Power Amplifier Features Operati


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APA0710/0711
1.1W Mono Low-Voltage Audio Power Amplifier
Features
Operating Voltage 2.6V-5.5V APA0710 Compatible with TPA711 APA0711 Compatible with TPA751 Bridge-Tied Load (BTL) Single-Ended (SE) Modes Operation (for APA0710 only) Supply Current IDD=1.3mA VDD=5V ,BTL mode IDD=0.9mA VDD=3.3V ,BTL mode Shutdown Current IDD=0.1µA Distortion 630mW, VDD=5V, BTL, RL=8 THD+N=0.15% 280mW, VDD=3.3V, BTL, RL=8 THD+N=0.15%
General Description
APA0710 bridged-tied load (BTL) singledended (SE) audio power amplifier developed especially low-voltage applications where internal speakers external earphone operation required. APA0711 only audio power amplifier developed especially low-voltage applications where internal speakers required. Operating with supply, APA0710/1 deliver 1.1W continuous power into load THD+N throughout voice band frequencies. Although this device characterized 20kHz,its operation optimized narrow band applications such wireless communications. configuration eliminates need external coupling capacitors output most applications, which particularly important small battery-powered equipment. unique feature APA0710 that allows amplifier switch from when earphone drive required. This eliminates complicated mechanical switching auxiliary devices just drive external load. This device features shutdown mode power-sensitive applications with special depop circuitry eliminate speaker noise when exiting shutdown mode. APA0710/1 available 8-pin 8-pin MSOP-P with enhanced thermal pad.
Output Power THD+N 900mW, VDD=5V, BTL, RL=8 400mW, VDD=3.3V, BTL, RL=8 THD+N -1.1W VDD=5V, BTL, RL=8 -480mW VDD=3.3V, BTL, RL=8
Depop Circuitry Integrated Thermal Shutdown Protection Over Current Protection Circuitry High supply voltage ripple rejection Surface-Mount Packaging MSOP-P (with enhanced thermal pad) power package available SOP-8 package
Applications
Mobil Phones PDAs Digital Camera Portable Electronic Devices
Lead Free Available (RoHS Compliant)
ANPEC reserves right make changes improve reliability manufacturability without notice, advise customers obtain latest version relevant information verify before placing orders. Copyright ANPEC Electronics Corp. Rev. Oct., 2005 www.anpec.com.tw
APA0710/0711
Description
APA0710
Shutdown Bypass SE/BTL
APA0711
VOGND Shutdown Bypass
VOGND
SOP-8 APA0710
Shutdown Bypass SE/BTL
SOP-8 APA0711
VOGND Shutdown Bypass
VOGND
MSOP-8-P internal connection
MSOP-8-P
Thermal (connected plane better heat dissipation)
Ordering Marking Information
APA0710/1 Lead Free Code Handling Code Temp. Range Package Code APA0710/1 APA0710/1 APA0710/1 XXXXX A0710/1 Package Code SOP-8 MSOP-8-P Temp. Range Handling Code Tape Reel Lead Free Code Lead Free Device Blank Original Device XXXXX Date Code XXXXX Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials 100% matte plate termination finish; which fully compliant with RoHS compatible with both SnPb lead-free soldiering operations. ANPEC lead-free products meet exceed lead-free requirements IPC/JEDEC STD-020C classification lead-free peak reflow temperature.
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Block Diagram
Audio Input Bypass
VoFrom System Control From Jack
Shutdown SE/BTL Bias Control
APA0710
Bypass
From Shutdown Bias trol
APA0711
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Absolute Maximum Ratings
(Over operating free-air temperature range unless otherwise noted.)
Symbol TSTG VESD
Note: 1.APA0710/1 integrated internal thermal shutdown protection when junction temperature ramp 170°C 2.Human body model: C=100pF, R=1500, positives pulses plus negative pulses 3.Machine model: C=200pF, L=0.5µF, positive pulses plus negative pulses
Parameter Supply Voltage Input Voltage Range, Shutdown, SE/BTL Operating Ambient Temperature Range Maximum Junction Temperature Storage Temperature Range Soldering Temperature, seconds Electrostatic Discharge Power Dissipation
Rating -0.3 -0.3 VDD+0.3 Internally Limited* +150 -2000 2000*
Unit
Internally Limited
Recommended Operating Conditions
Symbol Parameter Supply Voltage High-Level Voltage Low-Level Voltage Shutdown, Shutdown SE/BTL Shutdown, Shutdown SE/BTL Test Conditions Min. 0.9VDD 0.9VDD-1 Max. Unit
Thermal Characteristics
Symbol RTHJA Parameter Thermal Resistance from Junction Ambient Free MSOP-8-P* SOP-8 °C/W Value Unit
3.42in printed circuit board with trace copper through vias 12mil diameter vias. thermal MSOP-8-P package with solder printed circuit board.
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Electrical Characteristics
Electrical Characteristics Specified Free Temperature
3.3V, 25°C (unless otherwise noted)
Symbol IDD(SD)
Parameter Output Offset Voltage Supply Current Supply Current, Shutdown Mode
Test Conditions mode, mode, Shutdown,
APA0710/1 Min. Typ. Max. 0.55 0.15
Unit
|IH|
Shutdown, SE/BTL, Shutdown,
|IL|
Shutdown, SE/BTL,
Operating characteristic, 3.3V, 25°C, THD+N PSRR Output Power (Note mode, mode, Total Harmonic Distortion 280mW, mode, Plus Noise (Note Maximum Output Power Gain THD+N Bandwidth Unity-Gain Bandwidth Open Loop Power Supply Rejection Ratio (Note1) Noise Output Voltage Wake-up time 1µF, mode, 1µF, mode, Gain 0.1µF µV(rms)
VDD= 25°C (unless otherwise noted)
Symbol IDD(SD)
Parameter Output Offset Voltage Supply Current Supply Current Shutdown Mode
Test Conditions mode, mode,
APA0710/1 Min. Typ. Max. 0.75
Unit
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Electrical Characteristics(Cont.)
Electrical Characteristics Specified Free Temperature (Cont.)
VDD= 25°C (unless otherwise noted)
Symbol
Parameter
Test Conditions Shutdown,
APA0710/1 Min. Typ. Max. 0.15
Unit
|IH|
Shutdown, SE/BTL, Shutdown,
|IL|
Shutdown, SE/BTL,
Operating characteristic, 25°C, mode, Total Harmonic Distortion 630mW, mode, THD+N (Note Plus Noise Maximum Output Power Gain THD+N Bandwidth Unity-Gain Bandwidth Open Loop PSRR Power Supply Rejection (Note1) Ratio Noise Output Voltage Wake-up time 1µF, mode, 1µF, mode, Gain 0.1µF Output Power
(Note
mode,
µV(rms)
Note1 Output power measured output terminals device f=1KHz.
Description
APA0710
Name Shutdown Bypass SE/BTL VONo Description Shutdown mode control signal input, place entire shutdown mode when held high. Bypass When SE/BTL held low, APA0710 mode. When SE/BTL held high, APA0710 mode audio input terminal Supply voltage input Ground connection circuitry negative output mode high-impedance output mode
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positive output modes
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
APA0710/0711
Description
APA0711
Name Shutdown Bypass INVO+ VONo
Description Shutdown mode control signal input, place entire shutdown mode when held low. Bypass non-inverting input. typically tied Bypass terminal. inverting input. typically used audio input terminal. Supply voltage input pin. Ground connection circuitry.
positive output.
negative output.
Typical Application Circuit
APA0710 Application
Audio Input
Bypass
0.47
100k 100k Shutdown SE/BTL Bias Control
From System Control
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Typical Application Circuit (Cont.)
APA0711 Application
VDD/2 ININ+
Audio Input
0.47
From ystem Control Shutdown Bias Control
APA0711 Differential Input Application
VDD/2 ININ+
Audio Input- 0.47
Audio Input+
Bypass
0.47
From Control Shutdown Bias Control
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Typical Characteristics
PSRR Frequency
PSRR Frequency
Ripple Rejection Ration (dB)
No-Capacitor
Ripple Rejection Ration (dB)
No-Capacitor
CB=1µF
CB=0.1µF
CB=1µF
CB=0.1µF
CB=2.2µF
CB=2.2µF
VDD=3.3V RL=8
VDD=5V RL=8
-100
-100
Frequency (Hz)
Frequency (Hz)
PSRR Frequency
Supply Current Supply Voltage
1600
CB=1µF
RF=10k
1400
Ripple Rejection Ration (dB)
Supply Current (µA)
1200
BTL(SE/BTL=0.1VDD)
1000
VDD=3.3V
SE(SE/BTL=0.9VDD)
VDD=5V
-100
Frequency (Hz)
Supply Voltage(V)
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Typical Characteristics (Cont.)
Supply Current Supply Voltage
0.12
Output Power Supply Voltage
1200
RF=10k
1000
THD+N=1% f=1kHz
Supply Current (uA)
Output Power (mW)
0.11
RL=8
0.09
RL=32
0.08
Supply Voltage(V)
Supply Voltage(V)
Output Power Supply Voltage
1000
Output Power Load Resistance
THD+N=1% f=1kHz
THD+N=1% f=1kHz
Output Power (mW)
Output Power (mW)
RL=8
VDD=5V
RL=32
VDD=3.3V
Supply Voltage(V)
Load Resistance()
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Typical Characteristics (Cont.)
Output Power Load Resistance
THD+N Frequency
THD+N=1% f=1kHz
VDD=3.3V Po=250mW RL=8
AV=-20V/V
Output Power (mW)
VDD=5V
THD+N
AV=-10V/V
AV=-2V/V
VDD=3.3V
0.01
Load Resistance()
Frequency (Hz)
THD+N Frequency
THD+N Output Power
VDD=3.3V RL=8 AV=-2V/V Po=50mW Po=125mW
VDD=3.3V f=1kHz AV=-2V/V
THD+N
THD+N
RL=8
Po=250mW
0.01
0.01
Frequency (Hz)
Output Power
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Typical Characteristics (Cont.)
THD+N Output Power
THD+N Frequency
f=10kHz
VDD=5V Po=700mW RL=8 AV=-20V/V
f=20kHz
THD+N
THD+N
AV=-10V/V
f=1kHz
f=20Hz
VDD=3.3V RL=8 CB=1µF AV=-2V/V
AV=-2V/V
0.01 0.01
0.01
Output Power
Frequency (Hz)
THD+N Frequency
THD+N Output Power
VDD=5V RL=8 AV=-2V/V Po=50mW Po=700mW
VDD=5V f=1kHz AV=-2V/V
THD+N
THD+N
RL=8
Po=350mW
0.01
0.01
Frequency (Hz)
Output Power
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Typical Characteristics (Cont.)
THD+N Output Power
THD+N Frequency
VDD=3.3V Po=30mW RL=32 AV=-10V/V
f=10kHz
f=20kHz
THD+N
THD+N
AV=-5V/V
f=1kHz
VDD=5V RL=8 CB=1µF =2V/V
0.01 0.01
f=20Hz
AV=-1V/V
0.001
Output Power
Frequency (Hz)
THD+N Frequency
VDD=3.3V
THD+N Output Power
VDD=3.3V f=1kHz RL=32 AV=-1V/V
RL=32 AV=-1V/V
THD+N
Po=10mW
THD+N
Po=15mW
0.01
Po=30mW
0.01
0.001
0.001 0.02
0.025
0.03
0.035
0.04
0.045
0.05
Frequency (Hz)
Output Power
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Typical Characteristics (Cont.)
THD+N Output Power
THD+N Frequency
TTTTT TTTTTTTT TTTTTTTTTT TTTTTTT
VDD=3.3V RL=32 AV=-1V/V
Po=60mW RL=32 AV=-10V/V
f=20Hz
THD+N
THD+N
AV=-5V/V
f=20kHz f=10kHz
0.01
f=1kHz
0.01
AV=-1V/V
0.001 0.002
0.01
0.001
Output Power
Frequency (Hz)
THD+N Frequency
THD+N Output Power
VDD=5V RL=32 AV=-1V/V
VDD=5V f=1kHz RL=32 AV=-1V/V
THD+N
Po=15mW Po=30mW
THD+N
0.01
Po=60mW
0.01
0.001
0.02
0.04
0.06
0.08
0.12
0.14
Frequency (Hz)
Output Power
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Typical Characteristics (Cont.)
THD+N Output Power
THD+N Frequency
VDD=5V RL=32 AV=-1V/V
VDD=3.3V Po=0.1mW RL=10k
THD+N
THD+N
f=20kHz f=20Hz
AV=-2V/V
AV=-1V/V
0.01
f=10kHz
AV=-5V/V
0.01 0.002
f=1kHz
0.01
Output Power
Frequency (Hz)
THD+N Frequency
THD+N Output Power
VDD=3.3V RL=10k AV=-1V/V
THD+N
VDD=3.3V f=1kHz RL=10k AV=-1V/V
THD+N
Po=0.1mW Po=0.05mW
0.01
Po=0.13mW
0.01
Frequency (Hz)
Output Power (µW)
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Typical Characteristics (Cont.)
THD+N Output Power
THD+N Frequency
VDD=3.3V RL=10k AV=-1V/V
VDD=5V Po=0.3mW RL=10k
THD+N
f=20Hz f=20kHz
THD+N
AV=-5V/V
0.01
AV=-1V/V AV=-2V/V
0.01
f=1kHz
f=10kHz
0.001
Output Power (µW)
Frequency (Hz)
THD+N Frequency
THD+N Output Power
VDD=5V RL=10k AV=-1V/V
THD+N
VDD=5V f=1kHz RL=10k AV=-1V/V
THD+N
Po=0.2mW Po=0.1mW
0.01
0.01
Po=0.3mW
0.001
0.001
Frequency (Hz)
Output Power (µW)
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Typical Characteristics (Cont.)
THD+N Output Power
Close Loop Gain Phase Frequency
+220
VDD=5V RL=10k AV=-1V/V
Close Loop Gain (dB)
+180
Phase
+140
THD+N
f=20Hz
f=20kHz f=10kHz
0.01
+100
Gain
f=1kHz
0.001
VDD=3.3V RL=8 AV=-4V/V Po=250mW
100k
Output Power (µW)
Frequency (Hz)
Close Loop Gain Phase Frequency
+220
Close Loop Gain Phase Frequency
+300
Gain Phase
+260 +220 +180
Close Loop Gain (dB)
Close Loop Gain (dB)
+180
+100
Phase(°)
Phase
+140
+100
Gain
VDD=5V RL=8 AV=-4V/V Po=700mW
100k
VDD=3.3V RL=32 AV=-2V/V Po=30mW
100k
Frequency (Hz)
Frequency (Hz)
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Phase(°)
+140
Phase(°)
APA0710/0711
Typical Characteristics (Cont.)
Close Loop Gain Phase Frequency
+300
Noise Floor Frequency
Close Loop Gain (dB)
Gain
+260
+180
Phase
+140 +100
Noise Floor (µVrms)
+220
Phase(°)
VDD=5V RL=32 AV=-2V/V Po=60mW
100k
VDD=3.3V BW=22Hz 22kHz AV=-1V/V
Frequency (Hz)
Frequency (Hz)
Noise Floor Frequency
Power Dissipation Output Power
Power Dissipation (mW)
RL=8
Noise Floor (µVrms)
RL=32
BW=22Hz 22kHz AV=-1V/V
VDD=3.3V
Frequency (Hz)
Output Power (mW)
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Typical Characteristics (Cont.)
Power Dissipation Output Power
Power Dissipation Output Power
Power Dissipation (mW)
RL=8
Power Dissipation (mW)
RL=8
RL=32
RL=32 VDD=5V
1000
VDD=3.3V
Output Power (mW)
Output Power (mW)
Power Dissipation Output Power
RL=8
Power Dissipation (mW)
RL=32 VDD=5V
Output Power (mW)
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
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APA0710/0711
Application Descriptions
Operation supply, need voltage exists across load. This eliminates need output coupling capacitor which required single supply, configuration. Single-Ended Operation
Vbias
Figure1: APA0710/1 power amplifier internal configuration power amplifier gain setting external gain setting, while second amplifier internally fixed unity-gain, inverting configuration. Figure shows that output connected input OP2, which results output signals with both amplifiers with identical magnitude, phase 180°. Consequently, differential gain each channel (Gain mode). driving load differentially through outputs Vo-, amplifier configuration commonly referred bridged mode established. mode operation different from classical single-ended amplifier configuration where side load connected ground. amplifier design distinct advantages over configuration, provides differential drive load, thus doubling output swing specified supply voltage. Four times output power possible compared amplifier under same conditions. configuration, such used APA0710, also creates second advantage over amplifiers. Since differential outputs, Vo+, biased halfCopyright ANPEC Electronics Corp. Rev. Oct., 2005
Consider single-supply configuration shown Application Circuit. coupling capacitor required block offset voltage from reaching load. These capacitors quite large (approximately 33µF 1000µF) they tend expensive, occupy valuable area, have additional drawback limiting low-frequency performance system (refer Output Coupling Capacitor). rules described still hold with addition following relationship 80kO RLCC Output SE/BTL Operation (for APA0710 only) ability APA0710 easily switch between modes most important costs saving features. This feature eliminates requirement additional headphone amplifier applications where internal speakers driven mode external headphone speakers must accommodated. Internal APA0710, separate amplifiers drive (see Figure SE/BTL input controls operation follower amplifier that drives Vo-. When SE/BTL held low, turn APA0710 mode. When SE/BTL held high, high output impedance state, which configures APA0710 driver from Vo+. reduced approximately one-half mode. Control SE/BTL input logic-level
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APA0710/0711
Application Descriptions (Cont.)
Output SE/BTL Operation (for APA0710 only) source resistor divider network mono headphone jack with switch shown Application Circuit. value important consider directly affects frequency performance circuit. Consider example where 100k specification calls flat bass response down 40Hz. Equation reconfigured follow
100k SE/BTL 100k
Headphone Jack Control
2Rif
Consider input resistance variation, 0.04µF would likely choose value range 0.1µF 1.0µF. further consideration this capacitor leakage path from input source through input network (Ri+Rf, load. This leakage current creates offset voltage input amplifier that reduces useful headroom, especially high gain applications. this reason low-leakage tantalum ceramic capacitor best choice. When polarized capacitors used, positive side capacitor should face amplifier input most applications level there held VDD/2, which likely higher that source level. Please note that important confirm capacitor polarity application. Effective Bypass Capacitor, Cbypass other power amplifiers, proper supply bypassing critical noise performance high power supply rejection. capacitors located bypass power supply pins should close device possible. effect larger half supply bypass capacitor will improve PSRR increased halfsupply stability. Typical application employ regulator with 1.0µF 0.1µF bypass supply filtering. This does eliminate need bypassing supply nodes APA0710/1. selection
Figure SE/BTL input selection phonejack plug Figure input SE/BTL operates follows When phonejack plug inserted, resistor disconnected SE/BTL input pulled high enables mode. When this input goes high level, amplifier shutdown causing speaker mute. amplifier then drives through output capacitor (CC) into headphone jack. When there headphone plugged into system, contact headphone jack connected from signal pin, voltage divider resistors 100k Resistor then pulls SE/BTL pin, enabling function. Input Capacitor, typical application input capacitor, required allow amplifier bias input signal proper level optimum operation. this case, minimum input impedance form high-pass filter with corner frequency determined follow equation FC(highpass)= 2RiCi
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APA0710/0711
Application Descriptions (Cont.)
Effective Bypass Capacitor, Cbypass (Cont.) bypass capacitors, especially Cbypass, thus dependent upon desired PSRR requirements, click performance. avoid start-up noise occurred, bypass voltage should rise slower than input bias voltage relationship shown equation should maintained.1 Cbypass 80kO bypass capacitor from resistor inside amplifier. Bypass capacitor, Cbypass, values 0.1µF 2.2µF ceramic tantalum low-ESR capacitors recommended best noise performance. bypass capacitance also effects start time. determined following equation Tstart (Cbypass 80k) Power Supply Decoupling, APA0710/1 high-performance CMOS audio amplifier that requires adequate power supply decoupling ensure output total harmonic distortion (THD) possible. Power supply decoupling also prevents oscillations causing long lead length between amplifier speaker. optimum decoupling achieved using different type capacitors that target different type noise power supply leads. higher frequency transients, spikes, digital hash line, good equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1µF placed close possible device lead works best. filtering lowerfrequency noise signals, large aluminum electrolytic capacitor 10µF greater placed near audio power amplifier recommended. Optimizing Depop Circuitry Circuitry been included APA0710/1 minimize amount popping noise power-up when coming shutdown mode. Popping occurs whenever voltage step applied speaker. order eliminate clicks pops, capacitors must fully discharged before turn-on. Rapid on/off switching device shutdown function will cause click circuitry. value will also affect turn-on pops (refer Effective Bypass Capacitance). bypass voltage rise should slower than input bias voltage. Although bypass current source cannot modified, size Cbypass changed alter device turn-on time amount clicks pops. increasing value Cbypass, turn-on reduced. However, tradeoff using larger bypass capacitor increase turn-on time this device. There linear relationship between
Output Coupling Capacitor, (for APA0710 only) typical single-supply (SE) configuration APA0710, output coupling capacitor (Cc) required block bias output amplifier thus preventing currents load. with input coupling capacitor, output coupling capacitor impedance load form high-pass filter governed equation. FC(highpass)= 2RLCC
example, 330µF capacitor with speaker would attenuate frequencies below 60.6Hz. main disadvantage, from performance standpoint, load impedance typically small, which drives low-frequency corner higher degrading bass response. Large values required pass frequencies into load.
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Application Descriptions (Cont.)
Optimizing Depop Circuitry (Cont.) size Cbypass turn-on time. configuration, output coupling capacitor, particular concern. This capacitor discharges through internal resistors. Depending size time constant relatively large. most cases, choosing small value range 0.33µF 1µF, Cbypass being equal should produce virtually clickless popless turn-on. high gain amplifier intensifies problem small delta voltage multiplied gain. advantageous low-gain configurations. Shutdown Function order reduce power consumption while use, APA0710/1 contains shutdown function externally turn amplifier bias circuitry. This shutdown feature turns amplifier when logic high placed Shutdown APA0710 logic Shutdown APA0711. trigger point between logic high logic level typically 0.4VDD. best switch between ground supply voltage provide maximum device performance. switching Shutdown/Shutdown high level/ level, amplifier enters low-current state, APA0710/1. APA0710/1 shutdown mode. normal operating, APA0710' Shutdown pull level APA0711' Shutdown should pull high level keeping shutdown mode. Shutdown/Shutdown should tied definite voltage avoid unwanted state changes. Amplifier Efficiency easy-to-use equation calculate efficiency starts being equal ratio power from power supply power delivered load. following equations basis calculating amplifier efficiency. Efficiency Where VO,RMS VO,RMS VO,RMS VPxVP PSUP
PSUP IDD,AVG VDDx Efficiency configuration VPxVP (VDD x2VP 4VDD PSUP
0.125 0.25 0.375 Efficiency 33.6 47.6 58.3 VP(V) 1.41 2.00 2.45*
(10)
0.26 0.29 0.28
*High peak voltages cause increase. Table Efficiency Output Power 3.3V/8 Systems.
Table employs equation10 calculate efficiencies three different output power levels when load efficiency amplifier quite lower power levels rises sharply power load increased resulting nearly flat internal power dissipation over normal operating range. Note that internal dissipation full output power less than half power range. Calculating efficiency specific system proper power supply design. mono 900mW audio system with loads supply, maximum draw
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Copyright ANPEC Electronics Corp. Rev. Oct., 2005
APA0710/0711
Application Descriptions (Cont.)
Amplifier Efficiency (Cont.) power supply almost 1.5W. final point remember about linear amplifiers (either BTL) manipulate terms efficiency equation utmost advantage when possible. Note that equation10, denominator. This indicates that goes down, efficiency goes other words, efficiency analysis choose correct supply voltage speaker impedance application. Power Dissipation Whether power amplifier operated modes, power dissipation major concern. equation11 states maximum power dissipation point mode operating given supply voltage driving specified load. mode PD,MAX= (11) 22RL mode operation, output voltage swing doubled mode. Thus maximum power dissipation point mode operating same given conditions times mode.
mode PD,MAX= 4V2DD
thermal pad, thermal resistance (JA) equal 50C/W 160C/W, respectively. Since maximum junction temperature (TJ,MAX) APA0710/1 170C ambient temperature defined power system design, maximum power dissipation which package able handle obtained from equation13. Once power dissipation greater than maximum limit (PD,MAX), either supply voltage (VDD) must decreased, load impedance (RL) must increased ambient temperature should reduced. Thermal Considerations thermal must connected ground. package with thermal APA0710/1 requires special attention thermal design. thermal design issues properly addressed, APA0710/1 will into thermal shutdown when driving load. thermal bottom APA0710/1 should soldered down copper circuit board. Heat conducted away from thermal through copper plane ambient. copper plane surface circuit board, vias smaller diameter should used thermally couple thermal bottom plane. good thermal conduction, vias must plated through solder filled. copper plane used conduct heat away from thermal should large practical. ambient temperature higher than 25°C, larger copper plane forced-air cooling will required keep APA0710/1 junction temperature below thermal shutdown temperature (170°C). higher ambient temperature, higher airflow rate and/or larger copper area will required keep thermal shutdown.
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(12)
Since APA0710/1 mono channel power amplifier, maximum internal power dissipation equal both equations depending mode operation. Even with this substantial increase power dissipation, APA0710/1 does require extra heatsink. power dissipation from equation12, assuming 5V-power supply load, must greater than power dissipation that results from equation13 TJ,MAX (13) PD,MAX= MSOP-8-P package with SOP-8 without
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
APA0710/0711
Packaging Information
SOP-8 Reference JEDEC Registration MS-012)
0.004max.
Millimeters Min. 1.35 0.10 4.80 3.80 5.80 0.40 0.33 1.27BSC Max. 1.75 0.25 5.00 4.00 6.20 1.27 0.51 Min. 0.053 0.004 0.189 0.150 0.228 0.016 0.013
0.015X45
Inches Max. 0.069 0.010 0.197 0.157 0.244 0.050 0.020 0.50BSC
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
www.anpec.com.tw
APA0710/0711
Packaging Information
MSOP-8-P
GAUGE PLANE
0.25
Millimeters Min. 0.06 0.86 0.25 0.13 0.65 2.90 2.90 2.146 1.740 0.45 0.65 0.036 0.018 0.114 0.189 0.114 0.23 0.01 0.005 Max. 0.15 Min. 0.002
Inches Max. 0.006 0.34 0.0126 0.009 0.0256 0.122 0.197 0.122 0.0845 0.0685 0.039 0.026
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
www.anpec.com.tw
APA0710/0711
Physical Specifications
Terminal Material Lead Solderability Solder-Plated Copper (Solder Material 90/10 63/37 SnPb), 100%Sn Meets Specification RSI86-91, ANSI/J-STD-002 Category
Reflow Condition
(IR/Convection Reflow)
Critical Zone
Ramp-up
Temperature
Tsmax
Tsmin Ramp-down Preheat
Peak
Time
Classificatin Reflow Profiles
Profile Feature Average ramp-up rate Preheat Temperature (Tsmin) Temperature (Tsmax) Time (min max) (ts) Time maintained above: Temperature (TL) Time (tL) Peak/Classificatioon Temperature (Tp) Time within actual Peak Temperature (tp) Ramp-down Rate Sn-Pb Eutectic Assembly 3°C/second max. 100°C 150°C 60-120 seconds 183°C 60-150 seconds table 10-30 seconds Pb-Free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds table 20-40 seconds
6°C/second max. 6°C/second max. minutes max. minutes max. Time 25°C Peak Temperature Notes: temperatures refer topside package .Measured body surface.
Copyright ANPEC Electronics Corp. Rev. Oct., 2005 www.anpec.com.tw
APA0710/0711
Classificatin Reflow Profiles(Cont.)
Table SnPb Entectic Process Package Peak Reflow Temperature Package Thickness Volume Volume <350 <2.5 +0/-5°C +0/-5°C +0/-5°C +0/-5°C
Table Pb-free Process Package Classification Reflow Temperatures Package Thickness Volume Volume Volume <350 350-2000 >2000 <1.6 +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* +0°C* *Tolerance: device manufacturer/supplier shall assure process compatibility including stated classification temperature (this means Peak reflow temperature +0°C. example 260°C+0°C) rated level.
Reliability Test Program
Test item SOLDERABILITY HOLT Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD Description 245°C, 1000 Bias @125°C Hrs, 100%RH, 121°C -65°C~150°C, Cycles VHBM 2KV, 200V 10ms, 100mA
Carrier Tape Reel Dimensions
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
www.anpec.com.tw
APA0710/0711
Carrier Tape Reel Dimensions(Cont.)
Application
330±1
M/SOP-8
12.75
12.4 +0.2
5.2±
1.75±
1.55±0.1 1.55+ 0.25
2.1± 0.3±0.013
(mm)
Cover Tape Dimensions
Application SOP- MSOP- Carrier Width Cover Tape Width Devices Reel 2500 3000
Customer Service
Anpec Electronics Corp. Head Office No.6, Dusing Road, SBIP, Hsin-Chu, Taiwan, R.O.C. 886-3-5642000 886-3-5642050 Taipei Branch 137, Lane 235, Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, 886-2-89191368 886-2-89191369
Copyright ANPEC Electronics Corp. Rev. Oct., 2005
www.anpec.com.tw

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