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Switchable organization 8,388,608 8(byte mode) 4,194,304 16(word mode)


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K3N7C1000M-TC
Switchable organization 8,388,608 8(byte mode) 4,194,304 16(word mode) Fast access time 120ns(Max.) Supply voltage single Current consumption Operating 70mA(Max.) Standby 50µA(Max.) Fully static operation inputs outputs compatible Three state outputs Package K3N7C1000M-TC 44-TSOP2-400
CMOS MASK
GENERAL DESCRIPTION
K3N7C1000M-TC fully static mask programmable fabricated using silicon gate CMOS process technology, organized either 8,388,608 bit(byte mode) 4,194,304 bit(word mode) depending voltage level.(See mode selection table) This device operates with single power supply, inputs outputs compatible. Because asynchronous operation, requires external clock assuring extremely easy operation. suitable program memory microprocessor, data memory, character generator. K3N7C1000M-TC packaged 44-TSOP2.
FUNCTIONAL BLOCK DIAGRAM
CONTROL LOGIC Q0/Q8 Q7/Q BUFFERS DECODER MEMORY CELL MATRIX (4,194,304x16/ 8,388,608x8)
CONFIGURATION
BUFFERS DECODER
SENSE AMP. BUFFERS
TSOP2
Q15/A-1
Name /A-1
Function Address Inputs Data Outputs Output 15(Word mode)/ Address(Byte mode) Word/Byte selection Chip Enable Output Enable Power (+5V) Ground
K3N7C1000M-TC
K3N7C1000M-TC
ABSOLUTE MAXIMUM RATINGS
Item Voltage Relative Temperature Under Bias Storage Temperature Symbol TBIAS TSTG Rating -0.3 +4.5 +150
CMOS MASK
Unit Remark
NOTE Permanent device damage occur "ABSOLUTE MAXIMUM RATINGS" exceeded. Functional operation should restricted conditions detailed operational sections this data sheet. Exposure absolute maximum rating conditions extended periods affect device reliability.
RECOMMENDED OPERATING CONDITIONS(Voltage reference VSS,
Item Supply Voltage Supply Voltage Symbol
70°C) Unit
CHARACTERISTICS
Parameter Operating Current Standby Current(TTL) Standby Current(CMOS) Input Leakage Current Output Leakage Current Input High Voltage, Inputs Input Voltage, Inputs Output High Voltage Level Output Voltage Level Symbol ISB1 ISB2 IOH=-400µA IOL=2.1mA Test Conditions CE=OE=VIL, outputs open CE=VIH, outputs open CE=VCC, outputs open VIN=0 VOUT=0 -0.3 VCC+0.3 Unit
NOTE Minimum Voltage(VIL) -0.3V input pins. During transitions, this level undershoot -2.0V periods <20ns. Maximum voltage input pins(VIH VCC+0.3V which, during transitions, overshoot VCC+2.0V periods <20ns.
MODE SELECTION
Q15/A-1 Output Input Mode Standby Operating Operating Operating Data High-Z High-Z Q0~Q15 Dout Q0~Q7 Dout Q8~Q14 High-Z Power Standby Active Active Active
CAPACITANCE(TA=25°C, f=1.0MHz)
Item Output Capacitance Input Capacitance Symbol COUT Test Conditions VOUT=0V VIN=0V Unit
NOTE Capacitance periodically sampled 100% tested.
K3N7C1000M-TC
CMOS MASK
CHARACTERISTICS(TA= 70°C, VCC=5V±10%, unless otherwise noted.)
TEST CONDITIONS
Item Input Pulse Levels Input Rise Fall Times Input Output timing Levels Output Loads Value 0.6V 2.4V 10ns 0.8V 2.0V Gate CL=100pF
READ CYCLE
Item Read Cycle Time Chip Enable Access Time Address Access Time Output Enable Access Time Output Chip Disable Output High-Z Output Hold from Address Change Symbol tACE K3N7C1000M-TC12 K3N7C1000M-TC15 Unit
TIMING DIAGRAM
READ
A0~A21 A-1(*1) tACE DOUT D0~D7 D8~D15(*2) VALID DATA VALID DATA
ADD1
ADD2 tDF(*3)
NOTES Byte Mode only. Least Significant Address.(BHE VIL) Word Mode only.(BHE=VIH) defined time which outputs achieve open circuit condition referenced level.
K3N7C1000M-TC
PACKAGE DIMENSIONS
44-TSOP2-400
CMOS MASK
(Unit mm/inch)
0~8° 0.25 0.010
0.45 ~0.75 0.018 0.030
11.76±0.20 0.463±0.008
10.16 0.400
0.50 0.020
1.00±0.10 0.039±0.004 1.20 MAX. 0.047
0.10 0.05 0.004 0.006 0.002
0.15
18.81 MAX. 0.741 18.41±0.10 0.725±0.004
0.805 0.032
0.35±0.10 0.014±0.004
0.80 0.0315
0.05 MIN. 0.002
0.10 0.004

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