System Clock Buffer output buffer high clock fanout applications

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

System Clock Buffer output buffer high clock fanout applications

Datasheet Thumbnail

Top Searches for this datasheet

SC680E
System Clock Buffer
output buffer high clock fanout applications Each output internally disabled
reduction
PRODUCT DESCRIPTION
IMISC680 high fanout system clock buffer. primary application create large quantity clocks needed support wide range applications that requires those clock loads signal that referenced single existing clock. Loads supported. chief applications this component where long traces used transport clocks from their generating devices their loads. creation degradation waveform rise fall times greatly reduced running single reference clock trace this device then using regenerate clock that drives shorter traces. Using these devices therefore minimized board real estate saved.
VDD=3.3 volts chip Ouput frequency range 250ps skew between output clocks 48-pin SSOP package Single Clock Enable testability
BLOCK DIAGRAM
CLK[1:2] CLK[3:4] REFIN CLK[5:6] CLK[7:8] CLK[9:10] CLK[11:12] SDATA SCLK
CONNECTION DIAGRAM
IMISC680
CLK1 CLK2 CLK3
CLK[13:14]
CLK18 CLK17 CLK16 CLK15 CLK14 CLK13 CLK12 CLK11 CLK10 SCLOCK
Control Logic
CLK4
CLK[15:16] CLK[17,18]
REFIN CLK5 CLK6 CLK7 CLK8 CLK9 SDATA
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.6
8/12/98 Page

System Clock Buffer output buffer high clock fanout applications

Top Searches for this datasheet

Other recent searches