System Clock Buffer Approved Product Product Features Produc

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System Clock Buffer Approved Product Product Features Produc

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SC680E
System Clock Buffer
Approved Product Product Features
Product Description
IMISC680 high fanout system clock buffer. primary application create large quantity clocks needed support wide range applications that requires those clock loads signal that referenced single existing clock. Loads supported. chief applications this component where long traces used transport clocks from their generating devices their loads. creation degradation waveform rise fall times greatly reduced running single reference clock trace this device then using regenerate clock that drives shorter traces. Using these devices therefore minimized board real estate saved.
output buffer high clock fanout applications Each output internally disabled reduction VDD=3.3 volts chip Ouput frequency range 250ps skew between output clocks 48-pin SSOP package Single Clock Enable testability
Block Diagram
CLK[1:2] CLK[3:4] REFIN CLK[5:6] CLK[7:8] CLK[9:10] CLK[11:12] SDATA SCLK
Configuration
IMISC680
CLK1 CLK2 CLK3
CLK[13:14]
CLK18 CLK17 CLK16 CLK15 CLK14 CLK13 CLK12 CLK11 CLK10 SCLOCK
Control Logic
CLK4
CLK[15:16] CLK[17,18]
REFIN CLK5 CLK6 CLK7 CLK8 CLK9 SDATA
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.7
2/17/2000 Page
SC680E
System Clock Buffer
Approved Product Description
Name REFIN CLK(1:2) CLK(3:4) CLK(5:6) CLK(7:8) CLK(9:10) CLK(11:12) CLK(13:14) CLK(15:16) CLK(17:18) TYPE BUF1 BUF1 BUF1 BUF1 BUF1 BUF1 BUF1 BUF1 BUF1 Description This connected input reference clock. This clock must range 10.0 100.0 Mhz. skew output clock skew output clock skew output clock skew output clock skew output clock skew output clock skew output clock skew output clock skew output clock Buffer Output Enable pin. When driven logic level this used place output clocks (CLK1:18} state condition. This feature facilitates production board level testing easily implemented clocks that this device produces. internal pull-up resistor. serial data 2-wire control interface. internal pull-up resistor. Serial clock 2-wire control interface. internal pull-up resistor. Ground pins clock output buffers. These pins must returned same potential reduce output clock skew.
SDATA SDCLK
Power output clock buffers.
Power core logic. Ground supply pins internal lcore logic pins.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.7
2/17/2000 Page
SC680E
System Clock Buffer
Approved Product 2-Wire Control Interface 2-wire control interface implements write only slave interface. device cannot read back. Sub-addressing supported, thus preceeding bytes must sent order change control bytes. 2-wire control interface allows each clock output individually enabled disabled. During normal data transfer, SDATA signal only changes when SDCLK signal low, stable when SDCLK high. There exceptions this. high transition SDATA while SDCLK high used indicate start data transfer cycle. high transition SDATA while SDCLK high indicates data transfer cycle. Data always sent complete 8-bit bytes, after which acknowledge generated. first byte transfer cycle 7-bit address with Read/Write LSB. Data transferred first. device will respond writes bytes (max) data address generating acknowledge (low) signal SDATA wire following reception each byte. device will respond other control interface conditions. Previously control registers retained. Serial Control Registers
NOTE: Pin# column lists affected number where applicable. @Pup column gives state true power Bytes values shown only true power when PWR_DWN# activated. Following acknowledge Address Byte (D2), additional bytes must sent: "Command Code byte, "Byte Count" byte. Although data (bits) these bytes considered "don't care", they must sent will acknowledged.
After Command Code Count bytes have been acknowledged, below desrcibed sequence (Byte Byte Byte will valid acknowledged.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.7
2/17/2000 Page
SC680E
System Clock Buffer
Approved Product Serial Control Registers (Cont.)
Byte Function Select Register(1 enable, Stopped)
@Pup
Pin#
Description CLK8 (Active Forced CLK7 (Active Forced CLK6 (Active Forced CLK5 (Active Forced CLK4 (Active Forced CLK3 (Active Forced CLK2 (Active Forced CLK1 (Active Forced
Byte Clock Register enable, Stopped)
@Pup Pin# Description CLK18 (Active Forced CLK17(Active Forced CLK16 (Active Forced CLK15 (Active Forced CLK14 (Active Forced CLK13(Active Forced CLK12 (Active Forced CLK11 (Active Forced
Byte Clock Register enable, Stopped
@Pup Pin# Description CLK10 (Active Forced CLK9 (Active Forced Used Used Used Used Used Used
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.7
2/17/2000 Page
SC680E
System Clock Buffer
Approved Product Maximum Ratings
This device contains circuitry protect inputs against damage high static voltages electric Voltage Relative VSS: Voltage Relative VDD: Storage Temperature: Operating Temperature: Maximum Power Supply: -0.3V 0.3V field; however, precautions should taken avoid application voltage higher than maximum rated voltages this circuit. proper operation, Vout should constrained range: VSS<(Vin Vout)<VDD Unused inputs must always tied appropriate logic voltage level (either VDD).
Electrical Characteristics
Characteristic Input Voltage Input High Voltage Input Current Input High Current Output Voltage 40mA Output High Voltage 30mA Tri-State leakage Current Dynamic Supply Current Idd100 Static Supply Current Short Circuit Current Input Rise Time Isdd Symbol Idd66 Units Input frequency outputs load Input frequency outputs load outputs disabled input clock output time seconds volts Outputs (see buffer spec) Outputs Using 3.3V Power (see buffer spec) Conditions
VDD1 thru VDD9 =3.3V ±5%,
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.7
2/17/2000 Page
SC680E
System Clock Buffer
Approved Product
Switching Characteristics
Characteristic Output Duty Cycle Buffer out/out Skew Buffer Outputs Buffer input output Skew Jitter Cycle Cycle* Jitter Absolute (Peak Peak)* Symbol tSKEW tSKEW TJCC TJabs Units loading loading Conditions Measured 1.5V (50/50 Load Measured 1.5V
VDD1 thru VDD9 3.3V ±5%, *This jitter additive input clock's jitter.
TB40_ Type Buffer Characteristics (All Clock Outputs)
Characteristic Pull-Up Current Pull-Up Current Pull-Down Current Pull-Down Current Dynamic Output Impedance Rise/Fall Time Between Rise/Fall Time Between Symbol IOHmin IOHmax IOLmin IOLmax TRFmin TRFmax 1.33 1.33 Units Ohms Conditions Vout Vout Vout Vout 66-100 Load Load
VDD1 thru VDD9 =3.3V ±5%,
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.7
2/17/2000 Page
SC680E
System Clock Buffer
Approved Product layout Suggestion
Plane Plane Void (cut) power plane
22uF
This only layout recommendation best performance lower EMI. designer choose different approach C10, (all should always used placed close their pins physically possible.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.7
2/17/2000 Page
SC680E
System Clock Buffer
Approved Product
Packing Drawing Dimensions SSOP Outline Dimensions
INCHES SYMBOL
MILLIMETERS 0.110 0.016 0.095 0.0135 0.010 0.637 0.299 2.41 0.20 2.16 0.203 0.127 15.75 7.39 2.59 0.31 2.29 0.254 0.20 15.88 7.49 0.640 0.420 0.040 10.03 0.61 10.36 0.76 10.67 1.02 2.79 0.41 2.41 0.343 0.254 16.18 7.59
0.095 0.008 0.085 0.008 0.005 0.620 0.291
0.102 0.012 0.090 0.010 .008 0.625 0.295 0.0256
0.395 0.024
0.408 0.030
Ordering Information
Part Number Package Type Production Flow IMISC680EYB SSOP Commercial, Note: ordering part number formed combination device number, device revision, package style, screening shown below. Marking: Example: SC680EYB Date Code,
IMISC680EYB Flow Commercial, Package SSOP Revision Device Number Purchase components International Microcircuits, Inc. sublicensed Associated Companies conveys license under Phillips Patent Rights these components system, provided that system conforms Standard Specification defined Phillips.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.7
2/17/2000 Page

System Clock Buffer Approved Product Product Features Produc

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