Clock Generator Pentium Notebook Designs. Approved Product PRODUC
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SC670
Clock Generator Pentium Notebook Designs.
Approved Product PRODUCT FEATURES
FREQUENCY TABLE
60.0 66.6 30.0 33.3
Supports Pentium CPUs. clocks loads. SDRAM clocks DIMs. Supports Power Savings Frequencies. synchronous clocks. Optional common mixed supply mode: (Vdd Vddq3 Vddq2 3.3V) (Vdd Vddq3 3.3V, Vddq2 2.5V) 250ps skew SDRAM clocks. 250ps skew among clocks. 2-Wire serial interface Programmable registers featuring: enable/disable each output mode tri-state, test, normal 24/48 selections IOAPIC clock multiprocessor support. 48-pin SSOP package
CONNECTION DIAGRAM
IMISC670
REF1 REF0 Xout MODE Vddq3 PCICLK_F PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 Vddq3 (See note Vddq2 IOAPIC0 PWR_DWN# CPUCLK0 CPUCLK1 Vddq2 CPUCLK2 CPUCLK3 SDRAM0 SDRAM1 Vddq3 SDRAM2 SDRAM3 SDRAM4 SDRAM5 Vddq3 SDRAM6/CPU_STOP# SDRAM7/PCI_STOP#
BLOCK DIAGRAM
Xout Vddq2 IOAPIC0
REF0:1
PCICLK5 SDATA SDCLK Vddq3 48/24MHZ 48/24MHZ
SDATA SDCLK
Vddq2 Vddq3 CPUCLK0~3
SDRAM0~7 PCICLK0~5
PLL1
PCI_STOP# CPU_STOP# PWR_DWN# MODE
PCICLK_F
48/24MHZ PLL2 48/24MHZ
Note connect pin. product does require 3.3_2.5# select line operate properly volts. This connected externally Vss.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/20/97 Page
SC670
Clock Generator Pentium Notebook Designs.
Approved Product DESCRIPTION
Xin, Xout These pins form on-chip reference oscillator when connected terminals external parallel resonant crystal (nominally 14.318 MHz). also serve input externally generated reference signal. Standard frequency select input. internal pull-up. CPUCLK(0:3) skew (<250 clock outputs host frequencies such CPU, Chipset, Cache. Vddq2 supply voltage these outputs. SDRAM(0:5) Synchronous DRAM DIMs clocks. They powered Vddq3. SDRAM6/CPU_STOP# MODE=1, this Synchronous DRAM DIMs clock output powered Vddq3. MODE=0, this CPU_STOP# input signal, where level stops CPU. However, SDRAM clocks will still active. SDRAM7/PCI_STOP# MODE=1, this Synchronous DRAM DIMs clock output powered Vddq3. MODE=0, this PCI_STOP# input signal, where level stops clocks. MODE level this causes pins power management inputs PCI_STOP#, CPU_STOP# respectly. high level this causes pins clock output signals SDRAM7, SDRAM6 respectively. internal pull-up resistor. PCICLK(0:5) skew (<250pS) clock outputs frequencies. These buffers voltage level controlled Vddq3 PCICLK_F clock output that does stop until power down mode. synchronous with other clocks. REF(0:1) Buffered outputs on-chip reference. IOAPIC0 Buffered output 14.3MHZ multiprocessor support. powered Vddq2.
PWR_DWN# Power down pin. When this asserted low, shutdown mode where circuitry turned including VCO, crystal buffer PCICLK_F. internal pull-up. interface disabled with PWR_DWN# low. 48/24MHz(0:1) Programmable clock outputs. SDATA serial data 2-wire control interface. internal pull-up resistor. SDCLK serial clock 2-wire control interface. internal pull-up resistor. Ground pins chip. Power supply pins analog circuit core logic. Vddq3 Power supply pins 3.3V pins. Vddq2 Power supply pins 2.5V/3.3V pins.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/20/97 Page
SC670
Clock Generator Pentium Notebook Designs.
Approved Product POWER MANAGEMENT FUNCTIONS
clocks individually enabled stopped 2-wire control interface. clocks stopped state. clocks maintain valid high period transitions from running stopped transitions from stopped running when chip powered down. power VCOs will stabilize correct pulse widths within about CPU, SDRAM, clocks transition between running stopped waiting positive edge PCICLK_F followed negative edge clock interest, after which high levels output either enabled disabled. When MODE=0, pins inputs PCI_STOP# CPU_STOP# respectively (when MODE=1, these functions available). particular output enabled only when both serial interface these pins indicate that should enabled. IMISC670 clocks disabled according following table order reduce power consumption. clocks stopped state. clocks maintain valid high period transitions from running stopped. high transitions PWR_DWN#, external circuitry should allow VCOs stabilize prior assuming clock periods correct. clocks transition between running stopped waiting positive edge PCICLK_F followed negative edge clock interest, after which high levels output either enabled disabled. CPU_STOP# PCI_STOP# PWR_DWN# CPUCLK 66/60 66/60 PCICLK 33/30 33/30 OTHER CLKs RUNNING RUNNING RUNNING RUNNING XTAL VCOs RUNNING RUNNING RUNNING RUNNING
POWER MANAGEMENT TIMING
PCICLK_F
PCI_STOP#
PCICLK(0:5)
CPU_STOP#
CPUCLK(0:3)
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/20/97 Page
SC670
Clock Generator Pentium Notebook Designs.
Approved Product 2-WIRE CONTROL INTERFACE
2-wire control interface implements write only slave interface. IMISC670 cannot read back. Subaddressing supported, thus preceding bytes must sent order change control bytes. 2wire control interface allows each clock output individually enabled disabled. also allows 24/48 frequency selection test mode enable. During normal data transfer, SDATA signal only changes when SDCLK signal low, stable when SDCLK high. There exceptions this. high transition SDATA while SDCLK high used indicate start data transfer cycle. high transition SDATA while SDCLK high indicates data transfer cycle. Data always sent complete 8-bit bytes, after which acknowledge generated. first byte transfer cycle 7-bit address with Read/Write LSB. Data transferred first. IMISC670 will respond writes bytes (max) data address generating acknowledge (low) signal SDATA wire following reception each byte. IMISC670 will respond other control interface conditions. interface disabled when PWR_DWN# low. Previously control registers retained.
SERIAL CONTROL REGISTERS
NOTE: Pin# column lists affected number where applicable. @Pup column gives state true power Bytes values shown only true power when PWR_DWN# activated. Following acknowledge Address Byte (D2), additional bytes must sent: "Command Code byte, "Byte Count" byte. Although data (bits) these bytes considered "don't care", they must sent will acknowledged. Byte Function Select Register enable, Stopped)
@Pup
Pin#
Description
Reserved, Don't Reserved, Don't Reserved, Don't Reserved, Don't 48/24 48/24 Bit1 Bit0 Tri-State Reserved Test Mode Normal
IMPORTANT NOTE
Reserved bits intended possible future functions. important that they left their Power logic levels times. Otherwise data sheet specifications cannot guaranteed.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/20/97 Page
SC670
Clock Generator Pentium Notebook Designs.
Approved Product SERIAL CONTROL REGISTERS (Cont.)
Function Table Function Description Tri-State Test Mode Normal SEL=1 Normal SEL=0 Outputs Hi-Z Tclk 14.318 14.318
Hi-Z Tclk/2
Hi-Z Tclk/4 CPU/2 CPU/2
SDRAM Hi-Z Tclk/2
IOAPIC Hi-Z Tclk 14.318 14.318
24MHZ Hi-Z Tclk/4
48MHZ Hi-Z Tclk/2
Notes: Tclk test clock over driven input during test mode. frequency ratio Fout/Fin output 3.35294.
Byte CPU, 48/24 Clock Register enable, Stopped) @Pup Pin# Description 48/24 enable/Stopped 48/24 enable/Stopped Reserved Reserved CPUCLK3 enable/Stopped CPUCLK2 enable/Stopped CPUCLK1 enable/Stopped CPUCLK0 enable/Stopped
Byte Clock Register enable, Stopped) @Pup Pin# Description Reserved PCICLK_F enable/Stopped PCICLK5 enable/Stopped PCICLK4 enable/Stopped PCICLK3 enable/Stopped PCICLK2 enable/Stopped PCICLK1 enable/Stopped PCICLK0 enable/Stopped
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/20/97 Page
SC670
Clock Generator Pentium Notebook Designs.
Approved Product SERIAL CONTROL REGISTERS(Continued)
Byte SDRAM Clock Register enable, Stopped @Pup Pin# Description SDRAM7 enable/Stopped SDRAM6 enable/Stopped SDRAM5 enable/Stopped SDRAM4 enable/Stopped SDRAM3 enable/Stopped SDRAM2 enable/Stopped SDRAM1 enable/Stopped SDRAM0 enable/Stopped
Byte Additional SDRAM Clock Register enable, Stopped) @Pup Pin# Description Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Byte Peripheral Control enable, Stopped) @Pup Pin# Description Reserved Reserved Reserved IOAPIC0 enable/Stopped Reserved Reserved REF1 enable/Stopped REF0 enable/Stopped
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/20/97 Page
SC670
Clock Generator Pentium Notebook Designs.
Approved Product SERIAL CONTROL REGISTERS(Continued)
Byte Reserved Register @Pup Pin# Description Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Byte Frequency Control three LSBs this register power up), frequency controlled package pin. Note that this open, internal pull-up will select MHz. Otherwise, clock frequency controlled F_SEL(0:2).
@Pup
Description Reserved Reserved Reserved Reserved Reserved F_SEL2 F_SEL1 F_SEL0
FSEL2
FSEL1
FSEL0
FREQUENCY Reserved Reserved Reserved From
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/20/97 Page
SC670
Clock Generator Pentium Notebook Designs.
Approved Product MAXIMUM RATINGS
This device contains circuitry protect inputs against damage high static voltages electric field; however, precautions should taken avoid application voltage higher than maximum rated voltages this circuit. proper operation, Vout should constrained range: VSS<(Vin Vout)<VDD Unused inputs must always tied appropriate logic voltage level (either VDD).
Voltage Relative VSS: Voltage Relative VDD: Storage Temperature: Ambient Temperature: Maximum Power Supply:
-0.3V 0.3V
ELECTRICAL CHARACTERISTICS
Characteristic Input Voltage Input High Voltage Input Current Input High Current Output Voltage Output High Voltage Tri-State leakage Current Dynamic Supply Current Static Supply Current Short Circuit Current Symbol Isdd Units Conditions
Outputs (see buffer spec) Outputs Using 3.3V Power (see buffer spec) 66.6 MHz, 33.3 output time seconds
VDDQ3 =3.3V ±5%, VDDQ2 2.375V 2.9V,
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/20/97 Page
SC670
Clock Generator Pentium Notebook Designs.
Approved Product SWITCHING CHARACTERISTICS
Characteristic Output Duty Cycle Offset Buffer Skew Buffer Outputs Period Adjacent Cycles Jitter Spectrum Bandwidth from Center Overshoot/Undershoot Beyond Power Rails Ring Back Exclusion Symbol tOFF tSKEW Vover VRBE +250 Units ohms source inch load note1 Conditions Measured 1.5V Load Measured 1.5V Load Measured 1.5V
VDDQ3 =3.3V ±5%, VDDQ2 2.375V 2.9V,
note Ring Back must enter this range.
TYPE BUFFER CHARACTERISTICS CPUCLK(0:3)
Characteristic Pull-Up Current Pull-Up Current Pull-Down Current Pull-Down Current Rise/Fall Time Between Rise/Fall Time Between Symbol TRFmin TRFmax -131 -183 Units Conditions Vout Vout Vout Vout Load Load
VDDQ3 =3.3V ±5%, VDDQ2 2.5V±5%
TYPE BUFFER CHARACTERISTICS IOAPIC
Characteristic Pull-Up Current Pull-Up Current Pull-Down Current Pull-Down Current Rise/Fall Time Between Rise/Fall Time Between Symbol TRFmin TRFmax -131 -183 Units Conditions Vout Vout Vout Vout Load Load
VDDQ3 =3.3V ±5%, VDDQ2 2.5V±5%
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/20/97 Page
SC670
Clock Generator Pentium Notebook Designs.
Approved Product
TYPE BUFFER CHARACTERISTICS REF(1:2) 48/24
Characteristic Pull-Up Current Pull-Up Current Pull-Down Current Pull-Down Current Rise/Fall Time Between Rise/Fall Time Between Symbol TRFmin TRFmax Units Conditions Vout Vout Vout Vout Load Load
VDDQ3 =3.3V ±5%, VDDQ2 2.5V±5%
TYPE BUFFER CHARACTERISTICS REF0 SDRAM(0:7)
Characteristic Pull-Up Current Pull-Up Current Pull-Down Current Pull-Down Current Rise/Fall Time Between Rise/Fall Time Between Symbol TRFmin TRFmax -134 -106 -188 -148 Units Conditions Vout Vout Vout Vout Load Load
VDDQ3 =3.3V ±5%, VDDQ2 2.5V±5%
TYPE BUFFER CHARACTERISTICS PCICLK(0:5,F)
Characteristic Pull-Up Current Pull-Up Current Pull-Down Current Pull-Down Current Rise/Fall Time Between Rise/Fall Time Between Symbol TRFmin TRFmax -134 -106 -188 -148 Units Conditions Vout Vout Vout Vout Load Load
VDDQ3 =3.3V ±5%, VDDQ2 2.5V±5%
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/20/97 Page
SC670
Clock Generator Pentium Notebook Designs.
Approved Product LAYOUT SUGGESTION
plane plane
VCC1
IMISC670
10µF
VCC2
10µF
This only layout recommendation best performance lower EMI. designer choose different approach C10, C11and (all 0.1µf) should always used placed close their pins.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/20/97 Page
SC670
Clock Generator Pentium Notebook Designs.
Approved Product PACKAGE DRAWING DIMENSIONS SSOP OUTLINE DIMENSIONS
INCHES SYMBOL
MILLIMETERS 0.110 0.016 0.092 0.0135 0.010 0.630 0.299 0.410 0.016 0.040 0.100 2.41 0.20 2.24 0.203 0.127 15.75 7.42 10.16 0.25 0.61 2.16 2.59 0.31 2.29 0.254 15.88 7.52 0.635 10.31 0.33 0.81 2.36 10.41 0.41 1.02 2.54 2.79 0.41 2.34 0.343 0.254 16.00 7.59
0.095 0.008 0.088 0.008 0.005 0.620 0.292 0.400 0.10 0.024 0.085
0.102 0.012 0.090 0.010 0.625 0.296 0.025 0.406 0.013 0.032 0.093
ORDERING INFORMATION
Part Number IMISC670DYB Note:
Marking:
Package Type SSOP
Production Flow Commercial,
ordering part number formed combination device number, device revision, package style, screening shown below.
Example: SC670DYB Date Code, Flow Commercial, Package SSOP Revision Device Number
IMISC670DYB
Purchase components International Microcircuits, Inc. sublicensed Associated Companies conveys license under Philips Patent Rights these components system, provided that system conforms Standard Specification defined Philips.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/20/97 Page
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