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MC92610 Quad high-speed, full-duplex, serializer/deserializer (SERDES)
Top Searches for this datasheetMC92610 QUAD MC92610 Quad high-speed, full-duplex, serializer/deserializer (SERDES) data interface that used transmit data between chips across board, through backplane, through cabling. Four transceivers XMIT_x_[7:0] XMIT_x_K XMIT_x_IDLE_B XMIT_x_CLK XCVR_x_DISABLE XCVR_x_RSLE RECV_x_[7:0] RECV_x_K RECV_x_9 RECV_x_IDLE RECV_x_ERR RECV_x_CLK MC92610 QUAD SERDES BLOCK DIAGRAM Four Transceivers 8B10B Decoder FIFO Transmitter XLINK_x0_N XLINK_x0_P XLINK_x1_N XLINK_x1_P BIST Freescale Semiconductor, Inc. transmit receive coded data rate gigabit second (Gbps) through each 3.125 gigabaud link. rich feature makes easily adaptable many broadband applications. MC92610 latest generation Freescale's SERDES product line. Like predecessors, features very power 0.25 micron CMOS implementation that nominally consumes less than 1800 with links operating full speed. Transmit Interface Unit Receive Interface Unit 8B10B Decoder FIFO Receiver RLINK_x1_P RLINK_x1_N RLINK_x0_P RLINK_x0_N RECV_EQ_EN XMT_EQ_EN CONFIG REF_CLK_P System Configuration Unit TEST System REF_CLK_N JTAG Product highlights Four full-duplex differential data links Gbps data aggregate transfer speed Dual speed range: 3.125 Gbaud 1.25 Gbaud power: 1800 under typical conditions, with transceivers operating full speed Transceiver channels individually disabled IEEE 1149.1 JTAG support full-speed built-in self test, BIST, functions Typical applications High-speed data transfer applications high-bandwidth backplane chassis-to-chassis networking High-end router systems Backbone switches Access switches Storage Area Network equipment High-speed Automatic Test Equipment More Information This Product, www.freescale.com Freescale Semiconductor, Inc. Data interface Internal Fibre Channel 8B/10B encoder/decoder accessed through Byte Interface bypassed Ten-Bit Interface mode Double DataRate (DDR), source synchronous, 8-bit 10-bit HSTL parallel data interfaces Link Multiplex Mode enables operation links with Single Data Rate (SDR), source synchronous, 16-bit 20-bit parallel data interfaces Each channel dedicated input clock (156.25 MHz) Received data clocked recovered clock reference clock frequency Link interface Links drive 50-ohm media (100-ohm differential), backplane cable On-chip link termination external terminating resistors needed) On-chip coupling capacitors provide expanded input common mode range Link inputs "hot-swap" compatible Selectable transmit receive equalization Repeater mode configures device into four-link receive-transmit repeater Redundant transmitter link outputs receiver link inputs Redundant links selectable transceiver Broadcast mode enables transmit links Technical specifications channels have: 8B/10B encoder/decoder that enabled bypassed Clock generation/recovery Idle/control character generation/detection Independent 8-bit 10-bit system with parallel-to-serial, serial-to-parallel conversion Transceiver Links operate over 50-ohm media (100-ohm differential) lengths meter FR-4 board/back-plane, meters coax external loop filter termination components required In-system BIST test modes speed, circuit, with error counter In-system loopback BIST isolated from link inputs outputs IEEE 1149.1 JTAG boundary scan support Differential reference clock input with single-ended reference clock input option (156.25 max) Tolerates REF_CLK frequency offset excess Technology: High-performance 0.25 CMOS Process, five-layer metal Freescale Semiconductor, Inc. Selectable Idle character alignment mode enables transfers with automatic realignment unaligned data transfers Link-to-link synchronization supports aligned, 32-bit, word transfers. Synchronization mechanism tolerates 40-bit times link-to-link media delay skew Multi-chip link synchronization supports aligned multi-word transfers. four devices combined provide 128-bit, four-word, synchronized transfers Parametrics Power Supply Core Power Supply: 0.15 HSTL Power Supply: 0.10 0.15 Link Power Supply: 0.15 Package MAPBGA (19x19 body size, ball pitch) Power Dissipation Typical operation: <450 channel maximum speed Learn More: more information about Freescale products, visit www.motorola.com/semiconductors Freescaleand Freescale logo trademarks Freescale Semiconductor, Inc. other product service names property their respective owners. Freescale Semiconductor, Inc. 2004 MC92610FS/D More Information This Product, www.freescale.com Other recent searchesUPT48e3 - UPT48e3 UPT48e3 Datasheet UPT48Re3 - UPT48Re3 UPT48Re3 Datasheet SD060SA30A - SD060SA30A SD060SA30A Datasheet MC1322x - MC1322x MC1322x Datasheet MC1322xRM - MC1322xRM MC1322xRM Datasheet CH370 - CH370 CH370 Datasheet LT1508 - LT1508 LT1508 Datasheet LCX16240 - LCX16240 LCX16240 Datasheet ERH2822 - ERH2822 ERH2822 Datasheet 1SS193 - 1SS193 1SS193 Datasheet
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