High Performance Vector Processing Chip Radar/Sonar Signal Proces

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High Performance Vector Processing Chip Radar/Sonar Signal Proces

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Pathfinder-1
High Performance Vector Processing Chip
Radar/Sonar Signal Processing Signal Intelligence/Real Time Spectral Analysis Telecommunications Medical Electronics High Performance Instrumentation
Pathfinder-1 Benefits Features
Clock (Commercial Temperature Range 70°C) 3.3V Operation Synchronous System Design 0.35 micron CMOS Three Layer Metal Process 24-and 32-Bit Complement Block Floating Point (8-bit Exponent) Provides Dynamic Range Distributed Internal Scaling Minimizes Round Errors Five Port Device Full Crossbar Multiplexing Ports Free Window Filter Multiplications with First Pass IFFT Radix Sizes Designed VHDL Supported Opcodes Include Radix Real Complex Data Complex Real Multiply Add, Subtract Single Channel Real FFTs Dual Channel Real FFTs Single Channel Real IFFTs Dual Channel Real IFFTs Magnitude Squared SBGA Package Compatible with CRI's Sojourner Address Generator
Pathfinder-1
Pathfinder-1 Benefits Features
Pathfinder-1 high-performance digital signal processor optimized computing general-purpose frequency-domain functions such FFTs, IFFTs, real complex multiplies, correlations, fast convolutions, polyphase filters. high precision handling internal scaling enables Pathfinder-1 process large vector sizes million complex samples) with dynamic range unmatched other commercially- available processing integrated circuit. Pathfinder-1 provides multi-port data flow structure designed support concurrent processing, making chip excellent match applications requiring very fast data throughput rates. Multiple Pathfinder-1 DSPs pipelined cascaded increased performance. synchronous features Pathfinder-1 combined with five port architecture allows straight forward system design. Performing complex 25.6 microseconds clock) makes Pathfinder-1 fastest 32-bit, commerciallyavailable, processor available today. Architectural Overview Pathfinder-1 integrated circuit built from multiple complex multiplication stages, radix-four cores, radix-two core. unique feature Pathfinder-1 processing core distributed shift round stages. This allows improvement dynamic range over more traditional block floating point architectures. Combined with 32-bit precision, Pathfinder-1 offers most dynamic range processing chip currently available. Data Flow Pathfinder-1 provides five bidirectional ports (please block diagram Figure chip allows full cross-bar multiplexing five ports, enabling very flexible system designs algorithm implementation. benefit five port architecture that cascaded processor designs become straight forward implement. (Please "Example System Architectures" more details.) Another benefit port architecture that port needs designated exclusively coefficient port. Twiddle factors, windows, filters stored memory bank connected five ports, accessed time during processing. Additionally, results from processing pass broadcast simultaneously separate ports. This feature fine implementing algorithms where intermediate results vector operation need stored used later process, cuts down number processing passes required. example, previous chip architectures required that results process pass flow into specific memories. Additional processing passes were necessary move intermediate result other memory banks could used later process. Since Pathfinder-1 full cross-bar multiplexing five bi-directional ports, need extra move passes eliminated thus increasing performance these types algorithms. Tables summarize data flow function Pathfinder-1
Pathfinder-1
Pathfinder-1 System Architectures
Code Positions Read Data Path Function Code (binary)
00000 00001 00010 00011 00100
DF(9:8) DF(9:8) DF(9:8) DF(9:8) DF(9:8)
port select port select port select port select port select
Function
Throug hput latency (clks)
RADIX RADIX RADIX RADIX DUAL_CHANNEL_ REAL DUAL CHANNEL REAL INVERSE SINGLE_ CHANNEL_REAL SINGLE CHANNEL REAL INVERSE MAGNITUDE _SQUARED COMPLEX _MULTIPLY REAL_MULTIPLY SUBTRACT FLOW RADIX_2R RADIX_4R RADIX_16R RADIX_32R
Table Pathfinder-1 Port Selection
Code Encoding Read Data Path
"00" "01" "10" "11"
data input twiddle input data output port unused tri-state
00101
00110
Table Pathfinder-1 Port Functionality
Example System Architectures
00111
Pathfinder-1 designed used with pipelined sync-burst synchronous SRAM's external address generators (such CRI's Sojourner chip). resulting design very flexible, high-performance frequency-domain processing engine that applied variety demanding real-time applications. example system-level block diagram recursive architecture provided Figure supports concurrent processing, provides high degree programmability. Figure shows example cascaded design. designed maximize continuous throughput given algorithm Function Pathfinder-1's function optimized frequency domain processing applications. passbased processor where given function opcode operates entire data vector. Table summarizes Pathfinder-1's processing functions.
01000
01001 01010 01011 01100 01101 01110 01111 10000 10001
Pathfinder-1
Pathfinder-1 Performance
Table lists performance single Pathfinder-1 running sizes from points million points (complex). small vectors points less) implemented stacked transforms. Multiple Pathfinder-1 chips cascaded support continuous data rates million samples second (MSPS) complex MSPS real regardless size.
Complex Size 1024 2048 4096 8192 16384 32768 65536 131072 262144 524288 1048576
Time (microseconds) Clock 12.8 25.6 76.8 153.6 307.2 614.4 1228.9 3277.0 6554.1 13,108.2 26,216.5 52,433.3
MSPS (Complex) 80.0 80.0 40.0 40.0 40.0 40.0 40.0 26.7 26.7 26.7 26.7 26.7 20.0 20.0 20.0 20.0 20.0
Pathfinder-1
Pathfinder-1 Packaging Information
Figure Tape (Heat Spreader Type) 40x40
Pathfinder-1
Pathfinder-1 Block Diagram
Function Code
Data Flow Code
Control
Port
Input Data
Port Port Port Port Crosspoint Switch
Twiddle Factor
Radix Processor Core
Output Data
About Catalina Research, Inc.
Catalina Research, Inc., based Colorado Springs, Colorado, customer-driven innovative design marketing company that provides highbandwidth, low-latency digital signal processing (DSP) solutions most demanding commercial government applications. Focusing FFTs digital receivers, product offerings include ASICs, boards, systems. COTS board-level products include highest performance processors, digital receivers, reconfigurable computers, converters. Form factors buses supported include VME, RACE, 64-bit PCI, PMC. Information this product, along with CRI's entire product line, found CRI's site www.catalinaresearch.com.
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information provided herein believed reliable; however, assumes responsibility inaccuracies omissions. assumes responsibility this information, such information shall entirely user's risk. Prices specifications subject change without notice. patent rights licenses circuits described herein implied granted third party. does authorize warranty product life support devices and/or systems. 1999-2000 Catalina Research, Inc.
Pathfinder-1
Pathfinder-1 Block Diagram

High Performance Vector Processing Chip Radar/Sonar Signal Proces

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