DESCRIPTIO Sample Rate: 2.5Msps 80dB S/(N 90dB 100kHz Single Oper

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DESCRIPTIO Sample Rate: 2.5Msps 80dB S/(N 90dB 100kHz Single Oper

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LTC1411 Single Supply 14-Bit 2.5Msps
DESCRIPTIO
Sample Rate: 2.5Msps 80dB S/(N 90dB 100kHz Single Operation Pipeline Delay Programmable Input Ranges Power Dissipation: 195mW (Typ) True Differential Inputs Reject Common Mode Noise Out-of-Range Indicator Internal External Reference Sleep (1µA) (2mA) Shutdown Modes 36-Pin SSOP Package
®1411 2.5Msps sampling 14-bit converter 36-pin SSOP package, which typically dissipates only 195mW from single supply. This device comes complete with high bandwidth sample-andhold, precision reference, programmable input ranges internally trimmed clock. powered down with either Sleep mode power applications. LTC1411 converts either differential single-ended inputs presents data complement format. Maximum specs include ±2LSB 14-bit missing code over temperature. Outstanding dynamic performance includes 80dB S/(N 90dB 100kHz input frequency. LTC1411 four programmable input ranges selected digital input pins, PGA0 PGA1. This provides input spans ±1.8V, ±1.27V, ±0.9V ±0.64V. out-of-the-range signal together with (MSB) will indicate whether signal over under ADC's input range. simple conversion start input data ready signal ease connections FIFOs, DSPs microprocessors.
APPLICATIO
Telecommunications High Speed Data Acquisition Digital Signal Processing Multiplexed Data Acquisition Systems Spectrum Analysis Imaging Systems
registered trademarks Linear Technology Corporation.
BLOCK DIAGRA
AIN+ AIN- REFOUT REFIN REFCOM1 2.5V BANDGAP REFERENCE
OVDD
OGND
14-BIT
OUTPUT DRIVERS INTERNAL CLOCK
BUSY
REFCOM2
X1.62/ X1.15
CONTROL LOGIC
S/(N (dB)
AGND
PGA0
PGA1
CONVST
DGND
1411
S/(N Effective Bits Input Frequency
EFFECTIVE BITS
1000 INPUT FREQUENCY (kHz)
10000
1411 TA02
1411f
LTC1411
ABSOLUTE RATI
PACKAGE/ORDER ATIO
VIEW AIN+ AIN- REFOUT REFIN REFCOM1 REFCOM2 AGND1 AGND2 AGND3 PGA0 PGA1 CONVST DGND OVDD OGND BUSY
OVDD (Notes
Supply Voltage (VDD) Analog Input Voltage (Note 0.3V (VDD 0.3V) Digital Input Voltage (Note 0.3V Digital Output Voltage 0.3V (VDD 0.3V) Power Dissipation 500mW Operating Temperature Range LTC1411C 70°C LTC1411I 40°C 85°C Storage Temperature Range 65°C 150°C Lead Temperature (Soldering, sec). 300°C
ORDER PART NUMBER LTC1411CG LTC1411IG
(MSB)
PACKAGE 36-LEAD PLASTIC SSOP TJMAX 125°C, 95°C/
Consult Marketing parts specified with wider operating temperature ranges.
VERTER CHARACTERISTICS
PARAMETER Resolution Missing Codes) Integral Linearity Error Offset Error Full-Scale Error Full-Scale Tempco (Note (Note
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. (Notes
CONDITIONS
UNITS Bits ppm/°C
External Reference 2.5V IOUT(REF)
ACCURACY
SYMBOL PARAMETER
25°C (Note
CONDITIONS 100kHz Input Signal 500kHz Input Signal 100kHz Input Signal, Harmonic 500kHz Input Signal, Harmonic 100kHz Input Signal 500kHz Input Signal S/(N 74dB 80.0 77.5 0.66 UNITS LSBRMS
1411f
S/(N Signal-to-Noise Plus Distortion Ratio Total Harmonic Distortion Peak Harmonic Spurious Noise Full Linear Bandwidth Transition Noise
LTC1411
ALOG
SYMBOL PARAMETER
Analog Input Range (Note
Common Mode Input Range tACQ tjitter CMRR Analog Input Capacitance Sample-and-Hold Acquisition Time Sample-and-Hold Aperture Delay Time Sample-and-Hold Aperture Delay Time Jitter Analog Input Common Mode Rejection Ratio Input Leakage Current (Pins
REFERE CHARACTERISTICS
PARAMETER VREF Output Voltage VREF Output Tempco VREF Line Regulation VREF Load Regulation REFCOM2 Output Voltage REFIN Input Current CONDITIONS IOUT IOUT 4.75V 5.25V IOUT
DIGITAL PUTS DIGITAL OUTPUTS
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. (Note
SYMBOL PARAMETER ISOURCE ISINK High Level Input Voltage Level Input Voltage Digital Input Current Digital Input Capacitance High Level Output Voltage Level Output Voltage Output Source Current Output Sink Current 4.75V, 10µA 4.75V, 200µA 4.75V, 160µA 4.75V, 1.6mA VOUT VOUT
POWER REQUIRE
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. (Note
SYMBOL PARAMETER Supply Voltage Supply Current Mode Sleep Mode Power Dissipation Mode Sleep Mode CONDITIONS (Note
25°C (Note
CONDITIONS (AIN+) (AIN-), PGA0 PGA1 (AIN+) (AIN-), PGA0 PGA1 (AIN+) (AIN-), PGA0 PGA1 (AIN+) (AIN-), PGA0 PGA1 AIN+ AIN- Between Conversions (Sample Mode) During Conversions (Hold Mode) (AIN- AIN+) ±1.8 ±1.27 ±0.9 ±0.64 UNITS psRMS
25°C (Note
2.480 2.500 0.01 4.05 2.520 UNITS ppm/°C LSB/ LSB/mA
IOUT PGA0 PGA1 REFIN External Reference 2.5V
CONDITIONS 5.25V 4.75V VDD, Except SLP, (Note
UNITS
4.75 0.05 0.10
4.75
5.25
UNITS
1411f
(Note
LTC1411
CHARACTERISTICS
SYMBOL fSAMPLE(MAX) tCONV tACQ PARAMETER Maximum Sampling Frequency Conversion Time Acquisition Time CONVST Wake-Up Time CONVST Wake-Up Time CONVST Time CONVST BUSY Delay Data Ready After BUSY CONVST High Time Aperture Delay Sample-and-Hold
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. (Notes (See Figures 11a, 11b)
CONDITIONS (Note
Note Absolute Maximum Ratings those values beyond which life device impaired. Note voltage values with respect ground with DGND, OGND, AGND wired together unless otherwise noted. Note When these voltages taken below AGND above VDD, they will clamped internal diodes. This product handle input currents greater than 100mA without latchup. Note When these voltages taken below AGND, they will clamped internal diodes. This product handle input currents greater than 100mA below AGND without latchup. These pins clamped VDD. Note PGA1 PGA0 fSAMPLE 2.5MHz 25°C unless otherwise specified. Note Linearity, offset full-scale specifications apply singleended AIN+ input with AIN- tied external 2.5V reference voltage.
TYPICAL PERFOR CHARACTERISTICS
S/(N Input Frequency
1000 INPUT FREQUENCY (kHz) 10000
1411
S/(N (dB)
DISTORTION (dB)
(dB)
UNITS
10µF Bypass Capacitor REFCOM2 (Note 25pF (Note
Note Integral nonlinearity defined deviation code from straight line passing through actual endpoints transfer curve. deviation measured from center quantization band. Note Bipolar offset offset voltage measured from 0.5LSB when output code flickers between 0000 0000 0000 1111 1111 1111 Note Recommended operating conditions. Note falling CONVST edge starts conversion. CONVST returns high critical point during conversion create small errors. best performance ensure that CONVST returns high within 20ns after conversion start after BUSY rises. Note have internal pull-down pins will draw approximately when tied high less than when tied low.
Signal-to-Noise Ratio Input Frequency
1000 INPUT FREQUENCY (kHz) 10000
1411
Distortion Input Frequency
-100 -110 1000 INPUT FREQUENCY (kHz) 10000
1411
1411f
LTC1411 TYPICAL PERFOR CHARACTERISTICS
Spurious Free Dynamic Range Input Frequency
DISTORTION (dB)
SINAD (dB)
-100 -110 1000 INPUT FREQUENCY (kHz) 10000
1411
1000 INPUT FREQUENCY (kHz) 10000
1411
(LSB)
Differential Nonlinearity Output Code
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
(LSB)
-0.2 -0.4 -0.6 -0.8 -1.0 4096 8192 12288 OUTPUT CODE 16384
1411
Histogram 4096 Conversions
3500 3000 2500 2000 1500 1000 CODE
1411
AMPLITUDE (dB)
COUNTS
S/(N Input Frequency Amplitude
-40dB -20dB -0.2 -0.4 -0.6 -0.8 -1.0
Integral Nonlinearity Output Code
4096
8192 12288 OUTPUT CODE
16384
1411
Supply Current Temperature
46.5 44.0 41.5 39.0 36.5 34.0 31.5 TEMPERATURE (°C)
1411
Supply Current Supply Voltage
25°C
4.75
5.25
1411
4096 Points Plot (100kHz)
-100 -120 -140 1000 INPUT FREQUENCY (kHz) 1250
1411
SINAD 78.8dB SFDR 95dB fSAMPLE 2.5MHz 100kHz
1411f
LTC1411 TYPICAL PERFOR CHARACTERISTICS
4096 Points Plot (1MHz)
-100 -120 -140 1000 1250
1411
ACQUISITION TIME (µs)
SINAD 75dB SFDR 81dB fSAMPLE 2.5MHz 1MHz
AMPLITUDE (dB)
CTIO
AIN+ (Pin Positive Analog Input. converts difference voltage between AIN+ AIN- with programmable input ranges ±1.8V, ±1.27V, ±0.9V ±0.64V depending selection. AIN+ common mode range between VDD. AIN- (Pin Negative Analog Input. This tied REFOUT tied external voltage. This voltage also bipolar zero ADC. AIN- common mode range between VDD. REFOUT (Pin 2.5V Reference Output. Bypass AGND1 with 22µF tantalum capacitor REFOUT tied AIN-. capacitor needed external reference used drive AIN-. REFIN (Pin Reference Buffer Input. This tied REFOUT external reference more precision required. REFCOM1 (Pin Noise Reduction Pin. 10µF bypass capacitor this reduce noise going into reference buffer. REFCOM2 (Pin 4.05V Reference Compensation Pin. Bypass AGND1 with 10µF tantalum capacitor parallel with 0.1µF ceramic. AGND (Pins Analog Ground. AGND1 ground reference. AGND2 ground comparator AGND3 ground remaining analog circuitry. (Pin 10): Analog Power Supply. Bypass AGND with 10µF tantalum capacitor. (Pin 11): Analog Digital Substrate Pin. this AGND. (Pins 25): Digital Data Outputs. (Most Significant Bit). (Pin 26): Out-of-the-Range Pin. This used conjunction with determine signal less than greater than analog input range. high, analog input exceeds maximum voltage input range. BUSY (Pin 27): Busy Output. Converter status pin. during conversion. OGND (Pin 28): Digital Ground Output Drivers (Data Bits, BUSY). OVDD (Pin 29): Digital Power Supply Output Drivers (Data Bits, BUSY). Bypass OGND with 10µF tantalum capacitor.
1411f
Acquisition Time Source Resistance
0.01
FREQUENCY (kHz)
1000 10000 100000 SOURCE RESISTANCE
1411
LTC1411
CTIO
(Pin 30): Digital Power Supply Pin. Bypass OGND with 10µF tantalum capacitor. DGND (Pin 31): Digital Ground. CONVST (Pin 32): Conversion Start Signal. This active signal starts conversion falling edge. PGA1, PGA0 (Pins 34): Logic Inputs Programmable Input Range. This four input ranges four REFCOM2 voltages) controlled these pins. logic inputs applied PGA0 PGA1, following summarizes gain levels analog input range with AIN- tied 2.5V.
Table Input Spans LTC1411
PGA0 PGA1 LEVEL INPUT SPAN ±1.8V ±1.28V ±0.9V ±0.64V REFCOM2 VOLTAGE 2.9V 1.45V
TYPICAL
ECTIO DIAGRA
AIN+ AIN- REFOUT REFIN INTERNAL CLOCK 2.5V BANDGAP REFERENCE
22µF*
14-BIT
10µF
REFCOM1
10µF
REFCOM2
X1.62/ X1.15
CONTROL LOGIC
AGND
PGA0
22µF CAPACITOR NEEDED REFOUT USED DRIVE AIN-
(Pin 35): Input. Driving this will mode will reduce supply current internal reference will remain active. (Pin 36): Sleep Input. Driving this will Sleep mode draws less than supply current.
OVDD
OGND
OUTPUT DRIVERS
BUSY
PGA1
CONVST
DGND
1411 TA01
1411f
LTC1411
TEST CIRCUITS
Load Circuits Access Timing
Load Circuits Output Float Delay
Hi-Z
Hi-Z
1411 TC01
Hi-Z
Hi-Z
1411 TC02
APPLICATIO ATIO
CONVERSION DETAILS
LTC1411 uses successive approximation algorithm internal sample-and-hold circuit convert analog signal 14-bit parallel output. complete with precision reference, internal clock programmable input range. device easy interface with microprocessors DSPs. (Please refer Digital Interface section data format.) Conversions started falling edge CONVST input. Once conversion cycle begun, cannot restarted. Between conversions, acquires analog input preparation next conversion. acquire phase, minimum time 100ns will provide enough time sample-and-hold capacitors acquire analog signal.
AIN+
INTERNAL CLOCK
14-BIT
OUTPUT DRIVERS
CONTROL LOGIC
PGA0
PGA1
CONVST
DGND
1411
Figure Simplified Block Diagram
During conversion, internal differential 14-bit capacitive output sequenced from most significant (MSB) least significant (LSB). input successively compared with binary weighted charges supplied differential capacitive DAC. decisions made high speed comparator. conversion, output balances analog input (AIN+ AIN-). contents 14-bit data word) which represents difference AIN+ AIN- loaded into 14-bit output latches. DYNAMIC PERFORMANCE LTC1411 excellent high speed sampling capability. (Fast Fourier Transform) test techniques used test ADC's frequency response, distortion noise rated throughput. applying distortion sine wave analyzing digital output using algorithm, ADC's spectral content examined frequencies outside fundamental. Figure shows typical LTC1411 plot. Signal-to-Noise signal-to-(noise distortion) ratio [S/N ratio between amplitude fundamental input frequency amplitude other frequency components output. output band limited frequencies from above below half sampling frequency. Figure shows typical spectral content with 2.5MHz sampling rate 100kHz input. dynamic performance holds well higher input frequencies (see Figure 2b).
1411f
OVDD
OGND
BUSY
LTC1411
APPLICATIO ATIO
-100 -120 -140 1000 INPUT FREQUENCY (kHz) 1250
1411
SINAD 78.8dB SFDR 95dB fSAMPLE 2.5MHz 100kHz
AMPLITUDE (dB)
S/(N (dB)
Figure LTC1411 Nonaveraged, 4096 Point FFT, Input Frequency 100kHz
-100 -120 -140 1000 1250
1411
SINAD 75dB SFDR 81dB fSAMPLE 2.5MHz 1MHz
AMPLITUDE (dB)
DISTORTION (dB)
FREQUENCY (kHz)
Figure LTC1411 4096 Point FFT, Input Frequency 1MHz
Effective Number Bits effective number bits (ENOBs) measurement resolution directly related S/(N equation: ENOBS [S/(N 1.76]/6.02 where S/(N expressed maximum sampling rate 2.5MHz LTC1411 maintains good ENOBs Nyquist input frequency 1.25MHz. Refer Figure Total Harmonic Distortion Total harmonic distortion (THD) ratio harmonics input signal fundamental
1000 INPUT FREQUENCY (kHz) 10000
1411 TA02
Figure Effective Bits Signal/(Noise Distortion) Input Frequency
-100 -110 1000 INPUT FREQUENCY (kHz) 10000
1411
EFFECTIVE BITS
Figure Distortion Input Frequency
itself. out-of-band harmonics alias into frequency band between half sampling frequency. expressed
where amplitude fundamental frequency through amplitudes second through harmonics. input frequency shown Figure LTC1411 good distortion performance Nyquist frequency beyond.
1411f
LTC1411
APPLICATIO ATIO
Peak Harmonic Spurious Noise
ACQUISITION TIME (µs)
peak harmonic spurious noise largest spectral component excluding input signal This value expressed relative value fullscale input signal. Full-Power Full-Linear Bandwidth full-power bandwidth that input frequency which amplitude reconstructed fundamental reduced full-scale input signal. full-linear bandwidth input frequency which S/(N dropped 74dB effective bits). LTC1411 been designed optimize input bandwidth, allowing undersample input signals with frequencies above converter's Nyquist frequency. noise floor stays very high frequencies; S/(N becomes dominated distortion frequencies beyond Nyquist. Driving Analog Input differential analog inputs LTC1411 easy drive. inputs driven differentially singleended input (i.e., AIN- input tied fixed voltage such REFOUT LTC1411 external source). Figure shows simplified block diagram analog inputs LTC1411. AIN+ AIN- sampled same instant. unwanted signal that common mode both inputs will reduced common mode rejection sample-and-hold circuit. inputs draw only small current spike while charging sample-and-hold capacitors conversion. During conversion, analog inputs draw only small leakage current. source impedance driving circuits low, then LTC1411 inputs driven directly. More acquisition time should allowed higher impedance source. Figure shows acquisition time versus source resistance. Choosing Input Amplifier Choosing input amplifier easy requirements taken into consideration. First, limit magnitude voltage spike seen amplifier from charging
0.01 1000 10000 100000 SOURCE RESISTANCE
1411
Figure Acquisition Time Source Resistance
sampling capacitor, choose amplifier that output impedance (<100) closed-loop bandwidth frequency. example, amplifier used gain unity-gain bandwidth 50MHz, then output impedance 50MHz must less than 100. second requirement that closed-loop bandwidth must greater than 40MHz ensure adequate smallsignal settling full throughput rate. slower amps used, more settling time provided increasing time between conversions. best choice drive LTC1411 will depend application. Generally applications fall into categories: applications where dynamic specifications most critical time domain applications where accuracy settling time most critical. following list summary amps that suitable driving LTC1411. More detailed information available Linear Technology Databooks LinearViewCD-ROM. LT®1227: 140MHz Video Current Feedback Amplifier. 10mA supply current. ±15V supplies. noise. Good applications. LT1395: 400MHz Current Feedback Amplifier. Single supplies. Good applications. LT1800: 80MHz, 25V/µs Power Rail-to-Rail Input Output Precision Amp. Specified supplies. Excellent performance.
LinearView trademark Linear Technology Corporation.
1411f
LTC1411
APPLICATIO ATIO
LT6203: Dual 100MHz, Noise, Power Amp. Specified supplies. 1.9nV/Hz noise voltage. Programmable Input Range LTC1411 logic input pins (PGA0 PGA1) that used select four analog input ranges. These input ranges changing reference voltage that applied internal (REFCOM2). "0dB" setting internal sees full reference voltage analog input range 0.7V 4.3V with AIN- 2.5V. This corresponds input span ±1.8V with respect voltage applied AIN- 3dB" setting internal reference reduced 0.707 2.9V. Likewise input span reduced ±1.28V. following table lists input span with respect AIN- different PGA0 PGA1 settings.
Table Input Spans LTC1411
PGA0 PGA1 LEVEL INPUT SPAN ±1.8V ±1.28V ±0.9V ±0.64V REFCOM2 VOLTAGE 2.9V 1.45V
When changing from input span another, more time needed REFCOM2 reach correct level because bypass capacitor needs charged discharged. Figure shows recommended capacitors REFCOM1 REFCOM2 pins (10µF each). When selected, voltage REFCOM1 (see Figure must first settle before REFCOM2 reaches correct level. typical delay about 700ms. When REFCOM2 level changed from 2.9V (changing setting from 0dB), typical delay 0.6ms. However, voltage REFCOM2 changed from 2.9V (changing setting from 3dB) only 60µA sink current present discharge 10µF bypass capacitor. this case, delay will 11ms.
Internal Reference LTC1411 on-chip, temperature compensated, curvature corrected, bandgap reference that factory trimmed 2.500V. this REFOUT used drive AIN- pin, 22µF tantalum bypass capacitor required this REFOUT voltage sets bipolar zero ADC. REFIN connected reference buffer through resistor switches. REFIN connected REFOUT directly external reference. Figure shows reference buffer structure LTC1411. input reference buffer either REFIN REFIN depending selection. REFCOM1 bypassed with 10µF tantalum capacitor helps reduce noise going into buffer. reference buffer gain 1.62 1.15 (depends selection). compensated REFCOM2 with 10µF tantalum capacitor. input span output voltage this REFCOM2 voltage. 2.5V input REFIN pin, REFCOM2 will have output PGA1 PGA0 will have span 3.6V.
REFOUT 2.5V BANDGAP REFERENCE 22µF** REFIN* REFCOM1 10µF REFCOM2 X1.62 10µF
1411
*THIS TIED REFOUT EXTERNAL SOURCE 22µF CAPACITOR NEEDED REFOUT USED DRIVE AIN-
Figure Reference Structure LTC1411 PGA1 PGA0
1411f
LTC1411
APPLICATIO ATIO
Figure shows typical reference, LT1019A-2.5 connected LTC1411. This will provide improved drift (equal maximum 5ppm/°C LT1019A-2.5).
INPUT RANGE: 0.7V 4.3V VOUT LT1019A-2.5 10µF LTC1411 AIN+ AIN- REFIN AGND
1411
Figure Supplying 2.5V Reference Voltage LTC1411 with LT1019A-2.5
Digital Interface very simple digital interface with only control input, CONVST. logic applied CONVST input will initiate conversion. presents digital data complement format with bipolar zero voltage applied AIN- pin. Internal Clock internal clock factory trimmed achieve typical conversion time 260ns. With typical acquisition time 100ns, throughput sampling rate 2.5Msps guaranteed. Out-of-the-Range Signal (OTR) LTC1411 digital output, OTR, that indicates analog input signal range. remains when analog input within specified range. Once analog signal goes most negative input (1000 0000 0000 64LSB above specified most positive input, will high. NORing (MSB) complement with OTR, overrange underrange detected shown Figure Table truth table out-of-the-range circuit Figure Power Shutdown (Sleep Modes) LTC1411 provides shutdown features that will save power when inactive.
U1-A OVERRANGE U1-B UNDERRANGE U1-A, U1-B 74HC EQUIVALENT
1411
Figure Overrange Underrange Logic Table Out-of-the-Range Truth Table
(MSB) ANALOG INPUT Range Range Overrange Underrange
CONVST
1411
Figure CONVST Wake-Up Timing
driving Sleep mode, shuts down less than 1µA. After release from Sleep mode, needs 210ms (10µF bypass capacitor REFCOM2 pin) wake mode, power except internal reference which still active other external circuitry. this mode draws about instead 39mA (for minimum power, logic inputs must within 600mV from supply rails). wake-up time from mode active state 250ns shown Figure Board Layout Bypassing Wire wrap boards recommended high resolution high speed converters. obtain best performance from LTC1411, printed circuit board with ground plane required. Layout printed circuit board should ensure that digital analog signal lines separated much possible. particular, care should taken digital track alongside analog signal track.
1411f
LTC1411
APPLICATIO ATIO
analog ground plane separate from logic system ground should established under around ADC. AGND1, (Pins (Pin 11), DGND (Pin OGND (Pin other analog grounds should connected single analog ground point. REFOUT, REFCOM1, REFCOM2 should bypass this analog ground plane (see Figure 10). other digital grounds should connected this analog ground plane. impedance analog digital power supply common returns essential noise operation foil width these tracks should wide possible. Timing Control Conversion start controlled CONVST digital input. falling edge transition CONVST will start conversion. Once initiated, cannot restarted until conversion complete. Converter status indicated BUSY output. BUSY during conversion. digital output code updated conversion about after BUSY rises, i.e., output data valid rising edge BUSY. Valid data latched with falling edge BUSY with rising edge CONVST. either case, data latched will previous conversion results. Figures timing diagrams LTC1411.
AIN+ LTC1411 AIN- REFOUT REFIN REFCOM1 REFCOM2 AGND1 AGND2 AGND3 OVDD DGND OGND
ANALOG INPUT CIRCUITRY
Figure Power Supply Grounding Practice
Input/Output Compatible LTC1411 operates supply, which makes device easy interface digital systems. This device also talk digital systems: digital input pins (CONVST, SLP) LTC1411 recognize inputs. LTC1411 dedicated output supply (OVDD) that controls output swings digital output pins D13, BUSY OTR) allows part talk either digital systems. output two's complement binary. Figure input/output characteristics when AIN- 2.5V. code transitions occur midway between successive integer values (i.e., 0.5LSB, 1.5LSB, 2.5LSB. 1.5LSB). output code scaled such that 1LSB FS/16384 3.6V/16384 219.7µV. Offset Full-Scale Adjustment applications where absolute accuracy important, offset full-scale errors adjusted zero. Offset error must adjusted before full-scale error. Figure shows extra components required full-scale error adjustment. Zero offset achieved adjusting offset applied AIN- input. zero offset error, apply 2.49989V (i.e., 0.5LSB) AIN+ adjust AIN- input until output code flickers between 0000 0000 0000 1111 1111 1111 full-scale adjustment, input voltage 4.29967V 1.5LSBs) applied AIN+ adjusted until output code flickers between 0111 1111 1111 0111 1111 1111
DIGITAL SYSTEM
1411
1411f
LTC1411
APPLICATIO ATIO
CONV (SAMPLE CONVST
BUSY
DATA
DATA DB13
Figure 11a. CONVST Starts Conversion with Short Active Pulse
(SAMPLE CONVST BUSY
tCONV
DATA
DATA DB13
Figure 11b. CONVST Starts Conversion with Short Active High Pulse
011.111 011.110 BIPOLAR ZERO
OUTPUT CODE
000.001 000.000 111.111 111.110
100.001 100.000 -FS/2 1LSB 3.6V 219.7µV 16384 16384 2.5V FS/2 1LSB INPUT VOLTAGE
1411
Figure LTC1411 Bipolar Transfer Characteristics (2's Complement)
DATA DB13 DATA DB13
1411 F11a
DATA DB13 DATA DB13
1411 F11b
OFFSET ADJUST 100k FULL-SCALE ADJUST 100k
AIN+ AIN-
LTC1411
REFIN
1411
Figure Offset Full-Scale Adjustment
1411f
LTC1411
PACKAGE DESCRIPTIO
5.20 5.38** (.205 .212)
(.005 .009)
(.022 .037)
NOTE: CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS DIMENSIONS (INCHES) DRAWING SCALE *DIMENSIONS INCLUDE MOLD FLASH. MOLD FLASH SHALL EXCEED .152mm (.006") SIDE **DIMENSIONS INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL EXCEED .254mm (.010") SIDE
Information furnished Linear Technology Corporation believed accurate reliable. However, responsibility assumed use. Linear Technology Corporation makes representation that interconnection circuits described herein will infringe existing patent rights.
Package 36-Lead Plastic SSOP (5.3mm)
(Reference 05-08-1640)
12.67 12.93* (.499 .509) 7.65 7.90 (.301 .311) 1.73 1.99 (.068 .078) (.0256) (.010 .015) (.002 .008)
SSOP 0501
1411f
LTC1411
TYPICAL APPLICATIO
PROGRAMMABLE RANGE DIFFERENTIAL INPUTS (±0.64V ±1.8V)
AIN+ AIN- REFOUT REFIN INTERNAL CLOCK 2.5V BANDGAP REFERENCE
14-BIT
10µF
REFCOM1
10µF
REFCOM2
X1.62/ X1.15
CONTROL LOGIC
AGND
PGA0
RELATED PARTS
PART NUMBER 16-Bit LTC1608 14-Bit LTC1414 LTC1419 LTC1744 12-Bit LTC1420 LTC1412 LTC1402 LTC1405 LTC1410 LTC1415 10Msps 3Msps 2.2Msps 5Msps 1.25Msps 1.25Msps Supply, 71dB SINAD Input 150mW, 71dB SINAD 84dB 90mW, Serial Interface, 16-Lead SSOP Package 115mW, 71.3dB S/N+D, 85dB SFDR 150mW, 71.5dB SINAD 84dB 55mW, Single Supply 2.2Msps 800ksps 50Msps 150mW, 81dB SINAD 95dB SFDR 150mW, 81.5dB SINAD 95dB SFDR 1.5W, Modes: 77dB 90dB SFDR 500ksps ±2.5V Input Range, Compatible with LTC1604 RESOLUTION SPEED COMMENTS
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, 95035-7417
(408) 432-1900 FAX: (408) 434-0507
www.linear.com
2.5Msps 14-Bit with Programmable Input Range
OVDD
OGND 14-BIT OUTPUT DATA
OUTPUT DRIVERS
BUSY
PGA1
CONVST
DGND
1411 TA03
2.5MHz CONVERT INPUT INPUT RANGE SELECTION
1411f LT/TP 0902 PRINTED
LINEAR TECHNOLOGY CORPORATION 2001

DESCRIPTIO Sample Rate: 2.5Msps 80dB S/(N 90dB 100kHz Single Oper

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