The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.    


Datasheet Search Engine   
 
Part # or Description: • 5V RS232 Driver • 2SC5066* • "Real Time Clock" • "USB connector" • "blue led" 5mm • 10 watt zener diode • 2N3055* motorola
 
Search Tip: Try entering the part number only. Include a wildcard (eg. lm317* or 1n4148*)

 

 

AK2301A 3.3V Single channel CODEC GENERAL DESCRIPTION AK2301


Datasheet Thumbnail

  

Download PDF



Top Searches for this datasheet



AK2301A
AK2301A
3.3V Single channel CODEC
GENERAL DESCRIPTION AK2301A single channel CODEC speech processing 8kHz sampling data DSP. AK2301A interfaces with 14bit linear data (16bit format). includes Band limiting filter, converter, universal op-amps construction output filter. functions provided small 24pin VSOP package good reducing mounting space. PACKAGE 24pin VSOP 7.9mm 7.6mm pitch 0.65mm FEATURE
Single CODEC filtering Mute function interface; 14bits linear data Long
systems
(16bit format, serial interface) Frame Short Frame selected automatically data rate 256kHz/512kHz Op-Amp external gain adjustment Dual universal op-amps Single power supply voltage +3.3±0.3V power consumption Small package
BLOCK DIAGRAM
VFTN VFTP AMPT
Internal Main Clock BGREF AMP1 AMP2 AMPR
CODEC Core
BCLK
PLLC MUTEN RSTN TEST1 TEST2 TEST3 AMP2I
TAGND VREF
AK2301A
AMP1O AMP1I AMP2O
<MS0300-E-00>
2004/3
CONTENT
AK2301A
ITEMS
PAGE
BLOCK DIAGRAM. CONDITION. FUNCTION. ABSOLUTE MAXIMUM RATINGS. RECOMMENDED OPERATING CONDITIONS. ELECTRICAL CHARACTERISTICS.5 PACKAGE INFORMATION. ASSIGNMENT. MARKING. CIRCUIT DESCRIPTION. FUNCTIONAL DESCRIPTION. CODEC. INTERFACE. Long Frame Short Frame. MUTE. RESET SEQUENCE. Universal op-amps. APPLICATION CIRCUIT EXAMPLE
<MS0300-E-00>
2004/3
CONDITION load (MAX.) load (MIN.)
Output status (mute)
AK2301A
Pin#
Name
VFTN VFTP BCLK MUTEN RSTN VREF
type
Analog Analog Analog Analog Analog Analog
Remarks
50pF 40pF
load (*1) load (*1) load (*1) Analog ground
40pF
CMOS CMOS CMOS CMOS CMOS CMOS Analog
50pF
Hi-Z
PLLC Analog
TAGND Analog
External capacitance 1.0µF more External capacitance 0.33µF±4 (Includes temperature characteristic) External capacitance 1.0µF more 150uA load
AMP2I AMP1I AMP1O AMP2O Test1 Test2 Test3
Analog Analog Analog Analog CMOS CMOS CMOS 40pF 40pF load (*1) load (*1)
load load against AGND. This value includes feedback resistance input/output -amp.
<MS0300-E-00>
2004/3
FUNCTION types NIN: Normal input AIN: Analog input Type Pin# Name VFTN AOUT AOUT AOUT TOUT: state output AOUT: Analog output
AK2301A
VFTP
BCLK
TOUT
MUTEN RSTN
VREF
AOUT AOUT
PLLC
TAGND AOUT
AMP1I AMP2I AMP1O AOUT Output universal AMP2O TEST1 Test pins "H"=test mode Please TEST2 TEAT3
PWR: Power Ground Function Neagative analog input transmit amp. Diffelential single amplifire composed with VFTP external registers. Transmit gain defined ratio external registers. Positive analog input transmit amp. Output transmit amp. external feedback resister connected between this VFTP. Output receive amp. Receive gain defined ratio external registers. differential output composed with using Negative analog input receive amp. Analog output convertor equivalent received code. Positive supply voltage +3.3V supply Ground (0V) Frame sync input This clock input internal which gerenates internal system clocks. must 8kHz clock which synchronized with BCLK stop feeding. clock data interface This clock defines input/output timing frequency BCLK should 256kHz 512kHz stop feeding. Serial output data data synchronized with BCLK. This output remains high impedance except period which data transmitted. Serial input data data synchronized with BCLK. Mute setting level forces both A/D, output mute state. Reset signal input Reset operation starts input. This used initialization power Please MUTEN together avoid popping sound output until finish initialaization after power up.Refer P.13 Analog ground output External capacitance (1.0µF more) should connected between this VSS. Please connect external load this pin. loop filter output External capacitance (0.33µF±40%: Includes temperature characteristic) should connected between this VSS. Analog ground output transmitte 150uA load max. External capacitance (1.0µF more) should connected between this VSS. This used analog ground transmit (AMPT). Negative input universal
<MS0300-E-00>
2004/3
ABSOLUTE MAXIMUM RATINGS Parameter Symbol Power supply voltage Analog/Digital power supply -0.3 Digital input voltage -0.3 Analog input voltage -0.3 Input current (except power supply pins) Storage temperature Tstg Warnig: Exceeding absolute maximum ratings causepermanent damage. Normal operation guranteed these extermes. RECOMMENDED OPERATING CONDITIONS Parameter Symbol Power supply voltage Analog/Digital power supply Ambient operating temperature Frame sync frequency -1.0% Note) voltages reference ground: characteristics CODEC definied 8kHz ELECTRICAL CHARACTERISTICS VDD+0.3 VDD+0.3
AK2301A
Units
+1.0%
Units
Unless otherwise noted, guaranteed +3.3V±0.3V, -40+85, FS=8kHz, VSS=0V Characteristics Parameter Power Consumption BCLK=512kHz Output high voltage Output voltage Input high voltage Input voltage Input leakage current
Symbol PDD1
Conditions output unloaded IOH-1.6mA IOL1.6mA
Unit
0.8VDD 0.7VDD 0.3VDD
Anarog ground output voltage Output leakage current
Tri-state mode
VFTN/P=1020Hz@0dBm0 input, DR=1020Hz@0dBm0 Code input
<MS0300-E-00>
2004/3
INTERFACE (Lomg Frame, Short Frame)
AK2301A
timing parameters output pins measured 0.8VDD 0.4V. Input pins measured 0.7VDD 0.3VDD. Characteristics Parameter Frequency BCLK Frequency BCLK Pulse Width (High/Low) BCLK Pulse Width (High/Low) Rising/Falling Time: (BCLK,FS0,FS1,DX0,DX1,DR0,DR1) Hold Time: BCLK High Setup Time: High BCLK Setup Time: BCLK Hold Time: BCLK Delay Time: BCLK High valid Delay Time: BCLK High High-Z Long Frame Hold Time: period BCLK Delay Time: BCLK High, whichever later,to valid Pulse Width Short Frame Hold Time: BCLK Setup Time: BCLK tHBFS tSFBS Fig2
Symbol tWBH tWBL tWBH tWBL tHBF tSFB tSDB tHBD Note1 Note1 tDBD tDZC
-1.0% 1.563 0.781
32FS/ 64FS 1.953 0.977
+1.0% 2.344 1.172
Unit Fig1,
tHBFL tDZFL tWFSL
BCLK
Fig1
Note1) Measured with 50pF load capacitance 0.2mA drive.
<MS0300-E-00>
2004/3
Interface Timing
AK2301A
tWBL
tWBH
1/fPB
BCLK
tSFB tHBFL
tHBF
tDZFL tDBD tSDB tHBD tDZC
1/fPF tWFSL
Fig1. Long Frame
tWBL
tWBH
1/fPB
BCLK
tSFB tHBFS
tHBF tSFBS tDBD tSDB tHBD tDBD tDZC
Fig2. Short Frame
<MS0300-E-00>
2004/3
ASAHI KASEI CODEC
receive transmit op-amp's characteristics measured gain. frequency specifications when deviation from 8kHz follows:
AK2301A
Used noted frequency specification Effective frequency specification 8k[Hz]
Absolute Gain Parameter Conditions Analog input level VFTP,VFTN 0dBm0@1020Hz input Absolute transmit gain Maximum overload level 3.14dBm0 Analog output level 0dBm0@1020Hz input Absolute receive gain Maximum overload level 3.14dBm0 Frequency response Parameter Conditions Transmit frequency response Relative 0.05kHz 0dBm0@1020Hz 0.06kHz 0.2kHz VFTP,VFTN 0.33.0kHz 3.4kHz 4.0kHz Receive frequency response Relative 03.0kHz 0dBm0@1020Hz 3.4kHz 4.0kHz Distortion Parameter Transmit signal Distortion VFTP,VFTN Receive signal Distortion Condtions 1020Hz Tone 0dBm0 C-message 1020Hz Tone 0dBm0 C-message Unit -0.6 -0.6 0.531 0.762 0.531 0.762 Unit Vrms Vrms Vrms Vrms
-0.15 -0.15
0.15 0.15
Unit
<MS0300-E-00>
2004/3
Noise Parameter Condtions Idle channel noise (*1) C-message VFTP,VFTN Idle channel noise DA(*2) C-message VR,GSR PSRR VDD=3.3V/±66mVop Transmit path f=010kHz PSRR VDD=3.3V/±66mVop Receiver path f=010kHz (*1) Analog input analog ground level (*2) Digital input CODE Crosstalk Parameter Transmit receive VFTP,VFTN VR,GSR Receive transmit Condtions VFTP,VFTN=0dBm0@1020Hz DR=0-Code DR=0dBm0@1020Hz code level VFTP,VFTN=0 Vrms
AK2301A
Unit dBrnC0 dBrnC0
Unit
Transmit op-amp characteristics:AMPT Parameter Load resistance Load capacitance Gain
Conditions
Unit
load, Including feedback registance Inverting amplifire
Receive signal output characteristics:VR Parameter Output voltage (AGND level) Load resistance Load capacitance
Conditions
Unit
code input load
Receive op-amp characteristics:AMPR Parameter Load resistance Load capacitance SINAD Gain Output voltage swing
Conditions
2.15
Unit Vp-p
load, Including feedback registance setting, 1020Hz@0dBm0 input VR,GSR differential output With C-message Inverting amplifire 3.14dBm0 digital code input
Universal op-amp characteristics:AMP1,2 Parameter Load resistance Load capacitance SINAD Gain Output voltage swing <MS0300-E-00>
Conditions
2.25
Unit Vp-p 2004/3
load, Including feedback registance +6dB setting, 1020Hz@1.125VP-P input 5Hz~30kHz measurment Inverting amplifire +6dB setting, 1020Hz@1.125VP-P input
PACKAGE INFORMATION 24PIN VSOP
AK2301A
7.8±0.1
1.0±0.2
0.5±0.2 7.60±0.20
+0.03 0.17-0.05
0.65
0.22±0.05
0.08
1.15 1.25 +0.20 0.10
0.08
<MS0300-E-00>
0.10
2004/3
ASSIGNMENT
AK2301A
24PIN VSOP
TEST3 BCLK AMP2O AMP2I AMP1I
TEST2 MUTEN RSTN TEST1 PLLC VREF TAGND VFTP
VFTN AMP1O
TEST1, TEST2 TEST3 test pins. Please them VSS.
MARKING
1pin sign Date Code: 5digit XXXXX Marketing Code: AK2301A logo
AK2301A XXXXX
<MS0300-E-00>
2004/3
CIRCUIT DESCRIPTION BLOCK AMPT
AK2301A
AMPR
CODEC CODEC BGREF
FUNCTION Op-amp input gain adjustment. This op-amp used inverting differential amplifier. Adjusting gain with external resistors. resistor should larger than feedback resistor. VFTN: Negative op-amp input. VFTP: Positive op-amp input. GST: Op-amp output. Op-amp output gain adjustment. This op-amp used inverting amplifier. Adjusting gain with external resistors. combined resistor larger than recommended feedback output load VFR: Negative op-amp input. GSR: Op-amp output. used differential output. Integrated anti-aliasing filter which prevents signals around sampling rate from folding back into voice band. order active low-pass filter. Converting analog signal 14bit data. band limiting filter also integrated. Converting 14bit data from analog signal. Output converter into suppress high frequency element. Extracts inband signal from output. also corrects sinx/x effect output. Provide stable analog ground voltage using on-chip band-gap reference circuit which temperature compensated. output voltage 1.5V 3.3V external capacitor 1.0uF larger should connected between VREF stabilize analog ground (VREF). Please connect external load this pin. TAGND used analog ground level output AMPT. external capacitor 1.0uF larger should connected between TAGND stabilize analog ground. data rate, both 256kHz 512kHz available. 14bit data input/output compliment 16bit serial data format. kinds serial data format (Long Frame/Short Frame) available. Each data format automatically detected AK2301A. data input output from pin. Universal op-amp filter external voice path. maximum load (including feedback resistor load). These op-amps assumed using inverting with 20kHz frequency.
AMP1AMP2
<MS0300-E-00>
2004/3
FUNCTIONAL DESCRIPTIONS
AK2301A
CODEC
Analog input signal converted 14bit data. analog signal anti-aliasing filter (AAF) before converting data, prevent signals around sampling rate from folding back into voice band. converted data passes through band limiting filter which Frequency response designated page8, output from with first format. synchronized with rising edge BCLK. This data compliment 2digit data full scale defined 3.14dBm0. analog input 0.762Vrms converted digital code 3.14dBm0. Input data from through digital filter which Frequency response designated page8, converted analog signal. This analog signal removed high frequency element with (fc=30kHz typ) output from pin. input data compliment 2digit data full scale defined 3.14dBm0. When input signal 3.14dBm0, level analog output signal becomes 0.762Vrms. digital code relation ship between analog signal linear code. Signal level 14bit linear CODE (MSB First) Full scale 1111 1111 1111 Peak value 0dBm0 CODE 0110 0100 1010 0-CODE 0000 0000 0000 Full scale 0000 0000 0000
<MS0300-E-00>
2004/3
AK2301A
Data Interface
AK2301A supports following data formats Long Frame Sync (LF) Short Frame Sync (SF) data interfaced through (DX, DR). each case, data interfaced compliment 2digit data with 16bit first format. However, internal CODEC 14bit format operation, then lowest 2bits output become level. input, lowest bits ignored.
Selection interface format
AK2301A automatically selects Long Frame/Short frame means detecting length frame signal.
LONG FRAME (LF) SHORT FRAME (SF)
-Automatic LF/SF detection
AK2301A monitors duration level automatically selects interface format. Period FS="H" More than 2clocks BCLK 1clock BCLK Frame type
Timing interface
16bit data accommodated flame (125µs) defined 8kHz frame sync signal. Although there 4time slot maximum 8kHz frame (when BCLK 512kHz), data AK2301A occupies first time slot.
<MS0300-E-00>
2004/3
AK2301A
Frame sync signal 8kHz reference signal. This signal indicated timing frame position 8kHz interface. internal clock generated based this signal. -Bit clock BCLK BCLK defines data rate. BCLK rate 256kHz 512kHz. This clock must synchronized with
Long Frame
BCLK
Don't care
Short Frame
Don't care
BCLK
Don't care
Don't care
Important notice!
Please don't stop feeding BCLK. Both BCLK used internal reference clock. does work when BCLK provided.
<MS0300-E-00>
2004/3
AK2301A
MUTE
output CODEC muted control. MUTEN MUTEN Operation Mute Normal High-Impedance data output CODEC analog ground CODEC analog output
pin] When MUTEN turns during data output, mute function becomes available next pin] When MUTEN turns "L", code converter becomes analog ground level.
<MS0300-E-00>
2004/3
AK2301A
RESET Start sequence
Reset operation starts input. This function used initialization power Please MUTEN together with RSTN avoid popping sound from output until AK2301A moves into stable operation. Start sequence After power please RSTN level 10msec more. Before first sequence less than 250µs after cancellation reset, please provide BCLK. Please MUTEN level during period AK2301A's initialization which less than 200msec after BCLK provided. CODEC voice path established releasing mute function.
less than250usec 10msec more 200msec more
RSTN BCLK MUTEN
0.9VDD
<MS0300-E-00>
2004/3
AK2301A
Universal op-amps
op-amps construction external filter. AMP1(2)I negative input AMP1(2)O output op-amp. Circuit example Please design output load become more. output load includes feedback resistor load. These op-amps assumed used 20kHz frequency LPF. please design gain become -12~6dB. following figure shows circuit example.
AMP1(2)I
AMP1(2)O
Load
Each parameter calculated shown below. cut-off frequency fcL[Hz] fcL=1/(2R2C2) Output load R2Z/( R2+Z) Gain A[dB] A=20log (R2/ cut-off frequency fcH[Hz] fcH=1/(2R1C1)
<MS0300-E-00>
2004/3
APPLICATION CIRCUIT EXAMPLES
AK2301A
Analog input circuit
20kohm 100pF
Analog output circuit
10kohm
VFTN VFTP
100pF 20kohm
10kohm load
40kohm
100pF
10kohm
40kohm
TAGND
10kohm load
Universal op-amps
20kohm
Power supply, loop filter capacitor analog ground stabillization capacitor
VREF
AMP1I
200pF
VREF
40kohm 10kohm load
AMP1O
PLLC
0.33uF 20kohm
AMP2I
200pF
40kohm 10kohm load
AMP2O
10uF 0.1uF
<MS0300-E-00>
2004/3
AK2301A
IMPORTANT NOTICE
These products their specifications subject change without notice. Before considering application, consult Asahi Kasei Microsystems Co., Ltd. (AKM) sales office authorized distributor concerning their current status. assumes liability infringement patent, intellectual property, other right application information contained herein. export these products, devices systems containing them, require export license other official approval under regulations country export pertaining customs tariffs, currency exchange, strategic materials. products neither intended authorized critical components safety, life support, other hazard related device system, assumes responsibility relating such use, except with express written consent Representative Director AKM. used here: hazard related device system designed intended life support maintenance safety applications medicine, aerospace, nuclear energy, other fields, which failure function perform reasonably expected result loss life significant injury damage person property. critical component whose failure function perform reasonably expected result, whether directly indirectly, loss safety effectiveness device system containing which must therefore meet very high standards performance reliability. responsibility buyer distributor product distributes, disposes otherwise places product with third party notify that party advance above content conditions, buyer distributor agrees assume responsibility liability hold harmless from claims arising
from said product absence such notification.
<MS0300-E-00>
2004/3

Other recent searches


XVB1LUG50D - XVB1LUG50D   XVB1LUG50D Datasheet
SOT89-3L - SOT89-3L   SOT89-3L Datasheet
SOT89R-3L - SOT89R-3L   SOT89R-3L Datasheet
SOT23 - SOT23   SOT23 Datasheet
Si7123DN - Si7123DN   Si7123DN Datasheet
NC7WZ08 - NC7WZ08   NC7WZ08 Datasheet
ICS333 - ICS333   ICS333 Datasheet
HM5216808C - HM5216808C   HM5216808C Datasheet
HM5216408C - HM5216408C   HM5216408C Datasheet
AN2233 - AN2233   AN2233 Datasheet

 

Privacy Policy | Disclaimer
© 2012 Datasheet Archive