Dual Independent Differential Power Applications from 120MHz CA30

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

Dual Independent Differential Power Applications from 120MHz CA30

Datasheet Thumbnail

Top Searches for this datasheet

CA3054
Dual Independent Differential Power Applications from 120MHz
CA3054 consists independent differential amplifiers with associated constant current transistors common monolithic substrate. transistors which comprise amplifiers general purpose devices which exhibit noise value excess 300MHz. These feature make CA3054 useful from 120MHz. Bias load resistors have been omitted provide maximum application flexibility. monolithic construction CA3054 provides close electrical thermal matching amplifiers. This feature makes these devices particularly useful dual channel applications where matched performance channels required.
Features
Differential Amplifiers Common Substrate Independently Accessible Inputs Outputs Maximum Input Offset Voltage ±5mV Temperature Range 85°C Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
Dual Sense Amplifiers Dual Schmitt Triggers Multifunction Combinations RF/Mixer/Oscillator; Converter/IF Amplifiers (Differential and/or Cascode) Product Detectors Doubly Balanced Modulators Demodulators
Ordering Information
PART NUMBER (BRAND) CA3054M96 (3054) CA3054MZ (CA3054MZ) CA3054MZ96 (CA3054MZ) TEMP. RANGE (°C) PACKAGE SOIC Tape Reel SOIC (Pb-free) PKG. DWG. M14.15 M14.15
Balanced Quadrature Detectors Cascade Limiters Synchronous Detectors Pairs Balanced Mixers Synthesizer Mixers Balanced (Push-Pull) Cascode Amplifiers
SOIC Tape M14.15 Reel (Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials 100% matte plate termination finish, which RoHS compliant compatible with both SnPb Pb-free soldering operations. Intersil Pb-free products classified Pb-free peak reflow temperatures that meet exceed Pb-free requirements IPC/JEDEC STD-020.
Pinout
CA3054 (SOIC) VIEW
SUBSTRATE
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 1-888-468-3774 Intersil (and design) trademark Intersil Americas Inc. Copyright Harri Corporation 1998. Copyright Intersil Americas Inc. 2004, 2005. Rights Reserved other trademarks mentioned property their respective owners.
CA3054
Absolute Maximum Ratings 25°C
Collector-to-Emitter Voltage, VCEO Collector-to-Base Voltage, VCBO Collector-to-Substrate Voltage, VCIO (Note Emitter-to-Base Voltage, VEBO Collector Current, 50mA
Thermal Information
Thermal Resistance (Typical, Note
(°C/W)
Operating Conditions
Temperature Range 85°C
SOIC Package Maximum Junction Temperature (Die) 175°C Maximum Junction Temperature (Plastic Package) 150°C Maximum Storage Temperature Range -65°C 150°C Maximum Lead Temperature (Soldering 10s) 300°C (Lead Tips Only) Maximum Power Dissipation (Any Transistor) 300mW
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTES: collector each transistor CA3054 isolated from substrate integral diode. substrate must connected voltage which more negative than collector voltage order maintain isolation between transistors provide normal transistor action. substrate should maintained signal (AC) ground means suitable grounding capacitor, avoid undesired coupling between transistors. measured with component mounted evaluation board free air.
Maximum Voltage Ratings
following chart gives range voltages which applied terminals listed vertically with respect terminals listed horizontally. example, voltage range vertical Terminal with respect Terminal +15V -5V. (NOTE TERM
Maximum Current Ratings
(NOTE TERM IOUT
Note
Note Note Note Note Note Note Note Note
Note +20, +20, Note Note Note +20, +20, Note Note Ref. Substrate
Note +15, Note Note Note Note Note
Note Note Note +20, Note Note Note Note Note +20, Note +20, Note Note Note Note Note Note +15, Note Note Note Note Note Note Note Note Note Note Note Note Note Note Note Note Note Note Note +20, Note
Note +15, Note
Note +15, Note
NOTES: Voltages normally applied between these terminals. Voltages appearing between these terminals will safe specified limits between other terminals exceeded. Terminal CA3054 used.
Electrical Specifications 25°C
PARAMETER CHARACTERISTICS SYMBOL TEST CONDITIONS UNIT Each Differential Amplifier C(Q1) C(Q5) C(Q2) C(Q6) IE(Q3) IE(Q4) IE(Q3) IE(Q4) IE(Q3) IE(Q4) IE(Q3) IE(Q4) 0.45 0.98 1.02
Input Offset Voltage (Figure Input Offset Current (Figure Input Bias Current (Figure Quiescent Operating Current Ratio (Figure Temperature Coefficient Magnitude Input Offset Voltage (Figure
IE(Q3) IE(Q4)
µV/°C
CA3054
Electrical Specifications 25°C (Continued)
PARAMETER EACH TRANSISTOR Forward Base-to-Emitter Voltage (Figure 50µA 10mA Temperature Coefficient Base-to-Emitter Voltage (Figure Collector Cutoff Current (Figure Collector-to-Emitter Breakdown Voltage Collector-to-Base Breakdown Voltage Collector-to-Substrate Breakdown Voltage Emitter-to-Base Breakdown Voltage DYNAMIC CHARACTERISTICS Common Mode Rejection Ratio each Amplifier (Figures Range, Stage (Figures Voltage Gain, Single Stage Double-Ended Output (Figures Range, Stage (Figures Voltage Gain, Stage Double-Ended Output (Figures Frequency, Small Signal Equivalent Circuit Characteristics (For Single Transistor) Forward Current Transfer Ratio (Figure Short Circuit Input Impedance (Figure Open Circuit Output Impedance (Figure Open Circuit Reverse Voltage Transfer Ratio (Figure Noise Figure Single Transistor Gain Bandwidth Product Single Transistor (Figure Admittance Characteristics; Differential Circuit Configuration (For Each Amplifier) Forward Transfer Admittance (Figure Input Admittance (Figure Output Admittance (Figure Reverse Transfer Admittance (Figure 1MHz Each Collector 1.25mA 1MHz Each Collector 1.25mA 1MHz Each Collector 1.25mA 1MHz Each Collector 1.25mA 0.22 j0.1 0.01 -0.003 1kHz, 1kHz, 1kHz, 1kHz, 1kHz, 15.6 10-4 3.25 CMRR 12V, -6V, -3.3V, 1kHz 12V, -6V, -3.3V, 1kHz 12V, -6V, -3.3V, 1kHz 12V, -6V, -3.3V, 1kHz 12V, -6V, -3.3V, 1kHz ICBO V(BR)CEO V(BR)CBO V(BR)CIO V(BR)EBO 0.630 0.715 0.750 0.800 -1.9 0.700 0.800 0.850 0.900 µV/°C SYMBOL TEST CONDITIONS UNIT
10V, 1mA, 10µA, 10µA, 10µA,
0.002
CA3054
Electrical Specifications 25°C (Continued)
PARAMETER Admittance Characteristics; Cascode Circuit Configuration (For Each Amplifier) Forward Transfer Admittance (Figure Input Admittance (Figure Output Admittance (Figure Reverse Transfer Admittance (Figure Noise Figure 1MHz Total Stage 1MHz Total Stage 1MHz Total Stage 1MHz Total Stage 100MHz 0.55 j0.02 0.004 j0.005 SYMBOL TEST CONDITIONS UNIT
Test Circuits
+12V +12V
0.3VRMS 10µF ICUT SIGNAL SOURCE 0.5k 0.5k
0.1µF 10mVRMS 10µF VOUT SIGNAL SOURCE
ICUT 0.5k
0.1µF
VOUT
0.1µF
+12V
0.1µF
+12V
FIGURE COMMON MODE REJECTION RATIO TEST SETUP
FIGURE SINGLE STAGE VOLTAGE GAIN TEST SETUP
1mVRMS 10µF SIGNAL SOURCE ICUT
+12V 0.5k
0.1µF
VOUT
0.1µF
0.5k
+12V
FIGURE STAGE VOLTAGE GAIN TEST SETUP
CA3054 Typical Performance Curves
COLLECTOR CUTOFF CURRENT (nA) 10-1 10-2 10-3 10-4 TEMPERATURE (°C) (NOTE) INPUT BIAS CURRENT (µA) 25°C
10.0
COLLECTOR CURRENT (mA)
NOTE: CA3054 data from 85°C only. FIGURE COLLECTOR-TO-BASE CUTOFF CURRENT TEMPERATURE EACH TRANSISTOR FIGURE INPUT BIAS CURRENT COLLECTOR CURRENT EACH TRANSISTOR
BASE-TO-EMITTER VOLTAGE
0.5mA OFFSET VOLTAGE (mV)
0.75 0.50 0.25 0.1mA 10mA
TEMPERATURE (°C) (NOTE)
TEMPERATURE (°C) (NOTE)
NOTE: CA3054 data from 85°C only. FIGURE BASE-TO-EMITTER VOLTAGE EACH TRANSISTOR TEMPERATURE
NOTE: CA3054 data from 85°C only. FIGURE OFFSET VOLTAGE TEMPERATURE DIFFERENTIAL PAIRS
BASE-TO-EMITTER VOLTAGE
INPUT OFFSET VOLTAGE (mV)
25°C
INPUT OFFSET CURRENT (µA)
25°C
|VBE1 VBE2| 0.01
EMITTER CURRENT (mA)
0.01 0.01
COLLECTOR CURRENT (mA)
FIGURE STATIC BASE-TO-EMITTER VOLTAGE INPUT OFFSET VOLTAGE DIFFERENTIAL PAIRS EMITTER CURRENT
FIGURE INPUT OFFSET CURRENT MATCHED DIFFERENTIAL PAIRS COLLECTOR CURRENT
CA3054 Typical Performance Curves
COMMON MODE REJECTION RATIO (dB) 1kHz SINGLE STAGE VOLTAGE GAIN (dB) BIAS VOLTAGE TERMINAL BIAS VOLTAGE TERMINAL
(Continued)
1kHz SIGNAL INPUT 10mVRMS
FIGURE COMMON MODE REJECTION RATIO CHARACTERISTIC
STAGE VOLTAGE GAIN (dB) 1kHz SIGNAL INPUT 1mVRMS
FIGURE SINGLE STAGE VOLTAGE GAIN CHARACTERISTIC
NORMALIZED PARAMETERS 1kHz 25°C 3.5k 1.88 10-4 15.6µS
0.01 COLLECTOR CURRENT (mA)
BIAS VOLTAGE TERMINALS
FIGURE STAGE VOLTAGE GAIN CHARACTERISTIC
FIGURE FORWARD CURRENT TRANSFER RATIO (hFE), SHORT CIRCUIT INPUT IMPEDANCE (hIE), OPEN CIRCUIT OUTPUT IMPEDANCE (hOE), OPEN CIRCUIT REVERSE VOLTAGE TRANSFER RATIO (hRE) COLLECTOR CURRENT EACH TRANSISTOR
FORWARD TRANSFER SUSCEPTANCE CONDUCTANCE (mS) DIFFERENTIAL CONFIGURATION (EACH TRANSISTOR) 1.25mA 25°C
GAIN BANDWIDTH PRODUCT (MHz)
1000
25°C
FREQUENCY (MHz)
COLLECTOR CURRENT (mA)
FIGURE GAIN BANDWIDTH PRODUCT (fT) COLLECTOR CURRENT
FIGURE FORWARD TRANSFER ADMITTANCE (Y21) FREQUENCY
CA3054 Typical Performance Curves
INPUT SUSCEPTANCE CONDUCTANCE (mS) DIFFERENTIAL CONFIGURATION (EACH TRANSISTOR) 1.25mA OUTPUT CONDUCTANCE (mS) 25°C FREQUENCY (MHz) FREQUENCY (MHz)
(Continued)
DIFFERENTIAL CONFIGURATION (EACH TRANSISTOR) 1.25mA 25°C OUTPUT SUSCEPTANCE (mS) OUTPUT SUSCEPTANCE (mS)
FIGURE INPUT ADMITTANCE (Y11)
FIGURE OUTPUT ADMITTANCE (Y22) FREQUENCY
REVERSE TRANSFER CONDUCTANCE (mS)
DIFFERENTIAL CONFIGURATION (EACH TRANSISTOR) 1.25mA 25°C
REVERSE TRANSFER SUSCEPTANCE (µS)
FORWARD TRANSFER CONDUCTANCE SUSCEPTANCE (mS)
1000
FREQUENCY (MHz) CASCODE CONFIGURATION (STAGE) 2.5mA 25°C
-g12
0.01
0.001
0.0001
FREQUENCY (MHz)
0.01 1000
FIGURE REVERSE TRANSFER ADMITTANCE (Y12) FREQUENCY
FIGURE FORWARD TRANSFER ADMITTANCE (Y21) FREQUENCY
OUTPUT CONDUCTANCE 10-4)
INPUT CONDUCTANCE SUSCEPTANCE (mS)
CASCODE CONFIGURATION (STAGE) 2.5mA 25°C
FREQUENCY (MHz) CASCODE CONFIGURATION (STAGE) 2.5mA 25°C
FREQUENCY (MHz)
FIGURE INPUT ADMITTANCE (Y11) FREQUENCY
FIGURE OUTPUT ADMITTANCE (Y22) FREQUENCY
CA3054 Typical Performance Curves
REVERSE TRANSFER CONDUCTANCE SUSCEPTANCE (µS) CASCODE CONFIGURATION (STAGE) 2.5mA 25°C
(Continued)
-b12
0.01
0.001
FREQUENCY (MHz)
FIGURE REVERSE TRANSFER ADMITTANCE (Y12) FREQUENCY
Intersil U.S. products manufactured, assembled tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications viewed www.intersil.com/design/quality
Intersil products sold description only. Intersil Corporation reserves right make changes circuit design, software and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
information regarding Intersil Corporation products, www.intersil.com

Dual Independent Differential Power Applications from 120MHz CA30

Top Searches for this datasheet

Other recent searches