750kHz 800MHz Phase Noise VCXO (for 25MHz Crystals) 750kHz 800MHz

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750kHz 800MHz Phase Noise VCXO (for 25MHz Crystals) 750kHz 800MHz

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PLL502-30
750kHz 800MHz Phase Noise VCXO (for 25MHz Crystals)
750kHz 800MHz output range. phase noise output 10kHz frequency offset, -142dBc/Hz 19.44MHz, -125dBc/Hz 155.52MHz, -115dBc/Hz 622.08MHz). Selectable CMOS, PECL LVDS output. Selectable High Drive Standard CMOS. 25MHz crystal input. external load capacitor varicap required. Output Enable selector. Wide pull range (+/-200ppm) 3.3V operation. Available mil).
CONFIGURATION
OUTSEL0^
OUTSEL1^
SEL0^
SEL1^
(1550,1475)
GNDBUF CMOS LVDSB PECLB VDDBUF VDDBUF PECL LVDS OE_SEL^
XOUT SEL3^
A0505-18
SEL2^
OE_CTRL VCON
DESCRIPTION
PLL502-30 monolithic jitter phase noise (-142dBc/Hz 10kHz offset) VCXO Die, with CMOS, LVDS PECL output, covering 750kHz 800MHz output range. allows control output frequency with input voltage (VCON), using cost crystal. same used VCXO with output frequencies ranging from thanks frequency selector pads. This makes PLL502-30 ideal universal applications ranging from ADSL SONET.
C502A
(0,0)
Note: denotes internal pull
OUTPUT SELECTION ENABLE
OUTSEL1 (Pad #18) OUTSEL0 (Pad #25)
OE_CTRL (Pad #30)
Selected Output High Drive CMOS Standard CMOS PECL LVDS
State
SPECIFICATIONS
Name Size Reverse side dimensions Thickness Value micron micron
OE_SELECT (Pad
BLOCK DIAGRAM
Divider Charge Pump Loop Filter
(Default)
(Default) (Default)
Output enabled Tri-state Tri-state Output enabled
Bond "0", bond
#30: Logical states defined PECL levels OE_SELECT Logical states defined CMOS levels OE_SELECT
CLKBAR
Reference Divider XTAL VARICAP
Phase Detector
XOUT
VCON
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 01/20/06 Page
GNDBUF
PLL502-30
750kHz 800MHz Phase Noise VCXO (for 25MHz Crystals)
FREQUENCY SELECTION TABLE
SEL3 (Pad #28) SEL2 (Pad #29) SEL1 (Pad #19) SEL0 (Pad #20) Selected Multiplier
Reserved Reserved Reserved Reserved Reserved Reserved multiplication
pads have internal pull-ups (default value Bond
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings PARAMETERS
Supply Voltage Input Voltage, Output Voltage, Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) Protection, Human Body Model
SYMBOL
MIN.
-0.5 -0.5
MAX.
+0.5 +0.5
UNITS
Exposure device under conditions beyond limits specified Maximum Ratings extended periods cause permanent damage device affect product reliability. These conditions represent stress rating only, functional operations device these other conditions above operational limits noted this specification implied. Note: Operating Temperature guaranteed design parts (COMMERCIAL INDUSTRIAL), tested COMMERCIAL grade only.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 01/20/06 Page
PLL502-30
750kHz 800MHz Phase Noise VCXO (for 25MHz Crystals)
Crystal Specifications PARAMETERS
Crystal Resonator Frequency Crystal Loading Rating Crystal Pullability Recommended
SYMBOL
(xtal) (xtal)
CONDITIONS
Parallel Fundamental Mode VCON 1.65V
MIN.
TYP.
MAX.
UNITS
Note: Crystal Loading rating: 9.5pF loading crystal sees from VCXO chip VCON 1.65V. assumed that crystal will nominal frequency this load. crystal requires more load nominal frequency, additional load must added externally. This however reduce pull range.
Voltage Control Crystal Oscillator PARAMETERS
VCXO Stabilization Time VCXO Tuning Range output pullability VCXO Tuning Characteristic Pull range linearity VCON input impedance VCON modulation
SYMBOL
VCXOSTB
CONDITIONS
From power valid 25MHz; XTAL VCON 3.3V VCON=1.65V, ±1.65V
MIN.
TYP.
MAX.
UNITS
ppm/V
±200 2000
VCON 3.3V, -3dB
Note: Parameters denoted with asterisk represent nominal characterization data production tested specific limits.
General Electrical Specifications PARAMETERS
Supply Current, Dynamic (with Loaded Outputs) Operating Voltage Output Clock Duty Cycle Short Circuit Current
SYMBOL
CONDITIONS
PECL/LVDS/CMOS Fout<24MHz 24MHz<Fout<96MHz 96MHz<Fout<700MHz
MIN.
TYP.
MAX.
60/28/15 65/45/30 100/80/40 3.63
UNITS
(CMOS) 1.25V (LVDS) 1.3V (PECL)
2.97
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 01/20/06 Page
PLL502-30
750kHz 800MHz Phase Noise VCXO (for 25MHz Crystals)
Jitter Specifications PARAMETERS CONDITIONS
With capacitive decoupling between GND. Over 10,000 cycles.
FREQUENCY
19.44MHz 77.76MHz 155.52MHz 622.08MHz 19.44MHz 77.76MHz 155.52MHz 622.08MHz 155.52MHz 622.08MHz
MIN.
TYP.
MAX.
UNITS
Period jitter
Period jitter Peak-toPeak
With capacitive decoupling between GND. Over 10,000 cycles. Integrated
Integrated jitter
Phase Noise Specifications PARAMETERS
Phase Noise relative carrier (typical)
FREQUENCY
19.44MHz 77.76MHz 155.52MHz 622.08MHz
@10Hz
@100Hz
-108 -103
@1kHz
-132 -122 -120 -109
@10kHz
-142 -130 -125 -115
@100kHz
-150 -125 -121 -110
UNITS
dBc/Hz
Note: Phase Noise measured VCON
CMOS Electrical Characteristics PARAMETERS
Output drive current (High Drive) Output drive current (Standard Drive) Output Clock Rise/Fall Time (Standard Drive) Output Clock Rise/Fall Time (High Drive)
SYMBOL
CONDITIONS
-0.4V, =3.3V 0.4V, 3.3V -0.4V, =3.3V 0.4V, 3.3V 0.3V 3.0V with load 0.3V 3.0V with load
MIN.
TYP.
MAX.
UNITS
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 01/20/06 Page
PLL502-30
750kHz 800MHz Phase Noise VCXO (for 25MHz Crystals)
LVDS Electrical Characteristics PARAMETERS
Output Differential Voltage Magnitude Change Output High Voltage Output Voltage Offset Voltage Offset Magnitude Change Power-off Leakage Output Short Circuit Current
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
(see figure)
1.125 -5.7
1.375
LVDS Switching Characteristics PARAMETERS
Differential Clock Rise Time Differential Clock Fall Time
LVDS Levels Test Circuit
SYMBOL
CONDITIONS
(see figure)
MIN.
TYP.
MAX.
UNITS
LVDS Switching Test Circuit
10pF
VDIFF
10pF
LVDS Transistion Time Waveform
(Differential)
VDIFF
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 01/20/06 Page
PLL502-30
750kHz 800MHz Phase Noise VCXO (for 25MHz Crystals)
PECL Electrical Characteristics PARAMETERS
Output High Voltage Output Voltage
SYMBOL
CONDITIONS
(see figure)
MIN.
1.025
MAX.
1.620
UNITS
PECL Switching Characteristics PARAMETERS
Clock Rise Time Clock Fall Time
SYMBOL
CONDITIONS
@20/80% PECL @80/20% PECL
MIN.
TYP.
MAX.
UNITS
PECL Levels Test Circuit
PECL Output Skew
2.0V
tSKEW
PECL Transistion Time Waveform
DUTY CYCLE
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 01/20/06 Page
PLL502-30
750kHz 800MHz Phase Noise VCXO (for 25MHz Crystals)
ASSIGNMENT
Name GNDBUF OE_SELECT LVDS PECL VDDBUF VDDBUF PECLB LVDSB CMOS GNDBUF OUTSEL1 SEL1 SEL0 OUTSEL0 XOUT SEL3 SEL2 OE_CTRL VCON (µm) 1042 1171 1400 1400 1400 1400 1400 1400 1400 1400 1389 1232 1042 (µm) 1089 1227 1365 1365 1365 1365 1365 1365 1365 1365 1365 1223 1017 Ground. Ground. Ground. Ground. Ground. Connection. Ground. Ground, buffer circuitry. Used select between PECL CMOS logic states Internal pull LVDS Output. PECL Output. 3.3V power supply, Buffer circuitry. 3.3V power supply, Buffer circuitry. Complementary PECL Output. Complementary LVDS Output. CMOS Output. Ground, buffer circuitry. Used select CMOS, PECL LVDS output type. Internal pull Used select multiplication factor. Internal pull Used select multiplication factor. Internal pull 3.3V power supply. 3.3V power supply. 3.3V power supply. 3.3V power supply. Used select CMOS, PECL LVDS output type. Internal pull Crystal input. crystal specification page Crystal output. crystal specification page Used select multiplication factor. Internal pull Used select multiplication factor. Internal pull Used enable/disable output(s). Output Selection Enable table page Voltage Control Input. 3.3V. Description
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 01/20/06 Page
PLL502-30
750kHz 800MHz Phase Noise VCXO (for 25MHz Crystals)
ORDERING INFORMATION
part ordering, please contact Sales Department:
47745 Fremont Blvd., Fremont, 94538, Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
order number this device combination following: Device number, Package type Operating temperature range
PLL502-30
PART NUMBER TEMPERATURE C=COMMERCIAL I=INDUSTRAL PACKAGE TYPE D=DIE
Order Number PLL502-30DC
Marking P502-30DC
Package Option (Waffle Pack)
PhaseLink Corporation, reserves right make changes products specifications, both time without notice. information furnished Phaselink believed accurate reliable. However, PhaseLink makes guarantee warranty concerning accuracy said information shall responsible loss damage whatever nature resulting from reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products authorized critical components life support devices systems without express written approval President PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 01/20/06 Page

750kHz 800MHz Phase Noise VCXO (for 25MHz Crystals) 750kHz 800MHz

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