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PCF2116 family (PCF2114X; PCF2116X) controller/drivers Product sp


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PCF2116 family (PCF2114X; PCF2116X) controller/drivers
Product specification Supersedes data October 1994 File under Integrated Circuits, IC12 1996
Philips Semiconductors
Product specification
controller/drivers
FEATURES Single chip controller/driver 2-line display characters line, lines characters line character format plus cursor; kana (Japanese syllabary) user defined symbols On-chip: generation supply voltage (external supply also possible) generation intermediate bias voltages oscillator requires external components (external clock also possible) Display data RAM: characters Character generator ROM: characters Character generator RAM: characters 8-bit parallel 2-wire I2C-bus interface CMOS/TTL compatible row, column outputs rates Uses common code instruction Logic supply voltage range, VSS: Display supply voltage range, VLCD: power consumption. APPLICATIONS Telecom equipment Portable instruments Point sale terminals. GENERAL DESCRIPTION PCF2116 family controller/drivers consists similar members: PCF2116X PCF2114X, later referred PCF2116. specific differences expressed separate paragraphs PCF2116X PCF2114X respectively. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME PCF2114XU/2116XU PCF2116KH/KHZ LQFP128 FFC116 DESCRIPTION
PCF2116 family (PCF2114X; PCF2116X)
letter PCF2116X PCF2114X specifies character character generator (CGROM). different character sets currently available specified letters (see Figs 11). PCF2116A characterises built-in standard character set. Other character sets available request. PCF2116 low-power CMOS controller driver, designed drive split screen matrix display lines characters lines characters with format. necessary functions display provided single chip, including on-chip generation bias voltages, resulting minimum external components lower system power consumption. chip contains character generator displays alphanumeric kana characters. PCF2116 interfaces most microcontrollers 8-bit 2-wire I2C-bus. PCF2116K differs from existing PCF2116 family only VLCD/VOP generation section. Packages PCF2116XU/10; chip PCF2114XU/10; chip PCF2116XU/12; chip with bumps PCF2114XU/12; chip with bumps PCF2116K; LQFP128 grid array PGA144 (samples only). further details Chapters "Bonding locations" "Package outline".
VERSION SOT425-1
plastic profile quad flat package; leads; body
1996
Philips Semiconductors
Product specification
controller/drivers
BLOCK DIAGRAM
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth
BIAS VOLTAGE GENERATOR COLUMN DRIVERS
128, DRIVERS SHIFT REGISTER 32-BIT
DATA LATCHES
GENERATOR
SHIFT REGISTER 12-bit
PCF2116
CURSOR DATA CONTROL CHARACTER GENERATOR (CGRAM) CHARACTERS CHARACTER GENERATOR (CGROM) CHARACTERS
104,
109,
OSCILLATOR
DISPLAY DATA (DDRAM) CHARACTERS ADDRESS COUNTER (AC) INSTRUCTION DECODER DATA REGISTER (DR) BUSY FLAG INSTRUCTION REGISTER (IR) BUFFER 105, 103,
TIMING GENERATOR
DISPLAY ADDRESS COUNTER
POWER RESET
MGA797
Fig.1 Block diagram.
1996
Philips Semiconductors
Product specification
controller/drivers
PINNING SYMBOL n.c. n.c. n.c. n.c. VLCD1 VLCD2 VLCD3 n.c. VDD2 VDD1 VSS1 VSS2 n.c. LQFP128 driver output connected driver output
PCF2116 family (PCF2114X; PCF2116X)
DESCRIPTION
column driver outputs connected column driver outputs connected column driver output driver outputs driver outputs connected bidirectional data I2C-bus serial clock input bidirectional data I2C-bus serial data input/output bidirectional data control input VLCD supply voltage bidirectional data supply voltage bidirectional data supply voltage bidirectional data connected oscillator/external clock input bidirectional data supply voltage bidirectional data supply voltage I2C-bus address data clock ground (logic) read/write test (connect VSS) ground (logic) register select connected driver outputs driver outputs
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
VDD1
n.c. n.c.
n.c. n.c. n.c. VLCD3 VLCD2 VLCD1 n.c. n.c. n.c. n.c.
MBD451
n.c.
handbook, full pagewidth
PCF2116
n.c. n.c.
Fig.2 configuration.
1996
VDD2
VSS1
VSS2
Philips Semiconductors
Product specification
controller/drivers
FUNCTIONS register select(1) selects register accessed read write. logic selects instruction register write busy flag address counter read. logic selects data register both read write. There internal pull-up R/W: read/write(1) selects either read (R/W logic write (R/W logic operation. There internal pull-up this pin. data clock(1) HIGH signal start read write operation. Data clocked chip negative edge clock. DB7: data bus(1) bidirectional, 3-state data transfers data between system controller PCF2116. used busy flag, signalling that internal operations completed. 4-bit operations higher order lines used; must left open circuit. There internal pull-up each data lines. C60: column driver outputs These pins output data pairs columns. This arrangement permits optimized layout 4-line characters. R32: driver outputs These pins output select waveforms left right halves display. VLCD: power supply Negative power supply liquid crystal display. This generated on-chip supplied externally. VLCD control input input level this determines generated VLCD output voltage.
When I2C-bus used, parallel interface must defined: logic I2C-bus read mode must left open circuit.
PCF2116 family (PCF2114X; PCF2116X)
OSC: oscillator When on-chip oscillator used this must connected VDD. external clock signal, used, input this pin. SCL: serial clock line Input I2C-bus clock signal. SDA: serial data line Input/output I2C-bus data line. SAO: address hardware sub-address line used program device sub-address different PCF2116s same I2C-bus. test Must connected VSS. user accessible. BLOCK DIAGRAM FUNCTIONS supply voltage generator on-chip voltage generator controlled function command high-impedance input draws current from system power supply. range between When connected generator switched external voltage must supplied VLCD. This more negative than VSS. When logic generator produces negative voltage VLCD, controlled input voltage operating voltage given relationship: 1.8VDD Where: VLCD VLCD (0.8VDD) When logic generated output voltage VLCD equal (between VDD). this instance: When VLCD generated on-chip VLCD should decoupled with suitable capacitor. must selected limit maximum value Figure shows control characteristics generator.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116K version, connected through on-chip resistor (R0) VLCD. Resistor nominal value draws typical current from constant voltage (equal 1.34VDD) always present across voltage range between (see Fig.4). When connected generator switched external voltage must supplied VLCD. This more negative than VSS. When logic generator produces negative voltage VLCD, controlled input voltage operating voltage given relationship: 2.34VDD Where: VLCD VLCD (1.34VDD). When logic generated output voltage VLCD equal (between VDD). this instance: Character generator (CGROM) standard character available PCF2116K. bias voltage generator intermediate bias voltages display also generated on-chip. This removes need external resistive bias chain significantly reduces system power consumption. optimum levels depend multiplex rate selected automatically when number lines display defined. optimum value depends multiplex rate, threshold voltage (Vth) number bias levels given relationships Table Using 5-level bias scheme rate allows most liquids. effect display contrast negligible. Table Optimum values RATE NUMBER BIAS LEVELS VOP/Vth 3.67 5.19 Registers Oscillator
PCF2116 family (PCF2114X; PCF2116X)
on-chip oscillator provides clock signal display system. external components required must connected VDD. External clock external clock used this input pin. resulting display frame frequency given fframe fosc /2304. clock signal must always present, otherwise frozen state. Power-on reset power-on reset block initializes chip after power-on power failure.
PCF2116 8-bit registers, Instruction Register (IR) Data Register (DR). Register Select signal (RS) determines which register will accessed. instruction register stores instruction codes such display clear cursor shift, address information Display Data (DDRAM) Character Generator (CGRAM). instruction register written from read system controller. data register temporarily stores data read from DDRAM CGRAM. When reading, data from DDRAM CGRAM corresponding address address counter written data register prior being read read data instruction. Busy flag busy flag indicates internal status PCF2116, logic indicating that chip busy further instructions will accepted. busy flag output when logic logic Instructions should only written after checking that busy flag logic waiting required number clock cycles.
DISCRIMINATION Von/Voff 1.277 1.196
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
VOP(max)
VOP(min)
MGA798
High-voltage mode 1.8VDD
MGA799
Buffer mode
Fig.3 function control characteristics.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
VOP(min) 1.34
MBH667
High-voltage mode 2.34VDD
MGA799
Buffer mode
Fig.4 function control characteristics (PCF2116K).
1996
Philips Semiconductors
Product specification
controller/drivers
Address counter (AC) address counter assigns addresses DDRAM CGRAM reading writing commands `Set CGRAM Address' `Set DDRAM Address'. After read/write operation address counter automatically incremented decremented address counter contents output (DB0 DB6) when logic logic Display data (DDRAM) display data stores characters display data represented 8-bit character codes. locations used storing display data used general purpose RAM. basic display addressing scheme shown Fig.5. With display shift characters represented codes first locations starting address line displayed. Subsequent lines display data starting addresses 60H. Figs show DDRAM display mapping principle when display shifted. address range 1-line display 2-line display from (line (line 4-line display from lines respectively. 4-line displays address line start address next line consecutive. When display shifted each line wraps around independently others (Figs When data written into DDRAM wrap-around occurs from 1-line mode from 2-line mode; from 4-line mode. Character generator (CGROM) character generator generates character patterns format from 8-bit character codes. Figures show character sets currently available.
PCF2116 family (PCF2114X; PCF2116X)
Character generator (CGRAM) user-defined characters stored character generator RAM. CGROM CGRAM common address space, which first column reserved CGRAM (see Fig.8). Figure shows addressing principle CGRAM. Cursor control circuit cursor control circuit generates cursor (underline and/or character blink shown Fig.13) DDRAM address contained address counter. When address counter contains CGRAM address cursor will inhibited. Timing generator timing generator produces various signals required drive internal circuitry. Internal chip operation disturbed operations data buses. column drivers PCF2116 contains column drivers, which connect appropriate bias voltages sequence display, accordance with data displayed. bias voltages timing selected automatically when number lines display selected. Figures show typical waveforms. 1-line mode outputs driven pairs: R1/R17, R2/R18 example. This allows output pairs connected parallel, providing greater drive capability. Unused outputs should left unconnected.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
Display handbook, columns Position (decimal)
non-displayed DDRAM addresses
DDRAM Address (hex)
1-line display non-displayed DDRAM address
DDRAM Address (hex)
line
MLA792
line
2-line display
handbook, columns
non-displayed DDRAM addresses line
line
DDRAM Address (hex)
line
line
line display
MLA793
Fig.5 DDRAM display mapping; shift (PCF2116X).
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
Display Position (decimal) DDRAM Address (hex)
Display Position (decimal) DDRAM Address (hex)
line
1-line display
1-line display
line
DDRAM Address (hex)
MLA802
line
DDRAM Address (hex)
MLA815
line
2-line display
2-line display
line
line
line DDRAM Address (hex)
line
DDRAM Address (hex)
line
line
line
line
MLA816
4-line display
MLA803
4-line display
Fig.6
DDRAM display mapping; right shift (PCF2116X).
Fig.7
DDRAM display mapping; left shift (PCF2116X).
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth upper
lower bits xxxx
bits
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
xxxx
0001
xxxx
0010
xxxx
0011
xxxx
0100
xxxx
0101
xxxx
0110
xxxx
0111
xxxx
1000
xxxx
1001
xxxx
1010
xxxx
1011
xxxx
1100
xxxx
1101
xxxx
1110
xxxx
1111
MLB245
Fig.8 Character CGROM; PCF2116A; PCF2114A.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth upper
lower bits xxxx
bits
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
xxxx
0001
xxxx
0010
xxxx
0011
xxxx
0100
xxxx
0101
xxxx
0110
xxxx
0111
xxxx
1000
xxxx
1001
xxxx
1010
xxxx
1011
xxxx
1100
xxxx
1101
xxxx
1110
xxxx
1111
MLB895
Fig.9 Character CGROM; PCF2116C; PCF2114C.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth upper
lower bits xxxx
bits
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
xxxx
0001
xxxx
0010
xxxx
0011
xxxx
0100
xxxx
0101
xxxx
0110
xxxx
0111
xxxx
1000
xxxx
1001
xxxx
1010
xxxx
1011
xxxx
1100
xxxx
1101
xxxx
1110
xxxx
1111
MLB896
Fig.10 Character CGROM; PCF2116G; PCF2114G.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth upper
lower bits xxxx
bits
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
xxxx
0001
xxxx
0010
xxxx
0011
xxxx
0100
xxxx
0101
xxxx
0110
xxxx
0111
xxxx
1000
xxxx
1001
xxxx
1010
xxxx
1011
xxxx
1100
xxxx
1101
xxxx
1110
xxxx
1111
MLB968
Fig.11 Character CGROM; PCF2116J; PCF2114J.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth
character codes (DDRAM data) lower order bits
CGRAM address lower order bits higher order bits
character patterns (CGRAM data)
higher order bits
higher order bits
lower order bits character pattern example character pattern example cursor position
MGA800
Character code bits correspond CGRAM address bits CGRAM address bits designate character pattern line position. line cursor position display performed logical with cursor. Data line will appear cursor position. Character pattern column positions correspond CGRAM data bits shown Fig.12 (bit being left end). shown Figs CGRAM character patterns selected when character code bits logic CGRAM data logic corresponds selection display. Only bits CGRAM address `Set CGRAM Address' command. using `Set DDRAM Address' command using auto-increment feature during CGRAM write. bits read using `Read Address' command.
Fig.12 Relationship between CGRAM addresses data display patterns.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
cursor character font alternating display
MGA801
cursor display example
blink display example
Fig.13 Cursor blink display examples.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth
frame
frame
state (ON) state (ON)
1-line display (1:16)
state
0.25 0.25
state
0.25 0.25
MGA802
Fig.14 Typical waveforms; 1-line mode.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth
frame
frame
state (ON) state (ON)
2-line display (1:32)
state
0.15 0.15
state
0.15 0.15
MGA803
Fig.15 Typical waveforms; 2-line mode.
1996
Philips Semiconductors
Product specification
controller/drivers
Programming displays with PCF2114X PCF2114 used 1-line mode drive 2-line display characters with rate resulting better contrast. internal data flow chip optimized this purpose.
PCF2116 family (PCF2114X; PCF2116X)
With Function instruction Figures show DDRAM addresses display characters. second each table corresponds either right half 1-line display second line 2-line display. Wrap around data during display shift when writing data non-standard.
handbook, full pagewidth
display position DDRAM address
display position DDRAM address
MLB899
Fig.16 DDRAM display mapping; shift (PCF2114X).
handbook, full pagewidth
display position DDRAM address
display position DDRAM address
MLB900
Fig.17 DDRAM display mapping; right shift (PCF2114X).
handbook, full pagewidth
display position DDRAM address
display position DDRAM address
MLB901
Fig.18 DDRAM display mapping; left shift (PCF2114X).
1996
Philips Semiconductors
Product specification
controller/drivers
Programming displays with PCF2114X drive 2-line characters display, instruction Function Note that right half display needs mirrored column connection compared display driven PCF2116X. drive 4-line characters display PCF2116 operating instructions apply. There functional difference between chips this mode. such application with Function instruction. Reset function PCF2116 automatically initializes (resets) when power turned After reset chip following state. Table STEP display clear function 8-bit interface 1-line display voltage generator; VLCD display cursor blink (increment) shift State after reset DESCRIPTION INSTRUCTIONS
PCF2116 family (PCF2114X; PCF2116X)
Only PCF2116 registers, Instruction Register (IR) Data Register (DR) directly controlled MPU. Before internal operation, control information stored temporarily these registers allow interface various types MPUs which operate different speeds allow interface peripheral control ICs. PCF2116 operation controlled instructions shown Table together with their execution time. Details explained subsequent sections. Instructions categories, those that: Designate PCF2116 functions such display format, data length, etc. internal addresses Perform data transfer with internal Others. normal use, category instructions used most frequently. However, automatic incrementing decrementing internal addresses after each data write lessens program load. display shift particular performed concurrently with display data write, enabling designer develop systems minimum time with maximum programming efficiency. During internal operation, instruction other than busy flag/address read instruction will executed. Because busy flag logic while instruction being executed, check make sure logic before sending next instruction wait maximum instruction execution time, given Table instruction sent while busy flag HIGH will executed.
display on/off control
entry mode
Default address pointer DDRAM. busy flag (BF) indicates busy state logic until initialization ends. busy state lasts chip also initialized software. Figs I2C-bus interface reset
1996
Table DESCRIPTION operation. Clears entire display sets DDRAM address address counter. Sets DDRAM address address counter. Also returns shifted display original position. DDRAM contents remain unchanged. Sets cursor move direction specifies shift display. These operations performed during data write read. Sets entire display on/off (D), cursor on/off blink cursor position character (B). Moves cursor shifts display without changing DDRAM contents. Sets interface data length (DL), number display lines voltage generator control (G). Sets CGRAM address. Sets DDRAM address. Reads busy flag (BF) indicating internal operation being performed reads address counter contents. Reads data from CGRAM DDRAM. Writes data CGRAM DDRAM. REQUIRED CLOCK CYCLES(2)
Instructions (note
1996
INSTRUCTION
Philips Semiconductors
Clear display
Return Home
controller/drivers
Entry mode
Display control
Cursor/display shift
Function
read data write data
CGRAM address
DDRAM address
Read Busy Flag Address Counter
Read data
Write data
Notes
I2C-bus mode don't care. 8-bit mode assumed.
I2C-bus mode control byte required when changed; control byte: R/W, command byte: DB0.
PCF2116 family (PCF2114X; PCF2116X)
Product specification
Example: fosc kHz, 6.67 cycles cycles
Philips Semiconductors
Product specification
controller/drivers
Table Command identities PCF2116 PCF2114 line characters; line characters; reserved internal operation last control byte, only data bytes follow decrement display freeze display cursor character cursor position does blink cursor move left shift bits voltage generator: VLCD
PCF2116 family (PCF2114X; PCF2116X)
increment display shift display cursor character cursor position blinks display shift right shift bits voltage generator; VLCD 0.8VDD lines characters; lines characters; lines characters; internal operation progress next bytes data byte another control byte
instruction write
busy flag address counter read
data register read
MGA804
Fig.19 4-bit transfer example.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
internal
internal operation
busy
busy
instruction write
busy flag check
busy flag check
instruction write
MGA805
IR7, IR3: instruction bit, bit. AC3: address counter bit.
Fig.20 example 4-bit data transfer timing sequence.
internal
internal operation
data instruction write
busy busy flag check
busy busy flag check
busy busy flag check
data instruction write
MGA806
Fig.21 Example busy flag check timing sequence.
1996
Philips Semiconductors
Product specification
controller/drivers
Clear display Clear Display writes space code (hexadecimal) into DDRAM addresses (The character pattern character code must blank pattern). Sets DDRAM address counter logic Returns display original position shifted. Thus, display disappears cursor blink position goes left edge display (the first line lines displayed). Sets entry mode logic (increment mode). entry mode does change. instruction Clear Display requires extra execution time. This allowed checking busy-flag (BF) waiting until elapsed. latter must applied where read-back options foreseen, some chip-on-glass (COG) applications. Return Home Return Home sets DDRAM address counter logic Returns display original position shifted. DDRAM contents change. cursor blink position goes left display (the first line lines displayed). entry mode change. Entry mode When logic DDRAM CGRAM address increments (decrements) when data written into read from DDRAM CGRAM. cursor blink position moves right when incremented left when decremented. cursor blink inhibited when CGRAM accessed. When logic entire display shifts either right (I/D logic left (I/D logic during DDRAM write. Thus looks cursor stands still display moves. display does shift when reading from DDRAM, when writing into reading CGRAM. When logic display does shift. Display on/off control display when logic when logic Display data DDRAM affected displayed immediately setting logic
PCF2116 family (PCF2114X; PCF2116X)
cursor displayed when logic inhibited when logic Even cursor disappears, display functions I/D, etc. remain operation during display data write. cursor displayed using dots line (see Fig.13). character indicated cursor blinks when logic blink displayed switching between display characters dots with period second when fosc (Fig.13). other clock frequencies blink period equal kHz/fosc. cursor blink display simultaneously. Cursor display shift Cursor Display Shift moves cursor position display right left without writing reading display data. This function used correct character move cursor through display. 4-line displays, cursor moves next line when passes last position decimal) line. When displayed data shifted repeatedly lines shift same time; displayed characters shift into next line. address counter (AC) content does change only action performed shift display, increments decrements with cursor shift. Function (PARALLEL MODE ONLY) Sets interface data width. Data sent received bytes (DB7 DB0) when logic nibbles (DB7 DB4) when logic When 4-bit width selected, data transmitted cycles using parallel bus(1). Function from I2C-interface: from I2C-bus interface. been parallel bus, programming I2C-bus interface complicated. Sets number display lines.
4-bit application left open (internal pull-ups). Hence first function instruction after power-on second function must then sent nibbles) their required values.
1996
Philips Semiconductors
Product specification
controller/drivers
Controls VLCD voltage generator characteristic. CGRAM address CGRAM Address sets CGRAM address into address counter (binary A5A4A3A2A1A0). Data then written read from CGRAM. Only bits CGRAM address CGRAM address command. using DDRAM address command using auto-increment feature during CGRAM write. bits read using read address command. DDRAM address DDRAM Address sets DDRAM address into address counter (binary A6A5A4A3 A2A1A0). Data then written read from DDRAM. Hexadecimal address ranges. ADDRESS Read busy flag address Read Busy Flag Address reads busy flag (BF). logic indicates that internal operation progress. next instruction will executed Check status before sending next instruction. same time, value address counter expressed binary read out. address counter used both CGRAM DDRAM, value determined previous instruction. Write data CGRAM DDRAM Writes binary 8-bit data CGRAM DDRAM. Whether CGRAM DDRAM written into determined previous specification CGRAM DDRAM address setting. FUNCTION 1-line 2116 2-line 2114 2-line 2114/2116 4-line 2114/2116
PCF2116 family (PCF2114X; PCF2116X)
After writing, address automatically increments decrements accordance with entry mode. Only bits CGRAM data valid, bits `don't care'. Read data from CGRAM DDRAM Reads binary 8-bit data from CGRAM DDRAM. most recent Address command determines whether CGRAM DDRAM read. Read Data instruction gates content data register (DR) while HIGH. After goes again, internal operation increments decrements) stores data corresponding into Remark: only three instructions that update data register (DR) are: CGRAM Address DDRAM Address Read Data from CGRAM DDRAM. Other instructions (e.g. Write Data, Cursor/Display shift, Clear Display, Return Home) will modify data register content. INTERFACE (PARALLEL INTERFACE) PCF2116 send data either 4-bit operations 8-bit operation thus interface 4-bit 8-bit microcontrollers. 8-bit mode data transferred 8-bit bytes using data lines DB7. Three further control lines required. 4-bit mode data transferred cycles 4-bits each. higher order bits (corresponding 8-bit mode) sent first cycle lower order bits (DB0 8-bit mode) second. Data transfer complete after 4-bit data transfers. should noted that cycles also required busy flag check. 4-bit operation selected instruction. Figs examples protocol. 4-bit mode pins must left open-circuit. They pulled internally.
1996
Philips Semiconductors
Product specification
controller/drivers
INTERFACE MPU: I2C-BUS INTERFACE Characteristics I2C-bus I2C-bus bidirectional, two-line communication between different modules. lines serial data line (SDA) serial clock line (SCL). Both lines must connected positive supply pull-up resistor. Data transfer initiated only when busy. transfer data transferred during each clock pulse. data line must remain stable during HIGH period clock pulse changes data line this time will interpreted control signal. START STOP conditions Both data clock lines remain HIGH when busy. HIGH-to-LOW transition data line, while clock HIGH defined START condition (S). LOW-to-HIGH transition data line while clock HIGH defined STOP condition (P). System configuration device generating message `transmitter', device receiving message `receiver'. device that controls message `master' devices which controlled master `slaves'. Acknowledge
PCF2116 family (PCF2114X; PCF2116X)
number data bytes transferred between START STOP conditions from transmitter receiver unlimited. Each byte eight bits followed acknowledge bit. acknowledge HIGH level signal transmitter during which time master generates extra acknowledge related clock pulse. slave receiver which addressed must generate acknowledge after reception each byte. Also master receiver must generate acknowledge after reception each byte that been clocked slave transmitter. device that acknowledges must pull-down line during acknowledge clock pulse, that line stable during HIGH period acknowledge related clock pulse (set-up hold times must taken into consideration). master receiver must signal data transmitter generating acknowledge last byte that been clocked slave. this event transmitter must leave data line HIGH enable master generate STOP condition. I2C-bus protocol Before data transmitted I2C-bus, device which should respond addressed first. addressing always carried with first byte transmitted after start procedure. I2C-bus configuration different PCF2116 READ WRITE cycles shown Figs
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
data line stable; data valid change data allowed
MBC621
Fig.22 transfer.
START condition STOP condition
MBC622
Fig.23 Definition START STOP conditions.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
MASTER TRANSMITTER/ RECEIVER
SLAVE RECEIVER
SLAVE TRANSMITTER/ RECEIVER
MASTER TRANSMITTER
MASTER TRANSMITTER/ RECEIVER
MGA807
Fig.24 System configuration.
DATA OUTPUT TRANSMITTER acknowledge DATA OUTPUT RECEIVER acknowledge FROM MASTER START CONDITION
MBC602
clock pulse acknowledgement
Fig.25 Acknowledgement I2C-bus.
1996
full pagewidth
1996
Philips Semiconductors
controller/drivers
acknowledgement from PCF2116
CONTROL BYTE CONTROL BYTE DATA DATA
slave address bytes byte
bytes
update data pointer
MBH668
PCF2116 slave address
PCF2116 family (PCF2114X; PCF2116X)
Product specification
Fig.26 Master transmits slave receiver; WRITE mode.
handbook, full pagewidth
1996
Philips Semiconductors
controller/drivers
acknowledgement from PCF2116
CONTROL BYTE DATA CONTROL DATA
slave address bytes bytes
acknowledgement from PCF2116
SLAVE ADDRESS DATA DATA bytes update data pointer last byte
acknowledgement from master
MGA809
Last data byte dummy byte (may omitted).
PCF2116 family (PCF2114X; PCF2116X)
Product specification
Fig.27 Master reads after setting word address; write word address, RS/RW; READ data.
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth
acknowledgement from PCF2116
acknowledgement from master
acknowledgement from master
SLAVE ADDRESS
DATA
DATA
bytes
last byte update data pointer
MGA810
Fig.28 Master reads slave immediately after first byte; READ mode previously defined).
1996
handbook, full pagewidth
1996
Philips Semiconductors
controller/drivers
PROTOCOL
START CONDITION (A6) ACKNOWLEDGE
(A7)
STOP CONDITION
HD;STA HIGH t/fSCL
MGA811
SU;STO
PCF2116 family (PCF2114X; PCF2116X)
Product specification
Fig.29 I2C-bus timing diagram; rise fall times refer VIH.
Philips Semiconductors
Product specification
controller/drivers
LIMITING VALUES accordance with Absolute Maximum Rating System (IEC 134). SYMBOL VLCD Ptot Tstg HANDLING supply voltage supply voltage input voltage OSC, R/W, output voltage R32, VLCD input current output current total power dissipation power dissipation output storage temperature PARAMETER
PCF2116 family (PCF2114X; PCF2116X)
MIN. -0.5 VLCD
MAX. +8.0 +150
UNIT
IDD, ISS, ILCD VDD, VLCD current
Inputs outputs protected against electrostatic discharge normal handling. However, totally safe, desirable take normal precautions appropriate handling devices (see "Handling Devices").
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
CHARACTERISTICS VLCD Tamb unless otherwise specified. SYMBOL Supplies VLCD IDD1 IDD2 supply voltage supply voltage supply current external VLCD supply current supply current fosc kHz; Tamb fosc kHz; Tamb notes fosc kHz; Tamb fosc kHz; Tamb notes note 1100 note PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
IDD3
supply current
IDD4 IDD5
supply current internal VLCD supply current supply current
IDD6
supply current
ILCD VPOR Logic VIL1 VIH1 VoscL VoscH VV0L VV0H IOL1
VLCD input current power-on reset voltage level
0.15
level input voltage R/W, HIGH level input voltage R/W, level input voltage HIGH level input voltage level input voltage HIGH level input voltage pull-up current level output current HIGH level output current leakage current OSC, R/W,
0.7VDD 0.04
0.3VDD
1.00
0.05 -1.0
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
CONDITIONS MIN. TYP. MAX. UNIT
SYMBOL I2C-bus SDA, VIL2 VIH2 IOL2 outputs RROW RCOL Vtol1 Vtol2 Notes
PARAMETER
level input voltage HIGH level input voltage leakage current input capacitance level output current (SDA)
note note note
0.7VDD
0.3VDD
note note note
output resistance bias tolerance VLCD tolerance
±130 ±300
column output resistance note
outputs open-circuit; inputs VSS; VDD; inactive; internal external clock with duty cycle (IDD1 only). outputs open-circuit; generator load current VLCD Resets logic when VPOR. When voltages above below supply voltages VSS, input current flow; this current must exceed ±0.5 Tested sample basis. Resistance output terminals C60) with load current VLCD outputs measured time; (external VLCD). outputs open-circuit; external VLCD. Maximum value occurs CHARACTERISTICS (PCF2116K) VLCD Tamb unless otherwise specified. SYMBOL VLCD Note temperature coefficient resistance +0.6%/°C. PARAMETER supply voltage supply voltage voltage generator control input voltage voltage generator control input resistance Tamb note CONDITIONS MIN. TYP. 1000 MAX. UNIT
1300
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
CHARACTERISTICS VLCD Tamb unless otherwise specified. SYMBOL fosc PARAMETER frame frequency (internal clock); note external clock frequency MIN. TYP. MAX. UNIT
timing characteristics: Parallel Interface; notes WRITE OPERATION (WRITING DATA FROM PCF2116) PWEH tASU tDSW PWEH tASU tDHD enable cycle time enable pulse width address set-up time address hold time data set-up time data hold time
READ OPERATION (READING DATA FROM PCF2116 MPU) enable cycle time enable pulse width address set-up time address hold time data delay time data hold time
Timing characteristics: I2C-bus interface; note fSCL tBUF tSU;STA tHD;STA tLOW tHIGH tSU;DAT tHD;DAT tSU;STO Notes timing values valid within operating supply voltage ambient temperature range referenced with input voltage swing VDD. clock frequency tolerable spike width free time set-up time repeated START condition START condition hold time time HIGH time rise time fall time data set-up time data hold time set-up time STOP condition
1996
Philips Semiconductors
Product specification
controller/drivers
TIMING CHARACTERISTICS
PCF2116 family (PCF2114X; PCF2116X)
book, full pagewidth
VIH1
VIH1 VIL1
VIL1 VIL1 VIH1 VIL1
MLA798
VIH1 VIL1
VIH1 VIL1 VIH1 Valid Data VIL1
Fig.30 Parallel write operation sequence; writing data from PCF2116.
ndbook, full pagewidth
VIH1
VIH1 VIL1 VIH1
VIH1
VIL1 VIH1 VIH1
VIL1 VIL1
VOH1 VOL1
VOH1 VOL1
MLA799
Fig.31 Parallel read operation sequence; reading data from PCF2116 MPU.
1996
Philips Semiconductors
Product specification
controller/drivers
APPLICATION INFORMATION
PCF2116 family (PCF2114X; PCF2116X)
handbook, columns
P80CL51
PCF2116
MGA812
Fig.32 Direct connection 8-bit MPU; 8-bit bus.
handbook, columns
PCF2116
P80CL51
MGA813
Fig.33 Direct connection 8-bit MPU; 4-bit bus.
handbook, full pagewidth
PCF2116
CHARACTER DISPLAY (SPLIT SCREEN)
MGA816
Fig.34 Typical application using parallel interface.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth
PCF2116
CHARACTER DISPLAY (SPLIT SCREEN)
MGA817
PCF2114
CHARACTER DISPLAY
MASTER TRANSMITTER PCF84C81
Fig.35 Application using I2C-bus interface.
1996
Philips Semiconductors
Product specification
controller/drivers
8-bit operation, 1-line display using internal reset Table shows example 1-line display 8-bit operation. PCF2116 functions must function instruction prior display. Since display data store data characters, used advertising displays when combined with display shift operation. Since display shift operation changes display position only DDRAM contents remain unchanged, display data entered first displayed when Return Home operation performed. 4-bit operation, 1-line display using internal reset program must functions prior 4-bit operation. Table shows example. When power turned 8-bit operation automatically selected PCF2116 attempts perform first write 8-bit operation. Since nothing connected DB3, rewrite then required. However, since operation completed accesses 4-bit operation, rewrite required functions (see Table step Thus, function written twice. Table STEP 4-bit operation, 1-line display example; using internal reset INSTRUCTION power supply (PCF2116 initialized internal reset circuit) function DISPLAY
PCF2116 family (PCF2114X; PCF2116X)
8-bit operation, 2-line display 2-line display, cursor automatically moves from first second line after 40th digit first line been written. Thus, there only characters first line, DDRAM address must after eighth character completed (see Table Note that both lines display always shifted together; data does shift from line other. operation, 1-line display control byte required with most commands (see Table Initializing instruction power supply conditions correctly operating internal reset circuit met, PCF2116 must initialized instruction. Tables show this performed 8-bit 4-bit operation.
OPERATION Initialized. display appears.
Sets 4-bit operation. this instance operation handled 8-bits initialization only this instruction completes with write. Sets 4-bit operation, selects 1-line display VLCD 4-bit operation starts from this point resetting needed. Turns display cursor. Entire display blank after initialization.
function
display on/off control
entry mode Sets mode increment address shift cursor right time write DD/CGRAM. Display shifted. Writes `P'. DDRAM already been selected initialization power-on. cursor incremented shifted right.
write data CGRAM/DDRAM
1996
Table DISPLAY Initialized. display appears. OPERATION
8-bit operation, 1-line display example; using internal reset (character `A')
STEP
INSTRUCTION
1996 Turns display cursor. Entire display blank after initialization. Sets mode increment address shift cursor right time write DD/CGRAM. Display shifted. Writes `P'. DDRAM already been selected initialization power-on. cursor incremented shifted right. Writes `H'. PHILIPS_ PHILIPS_ PHILIPS PHILIPS_ Writes `S'. Sets mode display shift time write. Writes space. Writes `M'. Sets 8-bit operation, selects 1-line display VLCD
power supply (PCF2116 initialized internal reset function)
function
Philips Semiconductors
display mode on/off control
controller/drivers
entry mode
write data CGRAM/DDRAM
write data CGRAM/DDRAM
write data CGRAM/DDRAM
entry mode
write data CGRAM/DDRAM
write data CGRAM/DDRAM
PCF2116 family (PCF2114X; PCF2116X)
Product specification
STEP ICROCOM_ Writes `M'. MICROCO_ MICROCO ICROCO MICROKO Shifts only cursor position left. Writes correction. display moves left. Shifts display cursor right. Shifts only cursor right. MICROKO Shifts only cursor position left. MICROKO Writes `O'.
INSTRUCTION
DISPLAY
OPERATION
1996
write data CGRAM/DDRAM
Philips Semiconductors
cursor display shift
controller/drivers
cursor display shift
write data CGRAM/DDRAM
cursor display shift
cursor display shift
PHILIPS
write data CGRAM/DDRAM
Return Home Returns both display cursor original position (address
PCF2116 family (PCF2114X; PCF2116X)
Product specification
Table DISPLAY Initialized. display appears. Sets 8-bit operation, selects 2-line display voltage generator off. OPERATION
8-bit operation, 2-line display example; using internal reset
STEP
INSTRUCTION
1996 Writes `S'. PHILIPS_ PHILIPS Writes `M'. PHILIPS Sets DDRAM address position cursor head line. Sets mode increment address shift cursor right time write CG/DDRAM. Display shifted. Turns display cursor. Entire display blank after initialization.
power supply (PCF2116 initialized internal reset function)
Philips Semiconductors
function
controller/drivers
display on/off control
entry mode
Write data CGRAM/DDRAM
Writes `P'. DDRAM already been selected initialization power-on. cursor incremented shifted right.
write data CGRAM/DDRAM
DDRAM address
write data CGRAM/ DDRAM
PCF2116 family (PCF2114X; PCF2116X)
Product specification
STEP Writes `O'. PHILIPS Sets mode display shift time write. PHILIPS PHILIPS PHILIPS MICROCOM Returns both display cursor original position (address ICROCOM_ Writes `M'. Display shifted left. first second lines shift together. MICROCO_ MICROCO_
INSTRUCTION
DISPLAY
OPERATION
1996
write data CGRAM/ DDRAM
Philips Semiconductors
write data CGRAM/ DDRAM
controller/drivers
write data CGRAM/ DDRAM
return Home
PCF2116 family (PCF2114X; PCF2116X)
Product specification
Table DISPLAY Initialized. display appears. During acknowledge cycle will pulled-down PCF2116. OPERATION
Example operation; 1-line display (using internal reset, assuming VSS; note
STEP
BYTE
1996 Selects 1-line display VLCD pulse during acknowledge cycle starts execution instruction. Control byte sets following data bytes.
START
slave address write
Philips Semiconductors
send control byte function
controller/drivers
function
display on/off control Turns display cursor. Entire display shows character (blank ASCII-like character sets).
entry mode Sets mode increment address shift cursor right time write DDRAM CGRAM. Display shifted. writing data DDRAM, must Therefore control byte needed.
START
slave address write
send control byte write data
write data DDRAM Writes `P'. DDRAM been selected power-up. cursor incremented shifted right.
PCF2116 family (PCF2114X; PCF2116X)
Product specification
STEP Writes `H'. Writes `S'. PHILIPS_ PHILIPS_
BYTE DISPLAY OPERATION
write data DDRAM
1996
Philips Semiconductors
controller/drivers
write data DDRAM
(optional stop) start slave address write step PHILIPS_
control byte
PHILIPS PHILIPS PHILIPS PHILIPS
Return Home Sets DDRAM address address counter. (also returns shifted display original position. DDRAM contents unchanged). This instruction does update Data Register (DR).
control byte read DDRAM content will read from following instructions. while still I2C-write mode.
START
slave address read During acknowledge cycle content loaded into internal interface shifted out. previous instruction neither Address Read Data been performed. Therefore content unknown.
PCF2116 family (PCF2114X; PCF2116X)
Product specification
STEP
BYTE DISPLAY OPERATION
PHILIPS SCL; content loaded into interface during previous acknowledge cycle shifted over SDA. DB7. During master acknowledge content DDRAM address loaded into interface. SCL; code letter read first. During master acknowledge code loaded into interface.
read data: master acknowledge; note
1996 PHILIPS
Philips Semiconductors
read data: master acknowledge; note
controller/drivers
PHILIPS
read data: master acknowledge; note master acknowledge; After content interface register shifted internal action performed. data loaded interface register, Data Register (DR) updated, Address Counter (AC) incremented cursor shifted.
STOP PHILIPS
Notes
don't care.
left high-impedance microcontroller during READ acknowledge.
PCF2116 family (PCF2114X; PCF2116X)
Product specification
Table DESCRIPTION
Initialization instruction, 8-bit interface (note
STEP
1996 Function (interface 8-bits long). cannot checked before this instruction.
power-on unknown state
wait after rises above VPOR
Philips Semiconductors
controller/drivers
wait Function (interface 8-bits long). cannot checked before this instruction.
wait more than Function (interface 8-bits long). checked after following instructions. When checked, waiting time between instructions specified instruction time (see Table Clear display. Entry mode set. Display off. Function (interface 8-bits long). Specify number display lines voltage generator characteristic. cannot checked before this instruction.
Initialization ends
Note
PCF2116 family (PCF2114X; PCF2116X)
Product specification
don't care.
Table Initialization instruction, 4-bit interface. applicable I2C-bus operation DESCRIPTION
STEP
1996 Function (interface 8-bits long). cannot checked before this instruction.
power-on unknown state
wait after rises above VPOR
Philips Semiconductors
controller/drivers
wait Function (interface 8-bits long). cannot checked before this instruction.
wait Function (interface 8-bits long). checked after following instructions. When checked, waiting time between instructions specified instruction time. (See Table Entry mode set. Clear display. Display off. Function (interface 4-bits long). Specify number display lines voltage generator characteristic. Interface 8-bits long. Function (set interface 4-bits long). cannot checked before this instruction.
PCF2116 family (PCF2114X; PCF2116X)
Product specification
Initialization ends
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth
DISPLAY LAYOUT: COLUMNS
PCF2116 column output numbers
column numbers
PCF2116 column output numbers
DISPLAY LAYOUT: ROWS
MGA814
character display
Fig.36 Example display layout (PCF2116).
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth
DISPLAY LAYOUT: COLUMNS PCF2116 column output numbers
MATRIX
column numbers
PCF2116 column output numbers
DISPLAY LAYOUT: ROWS
MGA815
Fig.37 Example display layout (PCF2114/PCF2116).
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
book, full pagewidth
display glass
matrix
COLUMN LAYOUT
LAYOUT line characters display
MLB897
Fig.38 Display example (PCF2114); 1-line characters.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
dbook, full pagewidth
display glass
matrix
COLUMN LAYOUT
LAYOUT
MLB898
lines characters display
Fig.39 Display example (PCF2114); 2-lines characters.
1996
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth
PCF2116 CHIP-ON-GLASS
LINE CHARACTER
2116
MGA818
VLCD
Fig.40 Chip glass application.
1996
Philips Semiconductors
Product specification
controller/drivers
BONDING LOCATIONS
PCF2116 family (PCF2114X; PCF2116X)
handbook, full pagewidth
6.99
VLCD1 VLCD2 VLCD3
PCF2114 PCF2116
VDD2
VDD1
5.64
MLB969
Chip dimensions: approximately 5.64 6.99 area: 0.0121 mm2. Bonding dimensions:
Fig.41 Bonding locations.
1996
Philips Semiconductors
Product specification
controller/drivers
Table Bonding locations (dimensions µm). coordinates referenced centre chip, Fig.41. SYMBOL VDD2 VDD1 VSS1 VSS2 1996 -2445 -2211 -2034 -1806 -1627 -1437 -1245 -1056 -867 -672 -486 -297 1097 1267 1436 1606 1776 1946 2116 2286 2456 2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3300 -3013 -2760 -2590 -2420 -2250 -2080 -1910 -1740 -1570 -1400 -1230 SYMBOL
PCF2116 family (PCF2114X; PCF2116X)
2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 2626 2339 2169 1999 1829 1659 1489 1319 1149 -245 -415 -585
-1060 -890 -720 -550 -380 1092 1262 1432 1602 1772 1942 2112 2282 2452 2622 2792 2962 3132 3302 3302 3302 3302 3302 3302 3302 3302 3302 3302 3302 3302 3302 3302 3302 3302 3302
Philips Semiconductors
Product specification
controller/drivers
PCF2116 family (PCF2114X; PCF2116X)
3302 3302 3302 3302 3302 3302 3302 3302 3302 3302 3302 3015 2846 2676 2506 2336 2166 1996 1826 1656 1487 1317 1147 -290 -479 -716 -976 -1202 -1388 -1580 -1808 -1985 -2213 -2390 -2621
SYMBOL VLCD1 VLCD2 VLCD3
-755 -925 -1095 -1265 -1435 -1605 -1775 -1945 -2115 -2285 -2455 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625 -2625
1996
Philips Semiconductors
Product specification
controller/drivers
PACKAGE OUTLINE
PCF2116 family (PCF2114X; PCF2116X)
LQFP128: plastic profile quad flat package; leads; body
SOT425-1
index detail
scale
DIMENSIONS original dimensions) UNIT Note Plastic metal protrusions 0.25 maximum side included. OUTLINE VERSION SOT425-1 REFERENCES JEDEC EIAJ EUROPEAN PROJECTION max. 0.15 0.05 1.45 1.35 0.25 0.27 0.17 0.20 0.09 20.1 19.9 14.1 13.9 0.75 0.45 0.70 0.58 0.12 D(1) E(1) 0.81 0.59 0.81 0.59
22.15 16.15 21.85 15.85
ISSUE DATE 96-04-02
1996
Philips Semiconductors
Product specification
controller/drivers
SOLDERING Introduction There soldering method that ideal packages. Wave soldering often preferred when through-hole surface mounted components mixed printed-circuit board. However, wave soldering always suitable surface mounted ICs, printed-circuits with high population densities. these situations reflow soldering often used. This text gives very brief insight complex technology. more in-depth account soldering found Package Databook" (order code 9398 90011). Reflow soldering Reflow soldering techniques suitable LQFP packages. Reflow soldering requires solder paste suspension fine solder particles, flux binding agent) applied printed-circuit board screen printing, stencilling pressure-syringe dispensing before package placement. Several techniques exist reflowing; example, thermal conduction heated belt. Dwell times vary between seconds depending heating method. Typical reflow temperatures range from Preheating necessary paste evaporate binding agent. Preheating duration: minutes Wave soldering Wave soldering recommended LQFP packages. This because likelihood solder bridging closely-spaced leads possibility incomplete solder penetration multi-lead devices.
PCF2116 family (PCF2114X; PCF2116X)
wave soldering cannot avoided, following conditions must observed: double-wave turbulent wave with high upward pressure followed smooth laminar wave) soldering technique should used. footprint must angle board direction must incorporate solder thieves downstream side corners. Even with these conditions, consider wave soldering LQFP packages LQFP48 (SOT313-2), LQFP64 (SOT314-2) LQFP80 (SOT315-1). During placement before soldering, package must fixed with droplet adhesive. adhesive applied screen printing, transfer syringe dispensing. package soldered after adhesive cured. Maximum permissible solder temperature maximum duration package immersion solder seconds, cooled less than within seconds. Typical dwell time seconds mildly-activated flux will eliminate need removal corrosive residues most applications. Repairing soldered joints component first soldering diagonallyopposite leads. only voltage soldering iron (less than applied flat part lead. Contact time must limited seconds When using dedicated tool, other leads soldered operation within seconds between Wave soldering SQFP suitable wave soldering, this because likelihood solder bridging closely-spaced leads possibility incomplete solder penetration multi-lead devices.
1996
Philips Semiconductors
Product specification
controller/drivers
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
PCF2116 family (PCF2114X; PCF2116X)
This data sheet contains target goal specifications product development. This data sheet contains preliminary data; supplementary data published later. This data sheet contains final product specifications.
Limiting values given accordance with Absolute Maximum Rating System (IEC 134). Stress above more limiting values cause permanent damage device. These stress ratings only operation device these other conditions above those given Characteristics sections specification implied. Exposure limiting values extended periods affect device reliability. Application information Where application information given, advisory does form part specification. LIFE SUPPORT APPLICATIONS These products designed life support appliances, devices, systems where malfunction these products reasonably expected result personal injury. Philips customers using selling these products such applications their risk agree fully indemnify Philips damages resulting from such improper sale. PURCHASE PHILIPS COMPONENTS
Purchase Philips components conveys license under Philips' patent components system provided system conforms specification defined Philips. This specification ordered using code 9398 40011.
1996

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