Charles Brokish Senior Member, Technical Staff ABSTRACT software devel
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Emulation Fundamentals TI's Solutions
Charles Brokish Senior Member, Technical Staff ABSTRACT software development, perhaps most critical, least predictable stage process debugging. Many factors come into play when debugging software applications. Among these factors, time utmost importance. emulator useful when integrating hardware software portions user's application. Time required debug software application have major impacts time-to-market, meeting customer expectations, ultimately financial impact well-developed product which captures market share. Texas Instruments' debuggers allow extensive visibility into processors, their registers, application's software. This visibility allows software engineer understand what changes taking place inside processor application executes. software engineer breakpoints application based hardware signal values software locations within application. these breakpoints, user understand state processor data determine their application still operating correctly. They also perform benchmarking (timing analysis) profiling (CPU loading) their application software within emulator. Additionally, multiprocessor debug allows user debug software several processors same time provide method stopping multiple processors based condition another processor-allowing user capture entire system state time question. capabilities mentioned, many more within Texas Instruments debuggers, greatly reduce debugging time software development cycle. This paper explains fundamentals emulation logic emulation tools work together with digital signal processors (DSP). understanding fundamentals emulation, will able accelerate process setting performing software debug. This knowledge also aids trouble shooting potential problems your debugging setup. This paper explains setup emulator hardware systems single multi-processor applications. also explains system components interact during debug. troubleshooting guide provided assist commonly found setup problems. Field Design Applications
TMS320 family products Code Composer Studio trademarks Texas Instruments. other trademarks property their respective owners.
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Contents Hardware Setup Introduction General Understandings Signal Descriptions
Software Setup Board Configuration Information Single Processor Debug Multiprocessor Debug 2.3.1 Homogeneous Multiprocessor Debug 2.3.2 Heterogeneous Multiprocessor Debug Scanning Through Non-Debug JTAG Devices Establishing Communication With Your Emulation Hardware Target Hardware Setup Physical Space Your Emulation Hardware Invoking Emulation-Reset Invoking Emulation Debugger Using Parallel Debug Manager Troubleshooting Emulation Setup Errors Emulation Reset Errors Emulator Errors Troubleshooting Guide Other Debugging Diagnostic Tools Probe Third Party Tools Bulletin Board Tools Future Tools Development References List Figures
Connecting XDS560 Card Your Target System Connecting XDS510 Card Your Target System Connecting XDS510-PP Your Target System Emulator Connections Without Signal Buffering Emulator Connections With Signal Buffering Standard 14-Pin Keyed JTAG Header Startup Screen Code Composer Studio Setup Specifying Board Name Within CC_Setup Specifying Physical Address Emulation Hardware With CC_Setup Automatic Detection XDS560 Specifying Processor Configuration Within CC_Setup Defining File Used When Opening Viewing System Configuration Within CC_Setup
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Emulator Connections Multiprocessor Systems Specifying Multiprocessor Configuration Within CC_Setup Viewing Multiprocessor Configuration Within CC_Setup Specifying Heterogeneous Multiprocessor Configuration Specifying Processors Heterogeneous Multiprocessor Configuration Viewing Heterogeneous Multiprocessor Configuration Specifying Non-Emulation Devices BYPASS Mode Opening Debug Sessions From Parallel Debug Manager Parallel Debug Manager List Tables
Standard Controller JTAG Signals Connection Verification JTAG Signals Advanced Emulation JTAG Signals JTAG Signal Activity Connectivity Verification Trouble-Shooting Guide Emulation Errors
Hardware Setup
order understand workings emulation logic processors, first necessary understand what emulation consists This section covers setup hardware into your host operating system.
Introduction
When using debugger software debugging hardware platform, necessary perform setup procedures ensure proper working target processor with XDS560 XDS510. emulation setup comprised tools-the emulator (i.e. XDS560 XDS510) which controls information flow from target, debugger, which user interface this information. Beyond emulation setup target processor. emulation logic within processors uses JTAG (Joint Test Action Group) standard connection, procuring debug information from within processor. This section covers basics ensuring proper communication setup between emulation hardware target processor.
General Understandings
Debug hardware performed stopping core enable information scanned into device JTAG header. This information transferred serially through JTAG port following IEEE 1149.1 JTAG specifications[1]. important understand that this debug method near real-time, intrusive, require that core halted scan information.
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While connection JTAG header same, scan chains used emulation purposes different from those used boundary scan. Internally processor, there various serial scan chains which information scanned into control which scan chain used what information contained each scan chain, performed microprocessor. This scan manager task controlling this information scanned from various processors scan chain directing from various debugger windows. host emulator acts scan manager controls delivery scan information from target debugger window. When using (personal computer) JTAG, connection target processor made through several options including card (Figure card (Figure XDS510PP (Figure 3)-the host emulation hardware microprocessor (i.e., Pentium processor).
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7.875
XDS560 Connector 4.20
Fingers
0.48
2.87
Figure Connecting XDS560 Card Your Target System
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Figure Connecting XDS510 Card Your Target System
Figure Connecting XDS510-PP Your Target System This information regarding scan control available host dynamically linked libraries, otherwise known files. Additional information regarding physical connection XDS510 XDS560 debugger interfaces available documentation that shipped with product. Other helpful information[2, found other locations within Texas Instruments, such bulletin board internet homepage, www.ti.com. Third parties making other emulation interfaces available, including PCMCIA, USB, Ethernet connections ti.com select link Getting Started with more information). With these connection methods, scan management performed host computer external processor, respectively.
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Signal Descriptions
There five standard signals ground used JTAG connections control JTAG test access port (TAP) controller, defined IEEE 1149.1 standard. These signals shown Table Table Standard Controller JTAG Signals
SIGNAL NAME DESCRIPTION Test reset Test mode select Test data input Test data output Test clock clock provided XDS510 pod) Ground EMULATOR SIGNAL TYPE TARGET SIGNAL TYPE
TRST Input, Output
also uses other signals provided JTAG header method confirming proper connection emulation hardware (Table Target Voltage Detect Presence Detect) signal Test Clock Return used confirm presence target device proper functioning signals from XDS510 XDS560 pod. discuss their functionality further when cover EMURST trouble-shooting hardware problems. some newer devices, documentation refers signals called ET0, ET1, TVD. These signals identical traditional signals called EMU0, EMU1, respectively. However, there names have been changed better reflect their within TI's emulation solutions. Presence Detect (PD) been renamed Target Voltage Detect indicate that, only used detect presence target being connected JTAG header, also used detect level voltage JTAG signals that device. newer emulation hardware, JTAG able adapt voltage match voltage target. This provides means interfacing with legacy devices, which operated higher voltage well newer devices, whose JTAG signals capable operating down voltage below. Table Connection Verification JTAG Signals
SIGNAL NAME TCK_RET (Vcc) Input, Output DESCRIPTION Test clock return (Buffered unbuffered connection coming back from target) Target voltage detect EMULATOR SIGNAL TYPE TARGET SIGNAL TYPE
Additionally, Texas Instruments adds more signals JTAG header, which used advanced emulation capability. These signals, shown Table provide capability perform benchmarking, software profiling multiprocessor emulation with interprocessor breakpoint capabilities.
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Table Advanced Emulation JTAG Signals
SIGNAL NAME EMU0 ET0) EMU1 ET1) Input, Output DESCRIPTION Emulation Emulation Test Emulation Emulation Test EMULATOR SIGNAL TYPE TARGET SIGNAL TYPE
signals detailed C-Source Debugger User's Guide. signals used emulator provide clocking information when performing software benchmarking software profiling. They also used with ANALYSIS window debugger assist multiprocessor debugging serve Global Breakpoints multiprocessor setups. Furthermore, newer devices, signals provide data streams high-speed real-time data exchange (RTDX). Setup these signals multiprocessor debugging done within parallel debug manager (PDM), which discussed more Section 3.5. signals both input output target. They used output driven device result breakpoint conditions being met. They also used inputs monitored debugging logic. This allows core signal, another device devices) break result. Figure demonstrates common connection these signals user's hardware design. processor inches more from JTAG header, there could degradation signal loading signal path. this case, should buffers drive signals maintain suitable signal quality ensure proper emulation (Figure
Emulation Header EMU0 EMU1 TRST TCK_RET
Target Device EMU0 EMU1 TRST
inches less
Figure Emulator Connections Without Signal Buffering
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Emulation Header EMU0 EMU1 TRST TCK_RET Greater Than inches
Target Device EMU0 EMU1 TRST
Figure Emulator Connections With Signal Buffering Texas Instruments uses standard 14-pin keyed header their JTAG devices.
TCK_RET EMU0 TRST (Key) EMU1 Header Dimensions: Pin-to-pin spacing, 0.100-in(X,Y) width, 0.025-in square post length, 0.235-in normal
Figure Standard 14-Pin Keyed JTAG Header
Software Setup
software your computer must setup recognize devices that physically located within JTAG scan-chain. tool that perform this function called Code Composer Studio Setup. typically installed within your desktop icon executes program called CC_Setup.exe. this section explain designate which specific target(s) have within your system.
Board Configuration Information
information regarding scan chain entered through Code Composer Studio Setup (CC_Setup). This program allows user enter their names target processors, default names simply indicate which processor(s) scan chain. When starting CC_Setup, user sees screen with three sections-allowing user enter information regarding board System Configuration, available board/simulator types, driver installation shown Figure selecting dragging available device from center column into left-hand column, user begin process describing their system configuration.
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Figure Startup Screen Code Composer Studio Setup
Single Processor Debug
only single device included scan chain, signals connected shown Figure Figure this case, debugger specifying device family target processor, then providing information regarding physical connection emulation hardware. also possible software such that debug multiple targets-this discussed further next section. When specifying target device, should able find descriptor device family connection method from center column. example, show TMS320C55xt device being connected XDS560 hardware. start dragging appropriate target from center column left column dropping under System.
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Upon doing this, dialog asking additional information. First description Board Name. default, select (Figure
Figure Specifying Board Name Within CC_Setup
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Next, need specify physical address that emulation hardware connected within host computer. When using XDS510, default address hardware address 0x240[4] (Figure
Figure Specifying Physical Address Emulation Hardware With CC_Setup
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When using XDS560 emulation hardware, plug-and-play software operating system automatically detects default address hardware (Figure 10). Within board properties XDS560, also have option selecting what clock speed want TCK[5]. want allow hardware select optimal clock speed your setup.
Figure Automatic Detection XDS560
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Then must enter processor configuration. single-processor setup, this simply means selecting device from processor family have chosen, clicking Single. accept default processor name, create (Figure 11).
Figure Specifying Processor Configuration Within CC_Setup
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Finally, select file that want when Code Composer Studio opens (Figure 12). General Extension Language (GEL) interpretive language similar that lets create functions extend Code Composer Studio's usefulness.
Figure Defining File Used When Opening When finished, click Finish button your setup should shown left-hand column (Figure 13).
Figure Viewing System Configuration Within CC_Setup
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Multiple Processor Debug
When multiple devices included scan chain, data needs scanned serially through devices signals need connected shown Figure
Target Device EMU0 EMU1 TRST
Emulation Header EMU0 EMU1 TRST TCK_RET
Target Device EMU0 EMU1 TRST
Figure Emulator Connections Multiprocessor Systems discussed Section 1.2, scan manager controls bits that scanned into scan chain such that information directed correct target processor well data coming being directed proper debugger session. this reason, imperative that scan manager know exactly which devices scan chain what order they Devices should entered order which they physically located within JTAG scan chain (from TDO).
2.3.1
Homogeneous Multiprocessor Debug
When multiple processors same type used same scan chain, each processor must have unique name, must have same definition that processor. this case, either Multiple button from Figure 11-in which case processor names simply named sequentially, enter names specify Single after each name entered shown Figure stated earlier, devices should entered order which they physically located within JTAG scan chain (from TDO).
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Figure Specifying Multiprocessor Configuration Within CC_Setup resulting System Configuration this system shown Figure
Figure Viewing Multiprocessor Configuration Within CC_Setup
2.3.2
Heterogeneous Multiprocessor Debug
When multiple processors debugged, they from different processor families, necessary system Heterogeneous Multiprocessor Debug. Each processor must have unique name, must have appropriate definition that processor.
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When setting system Heterogeneous Debug, Available Board/Simulator Type selected must capable supporting processors from different families. specifically identify which families supported within driver selected viewing right-hand windowpane details driver, including Processors Supported (Figure 17).
Figure Specifying Heterogeneous Multiprocessor Configuration processors that using your heterogeneous processor system listed being supported with available drivers, contact Texas Instruments Technical Support more assistance. ti.com select link Support more information. Figure shows system setup with TMS320C55xt device TMS470R2x microcontroller device. this case, select device from Available Processors either select default name enter name before pressing Single. Upon completing entry individual devices within scan chain, your system configuration should complete (Figure 19).
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Figure Specifying Processors Heterogeneous Multiprocessor Configuration
Figure Viewing Heterogeneous Multiprocessor Configuration Upon exiting CC_Setup, information contained System Configuration converted into binary format emulation scan manager.
Scanning Through Non-Debug JTAG Devices
also possible scan information through JTAG ports devices that being debugged Emulator. This condition arises customer wants perform boundary scan devices within their target board. Boundary scan performed using JTAG header well, uses different software than used TI's emulation.
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When devices included JTAG scan path, being emulated, possible scan emulation information through these devices putting them BYPASS mode. first necessary understand large their JTAG instruction registers are. Figure shows example design which devices exist JTAG scan path that being emulated, placed BYPASS mode.
Figure Specifying Non-Emulation Devices BYPASS Mode this case, bypass device named Other JTAG instruction register length four bits. This information passed scan manager such that JTAG registers bypass through these devices. Note also, that chip front descriptor this case Boundary Scan Device) bypass devices shows with indicating that emulation software knows nothing device other than JTAG instruction register length.
Establishing Communication With Your Emulation Hardware Target
Once have installed your emulator hardware your board configuration, time establish communication with hardware from your host computer. This section explains some files used confirm connectivity hardware.
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Hardware Setup
Before executing files, make sure that your emulator according directions that were included shipping. Make sure that 14-pin JTAG header connected from emulator target that emulator connected your host computer appropriate means (ISA card, Parallel Port, SCSI bus, etc.), depending which emulator using.
Physical Space Your Emulation Hardware
sure confirm physical address emulator your host computer. XDS560 installation makes plug-and-play capabilities most today. With this capability, Code Composer Studiot software able detect address hardware without having explicitly define address. using slot XDS510 requires bytes space comes shipped with default setting 0x0240-0x025F. this space already taken within your board addressed elsewhere space (0x0280, 0x0320, 0x0340)[6]. Similarly, using XDS510-PP, default address 0x0378. default SCSI address XDS510-WS address XDS510 card XDS510-WS require changing switches hardware default location available host computer. older versions debuggers, necessary enter environment variables specify physical address emulation hardware. However, should necessary environment variables this purpose when using Code Composer Studio, that information entered within CC_Setup.
Invoking Emulation-Reset
able invoke Emulation-Reset software. This software resets internal emulation debugging logic well several other functions. Depending which debugging software using, emulation-reset software have different name. program that ships with Code Composer Studio XDSReset.exe, while older debuggers include software EMURST.exe. Among functions performed emulation-reset software are: Check correct address emulator hardware. Verify that there debugger currently running multiprocessor mode. Reset Test Controller. Check power exists Target Voltage Detect Presence Detect) pin. not, pull TRST_ high generate error message CANNOT DETECT TARGET POWER. power, then pull TRST_ then high. device Test Logic Reset (TLR). Check device TLR. not, create error message XDS510 RESET FAILED. most cases, this setup goes smoothly, ready begin debugging your software starting emulator.
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Invoking Emulation Debugger
When invoking emulation debugger, simply need double-click Code Composer Studio icon-which should execute CC_App.exe. There several parameters that passed when invoking CC_App, including specification desired file, other options. Refer user's guide that shipped with your debugging software more information these options. This user's guide likely softcopy document.
Using Parallel Debug Manager
When debugging systems that have more than device defined, required Parallel Debug Manager (PDM). Parallel Debug Manager provides method synchronous debugging your multiprocessor application. have configured multiprocessor system within CC_Setup, Parallel Debug Manager automatically invoked when start CC_App. After Parallel Debug Manager invoked, spawn emulator sessions from within environment similar they invoked from icon single-processor system configuration (Figure 21). provisions allow grouping processors within JTAG scan path provide debugging commands select processors without processors being affected.
Figure Opening Debug Sessions From Parallel Debug Manager Parallel Debug Manager allows single-point control starting stopping several processors synchronously. Synchronous debug includes ability synchronously start, stop, step processors (Figure 22). also includes ability perform global breakpoints through signals detailed Section 1.3.
Figure Parallel Debug Manager Additional details Parallel Debug Manager available Source Debugger User's Guide specific processor using.
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Trouble-Shooting Emulation Setup Errors
Emulation Reset Errors
have into errors when invoking emulation reset software, first check physical connection host computer make sure that power supplied target. Also make sure that signals board buffered device more that inches from JTAG header, shown Figure also want inspect TCK_RET signal oscilloscope. This indicates integrity signals board terms cleanliness well magnitude. weak signal TCK_RET indicate that buffers needed your system accommodate long paths. absence TCK_RET indicates connectivity problem within your setup. Before invoking emulator should. Make sure note settings your physical XDS510 board regarding space addressed. Make sure space address accordingly within Code Composer Setup. using parallel port debugger, make sure that address correctly that parallel port your support mode which intend (i.e., SPP4, SPP8, ECP). Refer manufacturer's instructions parallel port setup. Errors emulation hardware address result error message: CANNOT DETECT TARGET POWER. Make sure that have XDS510 correctly before looking errors your target. When resetting XDS560 board, there several errors that displayed. This hardware checks connectivity target board several locations including: emulation board within board's connection JTAG cable cable's connection target Errors above connections result messages-covered Table well thoroughly detailed XDS560 Troubleshooting Guide[7].
Emulator Errors
Occasionally, target passes emulation-reset, yields errors when invoking emulator. address some these errors possible setup conditions that might yield errors. Among most common problems encountered when starting emulator simply system configuration errors. System configuration errors cause variety errors. example, devices that defined within CC_Setup same, even wrong order those physical target, data errors. These errors include zeros, ones viewing data), repetitive patterns throughout registers memory displays. emulator still sometimes able start with incorrect board configuration. However, does scan correct information. This fact that scan manager distributing information coming corresponding debugger window. device ordering system configuration incorrect, bit-stream coming incorrectly broken debugger window does correct information target device intend debug.
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appears that board configuration correct within CC_Setup bits being displayed emulator zeros ones, physical connection JTAG signals should investigated. solder short across JTAG header cause signals shorted give erroneous information pin. Make sure test each JTAG signals described Table Table Documentation some newer devices refers signals called ET0, ET1, TVD. These signals identical traditional signals called EMU0, EMU1, respectively. However, there names have been changed better reflect their within TI's emulation solutions. Presence Detect (PD) been renamed Target Voltage Detect indicate that, only used detect presence target being connected JTAG header, also used detect level voltage JTAG signals that device. newer emulation hardware, JTAG able adapt voltage match voltage target. This provides means interfacing with legacy devices, which operated higher voltage well newer devices, whose JTAG signals capable operating down voltage below. Monitor each signal oscilloscope determine appropriate level, changing should Table shows standard signals included JTAG header that should investigated what level should expected each pin, depending mode operation. Table JTAG Signal Activity Connectivity Verification
JTAG SIGNAL (PD) TCK_RET Both Both Both TRST CONDITIONS voltage different than CPU) device target board power 10.368 square wave clock signal coming from JTAG XDS510. Faster clocks possible XDS560. Duplicate TCK. this signal dirty attenuated, buffers should used JTAG signals shown Table Controls state machine, should change every time another debug operation performed When device Run-Test/Idle mode. When device Test Logic Reset state Active-Low signal: Emulation logic should reset perform emulation NOTE that this signal pulled down internally specific device using, this signal should have pull-down resistor ensure that emulation logic RESET when emulation hardware attached. This signal information that being scanned into target from emulator pod. should change levels data scanned through target This signal reading internal information from target should changing reflect data that being scanned out. This signal should clean zero volts.
Both Both
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Table JTAG Signal Activity Connectivity Verification (Continued)
JTAG SIGNAL CONDITIONS start-up, these signals typically they used indicate global breakpoints well being used benchmarking profiling. EMU0/EMU1 NOTE that these signals pulled internally specific device using, should place pullup resistors them ensure that they inactive when emulation hardware attached. some devices, they affect operational mode device they pulled Both device global breakpoint which caused halt debug, signals still indicate that break conditions have been met. device actively being debugged performing such functions benchmarking, profiling, RTDX, signals toggling transmit data emulation hardware board.
viewing signals shown above oscilloscope, determine signals changing properly during normal emulation emulation startup. cannot your emulator started errors, make sure monitor these signals time invoking emulator determine there activity them.
Troubleshooting Guide
event that your emulator tools cause errors that understand, Table allows determine some commonly found errors emulation setup. Look first column determine error seeing, then second column track down possible errors. Table Troubleshooting Guide Emulation Errors
PROBLEM POSSIBLE SOLUTION Make sure that target proper voltage supplied Check that emulator board securely installed Check that cabling securely connected between emulator target Make sure that port address emulator hardware correctly Make sure that emulator hardware setting port address correspond that entered within CC_Setup Make sure don't have another device conflicting same space your host computer Make sure that target proper voltage supplied Make sure processor RESET Make sure that port address emulator hardware correctly explained above) Check that cabling securely connected between emulator target Make sure have correctly entered board information within CC_Setup. Emulation Reset software before invoking emulator verify that emulation logic proper state External device holding hardware HOLD signal Processor waiting READY signal from external peripheral Check solder connections JTAG header short circuits. Check board schematics ensure proper routing JTAG signals Make sure using correct board configuration within CC_Setup Make sure using correct board configuration file Check dirty signals JTAG header Check memory definition with that debugger initialization file ensure that there actually memory present
Error Message: CANNOT DETECT TARGET POWER
Error Message: CANNOT INITIALIZE TARGET!!
Error Message: Processor access timeout Data debugger screen displays zeros Data debugger screen displays repetitive -patterns Data debugger screen displays random bit-patterns where specific data expected
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Table Trouble-Shooting Guide Emulation Errors (Continued)
PROBLEM Error Condition: Code Composer Studio halts splash screen. (Windows only) Error Message: Can't Initialize Target CPU: SC_ERR_CTL_CBL_BREAK_NEAR <-182> Error Message: Can't Initialize Target CPU: SC_ERR_CTL_CBL_BREAK_FAR <-183> POSSIBLE SOLUTION Make sure that target proper voltage supplied Check that emulator board securely installed. Check that cabling securely connected between emulator target. cable connected improperly connected back Verify that cable connected that connector's screws tightened into XDS560 bracket. target header from XDS560 connected improperly connected target board. cable connected improperly connected back Verify that cable connected that connector's screws tightened into XDS560 bracket. some PENTEK boards, target emulation header uses Target Disconnect XDS560. Verify that target board emulation header grounded. not, then wire-wrap wire from target emulation header. Refer XDS560 Technical Reference Manual additional information. Make sure that target proper voltage supplied Check that emulator board securely installed. Check that cabling securely connected between emulator target. Make sure that XDS560 hardware settings port address correct
Error Message: Can't Initialize Target CPU: SC_ERR_NO_TRG_POWER <-180>
Other Debugging Diagnostic Tools
Probe
XDSPROBE.exe utility that ships with Code Composer Studio. capable exercising JTAG scan path test connectivity target device well determining device(s) match what defined within board configuration file from CC_Setup. There more capabilities this tool which defined within on-line documentation within Code Composer Studio. tool found \ti\cc\bin directory.
Third Party Tools
Texas Instruments extensive third party network that develops tools Solutions ti.com select link Getting Started with DSP). Occasionally, these companies will create their tools verifying connectivity XDS510 emulation. These tools used additional aids what described this document. Support these tools well questions regarding their should directed through third party.
Bulletin Board Tools
Texas Instruments also occasionally develops special tools perform specific tasks places them Electronic Bulletin Board ti.com select link Support then Support Site) free access. These tools downloaded used user's discretion. These tools provided free, such, supported.
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Among these tools Bulletin Board tool called XDS_DIAG.EXE. This tool older tool, which performs similar functions XDSPROBE.
Future Tools Development
Texas Instruments dedicated development industry-leading development debug tools. such, continually developing capabilities, which allow customers increased flexibility visibility software development. Updates these other tools available upon occasion Update Advisor within Code Composer Studio. sure check updates occasionally. Keep touch with your local distributor and/or representative stay abreast newest tools technology available. also monitor Bulletin Board internet homepage find capabilities announces additional developments.
References
IEEE 1149.1 (JTAG) Testability Primer, (literater number SSYA002) XDS51X Emulator Installation Guide, (literature number SPNU070) JTAG/MPSD Emulation Technical Reference, (literature number SPDU079) XDS51x Emulator Installation Guide, (literature number SPNU070) XDS560 Emulator Technical Reference, (literature number SPRU589) XDS51x Emulator Installation Guide, (literature number SPNU070) XDS560 Troubleshooting Guide, (literature number SPRU503)
Emulation Fundamentals TI's Solutions
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