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User's Manual 03.92 2060; 2260 Revision History: Previous Release
Top Searches for this datasheetSignal Processing Codec Filter SICOFI®, SICOFI®-2 User's Manual 03.92 2060; 2260 Revision History: Previous Releases: Page Original Version 03.92 Subjects (changes since last revision) Edition 03.92 This edition realized using software system FrameMaker®. Published Siemens Bereich Halbleiter, Marketing-Kommunikation, D-8000 Siemens 1992. Rights Reserved. patents other rights third parties concerned, liability only assumed components applications, processes circuits implemented within components assemblies. information describes type component shall considered assured characteristics. Terms delivery rights change design reserved. questions technology, delivery, prices please contact Offices Semiconductor Group Germany Siemens Companies Representatives worldwide (see address list). technical requirements components contain dangerous substances. information type question please contact your nearest Siemens Office, Semiconductor Group. Siemens approved CECC manufacturer. Contents Table Contents Page Introduction General Information Type-Designation Code ICs. Mounting Instructions Processing Guidelines ICs. Data Classification Quality Assurance Overview Architecture Devices. General Exchange Architecture Analog Line Cards. Optimized Line Board Architecture IOM®-2 Interface Device Overview Interface Controller (PBC EPIC®) Signal Processing Codec/Filter (SICOFI® SICOFI®-2) Advantages Siemens Semiconductor Analog Line Card Concept Functional Description Technical Data SICOFI® SICOFI®-2 SICOFI® 2060 SICOFI®-2 2260. Package Outlines Development Support Tools General Overview Hardware Software Tools. SICOFI® Coefficients Program (STS 2060) Features General Overview SICOFI® Test Board (STUT 2060). Features General Overview SICOFI®-2 Module (SIPB 5135). Features General Overview Detailed Description Software Tools Software Description 2060 Calculating SLIC Parameters Transformer SLIC using M-Parameters SPICE Calculating SLIC Transfer Functions ERICSSON SLIC 3736 Using K-Parameters SPICE Semiconductor Group Contents Table Contents (cont'd) Page Detailed Description Hardware Tools. SICOFI® Test Board STUT 2060. SICOFI®-2 Module Siemens ISDN User Board (SIPB 5135) SLIC Babyboard STUS 5502 HARRIS SLIC 5502. SLIC Babyboard STUS 5509 HARRIS SLIC 5509. SLIC Babyboard STUS 3762 ERICSSON SLIC 3736 SLIC Babyboard STUS 3762 ERICSSON SLIC 3762/64 SLIC Babyboard STUS 3030 SSLIC L3000 L3030 SLIC Babyboard STUS 3090 SSLIC L3000 L3090 SLIC Babyboard STUS 1001 Transformer SLIC Application Notes VIII SICOFI® Application Together with HARRIS-SLIC 5502 SICOFI® Application Together with ERICSSON SLIC 3762. SICOFI® Application Together with SSLIC L3000 /L3030. SICOFI® Application Together with SSLIC L3000 /L3090. SICOFI® Application Together with Transformer SLIC with Series Feeding. SICOFI® Application Together with Transformer SLIC with Transverse Feeding SICOFI® Application Together with Transformer SLIC Specification. SICOFI® Layout Recommendation Analog Line-Card Applications Using SICOFI®-2 (PEB 2260) IOM®-2 Mode DAML Simulation Using SIPB 5000 Userboard System. IOM®, IOM®-1, IOM®-2, SICOFI®, SICOFI®-2, SICOFI®-4, SICOFI®-4µC, SLICOFI®, ARCOFI® ARCOFI®-BA, ARCOFI®-SP, EPIC®-1, EPIC®-S, ELIC®, IPAT®-2, ITAC®, ISAC®-S, ISAC®-S ISAC®-P, ISAC®-P IDEC®, SICAT®, OCTAT®-P, QUAT®-S registered trademarks Siemens MUSACTM-A, FALCTM54, IWETM, SARETM, UTPTTM, ASMTM, ASPare trademarks Siemens Purchase Siemens components conveys license under Philips' patent components I2C-system provided system conforms specifications defined Philips. Copyright Philips 1983. Semiconductor Group Contents Introduction following chapters inform about technical data programming Signal Processing Codec Filter SICOFI® SICOFI®-2 2060/2260 describe hardware software tools. Application notes show work with SICOFI family given application. order overview architecture, devices tools, suggest start having look 'General Overview Architectures Devices' well 'Development Support Tools'. Detailed descriptions found other chapters. more information related products quality issues provide information literature. Semiconductor Group General Information Type-Designation Code type designations based European Electron system. code system explained Electron brochure 15*), edition 1988. Available from Electron Avenue Louise, (B.12) -1050 Bruxelles, Belgium Mounting Instructions Plastic Packages Insertion pins packages bent downwards angle into holes grid 2.54 with diameters between dimension shown corresponding drawing package. bottom package will touch circuit board after insertion because pins have shoulders just below package (see figure After insertion package board advisable bend ends pins angle approx. board that package does have pressed down during soldering. Plastic packages soldered board side facing away from package. maximum permissible soldering temperature (max.10 when using solder bath, e.g. wave soldering, (max. when using soldering iron. Figure Plastic Packages (P-DSO P-LCC) Surface Mounting (SMD) Reflow soldering: Wave soldering: device temperature max. soldering time (typical figure vapor-phase soldering) soldering temperature soldering time max. minimum thermal stress, based experience, soldering temperature (soldering time Soldering iron: Semiconductor Group General Information Storage Pretreatment components should stored place. Some large specially identified plastic have processed condition. This produced packing means separate drying process shortly before they processed (e.g. Processing Guidelines Integrated circuits (ICs) electrostatic-sensitive (ESS) devices. demand greater packing density smaller structures semiconductor chips, with result that today every whether bipolar, MOS, CMOS, protected against electrostatics. CMOS devices generally have integrated protective circuits virtually impossible them destroyed purely static electricity. other hand, there acute danger from electrostatic discharges (ESD). multitude possible sources discharge, charged devices should mentioned addition charged persons. Low-resistive discharges produce peak powers amounting kilowatts. protection devices following principles should observed: Reduction charging voltage, below possible. Means which effective here increase relative humidity replacement highly charging plastics antistatic materials. With every kind contact with device pins charge equalization expected. This should always highly resistive (ideally this means that call special handling, because uncontrolled charges, voltages from ungrounded equipment persons, surge voltage spikes similar influences destroy device. Even devices have protective circuits (e.g. protective diodes) their inputs, following guidelines their handling should nevertheless observed. Identification packing devices provided with following label manufacturer: Scope guidelines apply storage, transport, testing, processing kinds ICs, equipped soldered circuit boards that comprise such components. Semiconductor Group General Information Handling Devices must left their containers until they processed. only handled specially equipped work stations. These stations must have work surfaces covered with conductive material order to109 /cm. With humidity coat pure cotton sufficient. case chargeablesynthetic fibers clothing should worn close-fitting. wrist strap must worn snugly skin grounded across resistor conductive floors, provided, further protection achieved using so-called chairs shoes with conductive sole transport containers devices assembled circuit boards must first brought same potential being placed work surface touched operator before individual devices handled. potential equalization should across resistor When loading machines production devices necessary ensure that devices come transport magazine charged that they damaged touching metal, e.g. parts machine. Example conductive (black) tubes. devices destroyed tube charged persons come tube charged this emptied charged person. Conductive tubes only handled work stations (high-resistance work-station person grounding). Example anti-static (transparent) tubes. devices cannot destroyed tube charged persons (there rare exception case custom with unprotected gate pins). devices endangered when tube emptied latter, especially humidity, longer sufficiently anti-static after long period storage year). both cases damage avoided discharging devices across grounded adapter high-resistance material /cm) between tube machine. metal tubes especially anodized aluminium advisable because danger low-resistance device discharge. Semiconductor Group General Information Storage devices should only stored identified locations provided purpose. During storage devices should remain packing which they supplied. storage temperature should exceed Transport devices approved packing tubes should only transported suitable containers conductive longterm anti-static-treated plastic possibly unvarnished wood. Containers both high-charging plastic very low-resistance materials unsuitable. Transfer cars their rollers should exhibit adequate electrical conductivity Sliding contacts grounding chains will reliably eliminate charges. Incoming Inspection incoming inspection above guidelines should observed. Otherwise right refund replacement devices fail inspection lost. Material Mounting drive belts machines used processing devices, much they come into contact with them (e.g. bending cutting machines, conveyor belts), should treated with anti-static spray (e.g. anti-static spray from Kontaktchemie). better, however, avoid contact completely. devices have soldered desoldered manually, soldering irons with thyristor control used. Siemens EMI-suppression capacitors type 81711-B31.-B36 have been proven very effective against line transients. Circuit boards fitted soldered with devices always considered endangered. Semiconductor Group General Information Electrical Tests Application Circuit devices should processed with observation these guidelines. Before assembled soldered circuit boards tested, remove shorting rings. sockets integrated circuits must conducting voltage when individual devices assembled circuit boards inserted withdrawn, unless works specifications state otherwise. Ensure that test devices power supplies produce voltage spikes, either when being turned normal operation power fuse blows other fuses respond. When supplying bipolar integrated circuits with current, negative voltage GND) first connected. general, interruption this potential during operation permissible. Signal voltages only applied inputs when better after supply voltage turned They must disconnected when better before supply voltage turned off. Power supplies integrated circuits blocked near possible supply terminals With bipolar recommended low-inductance electrolytic capacitor least paralleled ceramic capacitor example. Using with high output currents, necessary value electrolytic capacitor must adapted test application circuit. Transient behavior dynamic output resistance power supplies, line inductances supply load circuit particular inductive loads motors have considered. When switching line inductances inducitve loads, stored power consumed externally, unless otherwise specified (e.g. electrolytic capacitor, diodes, Z-diodes power supply). Also switching supply voltage prior load rejection should taken into account. with low-pass character output stages (e.g. drivers PNP/NPN endstages), normally need additional external compensation output. This applies particularly complex loads. output power amplifiers compensated Boucherot element. individual cases, bridge circuits only need capacitance bypassing load. Depending application however, also recommended connect capacitor from each output ground. Observe notes instructions respective data books. Semiconductor Group General Information Packing Assembled Boards Flatpack Units packing material should exhibit volume conductivity: 1010 /cm. most cases especially with humidity this requirement fulfilled simple corrugated board. Better protection obtained with bags conducitve polyethylene foam (e.g. RCAS 1200 from Richmond Redlands, California). should always ensure that different boards cannot touch. special cases necessary provide protection against strong electric fields, such generated conveyor belts example. this purpose sheath aluminium foil recommended, although direct contact between film must avoided. Cardboard boxes with aluminium-foil lining, such those used shipping devices, available from Laber Munich. Ultrasonic Cleaning following recommendation applies plastic packages. cavity packages (metal also ceramic) separate regulations have observed. Freon isopropyl alcohol (trade name: propanol) used solvents. These solvents also used plastic packages because they into plastic material. ultrasonic bath double halfwave operation advisable because component stress. ultrasonic limits follows: sound frequency exposure alternating sound pressure sound power W/cm2/liter Semiconductor Group General Information Data Classification Maximum Ratings Maximum ratings absolute ratings; exceeding these values cause irreversible damage integrated circuit. Characteristics listed characteristics ensured over operating range integrated circuit. Typical characteristics specify mean values expected over production spread. otherwise specified, typical characteristics apply given supply voltage. Operating Range operating range functions given circuit description fulfilled. Quality Assurance Quality Assurance System high quality reliability integrated circuits from Siemens results carefully managed design production which systematically checked controlled each stage. procedures subject quality assurance system; full details given brochure "Quality Assurance Integrated Circuits". Figure show most important stages Quality Assurance (QA) system. departments independent production development responsible selected measures, acceptance procedures information feedback loops. Operating departments have state-of-the-art test measuring equipment their disposal, work according approved methods statistical quality control, provided with facilities accelerate life environmental tests used both qualification routine monitoring tests. latest methods equipment preparation analysis employed achieve continuity quality reliability. Conformance Each integrated circuit subjected final test production process. These carried computer-controlled, automatic test systems because hundreds thousands operating conditions well large number static dynamic parameters have considered. Moreover, test systems extremely reliable reproducible. department carries final check form lot-by-lot sampling inspection additionally ensure this minimum percent defectives ensure statistically that released lots less than agreed. Sampling inspection performed accordance with inspection plans 080, well identical MIL-STD-105 410. Semiconductor Group General Information Figure Semiconductor Group General Information Figure Reliability Measures Taken During Development reliability already considerably influenced development stage. Siemens has, therefore, fixed certain design standards development circuit layout, e.g. specifying minimum width spacing conductive layers chip, dimensions electrical parameters protective circuits electrostatic charge, etc. examination with carefully arranged programs operated large-scale computers, guarantees immediate identification elimination unintentional violations these designs standards. Semiconductor Group General Information In-Process Control During Production manufacturing integrated circuits comprises several hundred production steps. each step executed with utmost accuracy, in-procress control outstanding importance. Some processes require more than hundred different test measures. tests have been arranged manner that individual steps process reproduced continuously. decreasing failure rates reflect persistent effort this direction; course years they have been reduced considerably despite immense rise complexity. Reliability Monitoring general course failure rate versus time shown so-called "bathtub" curve. failure rate peak during first operating hours (early failure period). After early failure period decayed, "constant" failure rate period starts during which failures occur approximately uniform rate. This period ends with repeated rise curve during wear-out failure period. ICs, however, latter period usually lies beyond service life specified individual equipment. Reliability tests usually destructive examinations. They are, therefore, carried with samples. Most failure mechanisms accelerated means higher temperatures. temperature dependence failure mechanisms, possible simulate future operational behavior within short time applying high temperatures; this called life test. acceleration factor life test obtained from Arrhenius equation where temperature which life test performed, assumed operating temperature, Boltzmann constant. Important factor activation energy lies between differs considerably individual failure mechanisms. Siemens ICs, reliability data gained from life tests converted operating temperature assuming average activation energy acceleration factor life tests thus compared with operational behavior. This method also considers failure mechanisms with activation energy, i.e. which only slightly accelerated temperature effect. Various reliability tests periodically performed with types that representative certain production line this described brochure "Quality Assurance-Integrated Circuits". Such tests e.g. humidity test relative humidity, pressure cooker test, well life tests 1000 hours more. Test results available form summary reports. Semiconductor Group Overview Architecture Devices General Exchange Architecture Semiconductor Group Overview Architecture Devices Analog Line Cards digital exchange system subscriber line boards provide link between subscriber switching network. basic functions analog line boards known under acronym BORSHT (battery, overvoltage, ringing, supervision, hybrid, testing). Moreover, further important tasks voice frequency band limitation, analog digital conversion into time discrete digital equivalents, time-slot assignment highways handling signaling control information. Usual implementation uses ports interface subscriber line leading large amount wiring and, thus, problems such crosstalk large board size. Usual implementation also characterized fixed adjustment line interface conditions although telephone line conditions vary considerably with national standards even with subscriber line installations. Under adverse conditions telecommunication equipment must match subscriber line termination impedances while suppressing return echoes two- four-wire hybrid network. Compensating line attenuation just critical balancing voice signals transmission reception paths. improve voice quality, subscriber line boards have matched different line conditions means interchangeable discrete components. This approach very costly regarding line board design manufacturing. Furthermore, reliability board filled with parts, wires connections will decrease rapidly. subscriber line board architecture proposed Siemens Semiconductor geared eliminate many these line board trouble spots. Semiconductor Group Overview Architecture Devices General Line Board Structure Functions General Line Card Function Component SLIC (Subscriber line interface circuit) Function realisation BORSHT function battery feed overvoltage protection ringing supervision hybrid testing analog network matching input line impedance frequency response correction hybrid balancing gain adjustment CODEC/Filter coding, conversion according A-law µ-law, voice band limitation according CCITT LSSGR time-slot assignment, data rate Semiconductor Group Overview Architecture Devices Optimized Line Board Architecture Siemens Semiconductor concept characterized centralized interface controller device providing variable Time-Slot Assignment (TSA), communication with subscriber line devices such signal processing codec/filter (SICOFI®) ISDN devices (Subscriber Line Data) IOM®-2 (ISDN Oriented Modular) interface, interface with microprocessor. characteristic architectural feature, test, monitring control purposes, device permits efficient switching data streams between these interfaces and, therefore, ensures transparency between channels control signaling data. This opens attractive possibilities such common-channel signaling microprocessor access data. signal processing codec/filter (SICOFI) avoids analog network which matched different requirements interchanging discrete components. Based Digital Signal Processing (DSP) methods SICOFI allows complete control line conditions software. all-over flexibility unique device concept gives user capability designing standard line card which customized each application under software control. SLD/IOM-2 architecture leads highly modular line board configuration with wiring, reduced board area and, depending only SLIC used, very discrete elements. Siemens Analog Subscriber Lines Semiconductor Group Overview Architecture Devices SLD/IOM®-2 Interface used PBC/PIC interface with subscriber line devices. Serial Interface Port (SIP) used transfer digital voice data, feature control signaling information between individual subscriber line devices, highways control backplane. approach provides common interface analog digital per-line components. Through PBC/PIC, which device architecture, data transparently switched onto highways. will make analog digital subscriber line boards plug-compatible line equipment rack. There three leads connecting each subscriber line device PBC/PIC: common clock signals shared among devices, unique bidirectional data lead each eight lines. Direction signal (DIR) 8-kHz clock output from (master) that serves frame sync subscriber line devices (slave) well transfer indicator. data transferred 512-kHz rate, clocked Subscriber Clock (SCLK). When high (first half frame), four bytes digital data transmitted from PBC/PIC slave (receive direction). During second half frame when low, four bytes data transferred from slave back PBC/PIC (transmit direction). Channel 64-kbit/s channels reserved voice data routed from highways. application where SICOFI connected SIP, voice received channel transmitted channel three-party conference, channel third-party voice channel. SICOFIs connected SIP, channel assigned channel other SICOFI. Conferencing possible this configuration. With digital subscriber line devices bytes used carry 64-kbit/s data channels. third sixth byte locations used transmit receive control information programming slave devices. last byte each direction reserved signaling data. Semiconductor Group Overview Architecture Devices Frame Structure Interface Because unique requirements ISDN systems, Siemens developed interchip interface especially these applications. part their joint definition ISDN components, "Group Four" (ALCATEL, Siemens, Plessey ITALTEL systems houses) adapted this Siemens Semiconductor interface suggested some compatible additional features. resulting IOM-2 interface become standard interchip communication ISDN terminals, terminal adaptors, network terminations, transmission repeaters line cards digital exchange systems. IOM-2 interface four wire interface with: clock, frame clock data line direction. flexible data clock. this way, data transmission requirements optimized different applications. Semiconductor Group Overview Architecture Devices line cards, 4096-kHz clock been selected that eight channels thus, eight ISDN analog subscribers multiplexed over single IOM-2 bus. channel structure IOM-2 interface follows: first octets constitute kbit/s channels. third octet MONITOR channel. used exchange data between devices using IOM-2 MONITOR channel protocol. fourth octet (control channel) contains bits kbit/s channel four-bit command/indication channel, ISDN applications command/indication channel analog subscriber applications bits supporting MONITOR channel protocol. Multiplexed Frame Structure IOM®-2 Interface Semiconductor Group Overview Architecture Devices Device Overview Interface Controller (PBC/PIC/EPIC®) device architecture Peripheral Board Controller (PBC) 2050. Basically highly intelligent multiplexer/demultiplexer chip which performs variable time-slot assignment channels handles data streams control signaling. constitutes interface between subscriber line devices such codec filter ISDN communication controller, lines, central control unit optional onboard microprocessor. importance reliability system design, provides backplane interface with fully redundant highways. exchange information between central control unit working "slave" point-to-multipoint configuration, device supports subset CCITT's High Level Data Link Control (HDLC) communications protocol that respond certain HDLC frames without microprocessor intervention software supervision. hardwired implementation physical level HDLC protocol (e.g. cyclic redundancy check) parts this logical level (e.g. evaluation HDLC commands preparation response packets) on-chip HDLC controller permits very high data rates Mbaud serial link central processor. using local standard microprocessor, such 8051, possible expand range HDLC protocol full X.25 level, while still maintaining procedure handling, buffering distribution data packets hardwired PBC. Furthermore, able, conjunction with microprocessor, take over "primary" function high speed HDLC communication link. communicates with subscriber line devices three-wire subscriber line data (SLD) based ping-pong type protocol. ensures reduced line board wiring. cover broad range applications adaptable standard commercial systems (with channels frame). Independently system clock used, circuit computes timing signals required standardized bus, thus decoupling subscriber line devices from system clock. excellent example efficient realization standard functions through hardwired logic order increase realtime processing speed without loss flexibility. further device interfacing subscriber line devices with lines Interface Controller (PIC) 2052. This CMOS device performs Time-Slot Assignment (TSA) interface functions. software-compatible 2050, leaves HDLC controller hardwired Last Look Logic. Semiconductor Group Overview Architecture Devices Extended Interface Controller (EPIC) 2055 intended used central processor architecture. CMOS device programmed operate different data rates between 8192 kbit/s. system interface consists four duplex ports with tristate indication signal each output line. configurable interface selected incorporate either four duplex (IOM) eight bidirectional ports (SLD). EPIC therefore programmed communicate either with with (ISDN Oriented Modular) IOM®-2 compatible devices. both cases device handles layer1 functions buffering MONITOR channels IOM-compatible devices feature control signaling channels compatible devices. EPIC handle ISDN subscribers with their channel structure analog subscribers configuration subscribers configuration. Since interfaces operate different data rates, EPIC ideal device data rate adaptation. Moreover, EPIC fundamental building blocks networks with either central, decentral mixed signaling packet data handling architectures. EPIC-2 2056 smaller version EPIC. functions that performed remain essentially same EPIC-2 2056 been optimized time-slot assignment switching functions line cards with ISDN analog subscriber lines. Siemens Semiconductor therefore offers optimal solution Interface Controller every application. 2050: 2052: EPIC 2055: eight ISDN analog subscribers. Especially suitable powerful PABX. eight ISDN analog subscribers. Ideal price sensitive systems, e.g. small PABX public exchanges (CO). ISDN analog subscribers. Suitable central processor architectures. EPIC-2 2056: ISDN analog subscribers architectures. Signal Processing Codec/Filter (SICOFI®/SICOFI®-2) Codec/Filter used advantageous analog line board architecture programmable Signal Processing Codec Filter (SICOFI) 2060, fabricated advanced CMOS technology. Based Digital Signal Processing (DSP) methods, addition standard functions coding voice-band limitation that codec filter features, SICOFI provides variety user-programmable filters impedance matching, 2/4-wire hybrid balancing, analog digital gain adjustment well frequency response correction. Semiconductor Group Overview Architecture Devices sophisticated level performance therefore achieved under complete software control. external components trimming procedures completely avoided. impedance adjustments, related filter implements feedback loop modify SLIC's termination impedance. handle complex impedances, resulting optimized return loss almost subscriber line conditions. similar manner, hybrid balance filter programmed optimal balance between transmit receive side minimum echoes. accurate adjustment gain receive transmit directions, four independently programmable filters vary level analog voice signal range Similar level control, SICOFI contains digital filters receive transmit directions, which allow modification frequency response characteristics. Further features attractive realization flexible exchange systems selectable coding, three-party conference support, supply voltage supervision, hardware software reset, power-down mode on-chip reference voltage. Different loopback modes enable both line board total system tested during operation. SICOFI hook directly virtually commercial SLIC, because flexible signaling interface consisting ports. Three dedicated status voice transmissions three receptions. remaining four programmed individually either transmit receive ports. fact that SICOFI needs extended control information, message-oriented protocol used byte transfer bus. bits each control byte used define three different classes commands, which contain information about configuration SICOFI, coefficient exchange number subsequently transmitted data bytes. frame direction, control byte transferred between SICOFI PBC. With appropriate commands, data written into read back from SICOFI. Selection SICOFIs connected port accomplished address feature control byte. programming device information usually transferred HDLC link PBC, programming also done means on-board microprocessor. There numerous good reasons why, world over, major attention given digital signal processing methods. Compared analog filtering, digital processing does need precision elements, allows much higher accuracy along with precisely predictable transmission behavior including noise. makes device less sensitive parameter fluctuations such drift with temperature aging and, moreover, provides excellent power supply rejection, better testability crosstalk behavior circuit. Semiconductor Group Overview Architecture Devices addition, technique allows better easier shrinking device implementation codec/filter functions more subscribers chip, which economic completely impossible with switched capacitor methods. next development stage produced Dual Channel Codec Filter (SICOFI-2) 2260 that performs functions SICOFI-1 2060 subscribers chip. sharing same digital signal processor part allows reduced size line leads reduced line-card costs. Moreover CMOS device programmed communicate either with (PBC/PIC) with IOM-2 (EPIC) compatible interface controller. shown with SICOFI approach, cost-saving programmable manner, allows realization functions which would very expensive impractical analog domain. Optimized Board Controller Concept Circuit Interface Controller 2050 (PCB) with HDLC controller 2052 (PIC) cost analog line cards with SICOFI 2055 (EPIC-1) device mixed ISDN/Analog systems 2056 (EPIC-2) cost EPIC Max. Subscriber analog ISDN analog ISDN Highways Mbit/s) HDLC Mbit/s) IOM-2/ (SLD) IOM-2 analog ISDN analog ISDN Mbit/s) Mbit/s) Semiconductor Group Overview Architecture Devices Optimal Solutions Every Application Semiconductor Group Overview Architecture Devices Mixed ISDN Analog Subscribers with EPIC® Semiconductor Group Overview Architecture Devices Advantages Siemens Semiconductor Analog Line Card Concept Advanced Signal Processing Codec Filter SICOFI family based technique. Matching different line conditions under complete software control (global line-card solution). Modular architecture (IOM-2/SLD compatible). Reduced line card wiring, line structure avoids cross wiring. Optimized board controller family. Cost optimized design/high volume production. Effective application support tools (hardware/software). Semiconductor Group Signal Processing Codec Filter (SICOFI®) Features 2060 CMOS Single chip codec filter Band limitation according CCITT recommendations Digital Signal Processing techniques Digital voice transmission encoded (A-law µ-law) linear complement) Programmable digital filters impedance matching transhybrid balancing gain frequency response correction Configurable three serial interface 512-kHz-SLD-Bus (e.g. 2050/52) burst mode with rates Mbit/s Programmable signaling interface peripherals (e.g. SLIC) High performance conversion Programmable analog gain Advanced test capabilities three digital loop back modes analog loop back modes chip tone generation trimming adjustments external components Variable clock selection Signaling expansion possible Prepared three-party conferencing Advanced power 2µCMOS technology Power supply Meets exceeds CCITT LSSGR recommendations P-LCC-28-R P-DIP-22 Type 2060-N 2060-P Version Ordering Code Q67100-H8393 Q67100-Z170 Package P-LCC-28-R (SMD) P-DIP-22 Semiconductor Group 03.92 2060 General Description Signal Processing Codec Filter (SICOFI) 2060 fully integrated codec (coder/decoder) transmit/receive filter fabricated advanced CMOS technology applications digital telecommunication systems. Based digital filter concept, 2060 provides improved transmission performance high flexibility. digital signal processing approach supports software controlled adjustment analog behavior, including attractive features such programmable transhybrid balancing, impedance matching, gain frequency response correction. Configuration (top view) P-LCC-28-R P-DIP-22 Semiconductor Group 2060 Definitions Functions P-LCC-28-R P-DIP-22 Symbol GNDA Input Function Output power supply power supply Ground analog, internally connected GNDD analog signals referred this Ground digital, internally connected GNDA digital signals referred this Analog voice input transmit path Analog voice output received digital voice Slave clock Frame synchronisation signal (direction signal) Serial interface port, bidirectional serial data port Reset input, forces SICOFI power down mode initializes configuration registers Test input, normally connected GNDD Clock selection (see Appendix Signaling inputs. Data present sampled transmitted serial interface Signaling outputs. Data received serial interface latched these outputs Programmable signaling pins. Each these pins declared input individually with adequate SICOFI status settings. SICOFIs connected serial interface, (high/low) assigns voice, control signaling bytes GNDD VOUT SCLK TEST Semiconductor Group 2060 SICOFI® Principles SICOFI codec filter solution highly digital approach utilizing advantages digital signal processing such excellent performance, high flexibility, easy testing, sensitivity fabrication temperature variations, problems with crosstalk power supply rejection. SICOFI® Signal Flow Graph Transmit Direction analog input signal converted, digitally filtered transmitted either PCM-encoded linear. Antialiasing done with order Sallen-Key prefilter (PREFI). Converter (ADC) modified slopeadaptive interpolative sigmadelta modulator with sampling rate kHz. Digital downsampling done subsequent decimation filters together with bandpass filter (BP). Receive Direction digital input signal received PCM-encoded linear, digitally filtered converted generate analog output signal. Digital interpolation done lowpass filter (LP) interpolation filters Converter (DAC) output order Sallen-Key postfilter (POFI). Programmable Functions high flexibility SICOFI based variety user programmable filters, which analog gain adjustment AGX, digital gain adjustment frequency response adjustment impedance matching filter transhybrid balancing filter Semiconductor Group 2060 Signaling SA.SD PREFI Interface SCLK Coeff. VOUT POFI ITB00635 SICOFI® Block Diagram SICOFI bridges between analog digital voice signal transmission modern telecommunication systems. High performance oversampling Analog-to-Digital Converter (ADC) Digital-to-Analog Converter (DAC) provide conversion accuracy required. analog antialiasing prefilter (PREFI) smoothing postfilter (POFI) included. dedicated chip Digital Signal Processor (DSP) handles algorithms necessary, e.g. bandpass filtering, sample rate conversion companding. three serial SLD-Bus interface handles digital voice transmission SICOFI feature control. Specific filter programming done downloading coefficients coefficient (CRAM). parallel Signaling Interface provides powerful line SLIC control. Semiconductor Group 2060 Serial Line Data Interface (SLD Interface) exchange data SLD-Bus based bidirectional, bitserial interface consisting three pins: SIP, SCLK. Data written read Serial Interface Port under control frame synchronization signal with period µs*). interface clock frequency supplied Slave CLock SCLK kHz*). rate serial data stream kbit/s, that bits each frame*). Starting with rising edge DIR, four bytes information transferred SLD-Bus SICOFI, followed four bytes from SICOFI SLD-Bus. (MSB) first transferred (LSB) last each byte. SLD-Bus Channel Channel Receive SICOFI Transmit SICOFI Signaling Signaling Signaling Channel Channel SLD-Bus Control Signaling Channel Channel Control Control Control Channel Channel Linear Voice Control Signaling Linear Voice Linear Voice SCLK Field (Linear Operating Mode) ITD00636 Byte Sequence Timing Serial Interface Port applications with other clock rates Appendix Semiconductor Group 2060 Programming message-orientated byte transfer used, fact that SICOFI needs extended control information. control byte frame direction transferred. With appropriate received commands, data written SICOFI read from SICOFI onto SLD-bus. Data transfer SICOFI starts with write command, followed bytes data. SICOFI responds read command with requested information, starting next transmission period. status modification data exchange required byte transferred (see Programming Procedure). Control Bytes 8-bit control bytes consist either commands, status information data. There three different classes SICOFI commands: OPERATION: status modification data exchange STATUS OPERATION: SICOFI status setting/monitoring COEFFICIENT OPERATION: filter coefficient setting/monitoring class command selected control byte shown below. extended SICOFI feature control facilities, SOP- COP-commands contain additional information. don't care Command status modification SICOFI control data exchange required, Operation Byte transferred. Semiconductor Group 2060 Command modify evaluate SICOFI status, contents four configuration registers CR1, CR2, transferred from SICOFI. This done SOPCommand (Status Operation Command). Address Information A-SICOFI addressed B-SICOFI addressed This evaluated SICOFIs connected SLD-port. SICOFI accessed, consistent with level (see Signaling Byte, Programming Procedure). Write SICOFI Read from SICOFI Enables reading from SICOFI writing information SICOFI. sets SICOFI power-up mode (operating) resets SICOFI power-down (standby mode) Read/Write Information Power Power Down (see also CR3) Three Party Conference received voice bytes channel channel added result filtered, converted transferred analog output VOUT (see also CR3). LSEL Length Select Information, identifies number subsequent data bytes (see also Programming Procedure) LSEL byte following LSEL following LSEL following LSEL CR4, CR3, following this case bits overwritten. Semiconductor Group 2060 Configuration Register This configuration register used enabling/disabling programmable digital filters accessing testmodes (TM1). Disable B-Filter B-Filter enabled B-Filter disabled Z-Filter disabled Z-Filter enabled X-Filter disabled X-Filter enabled R-Filter disabled R-Filter enabled GX-GR-Filter disabled GX-GR-Filter enabled Restore Z-Filter Restore X-Filter Restore R-Filter Restore GX-GR-Filter TEST MODES test mode Analog loop back Z-filter 1)1) Disable highpass filter (part bandpass receive path Initialize data with 0x0000 Digital loop back B-filter 1)2) Digital loop back PCM-register3) Other codes reserved future use. Output interpolation filter Value transfer function Z-filter (not programmable). Output pass decimation filter Value transfer function B-filter (not programmable). out. This testmode also available standby mode. Semiconductor Group 2060 Configuration Register first four bits this register, program four bidirectional signaling pins With SICOFIs SLD-port only used, always input this case indicates address SICOFI. A-SICOFI, B-SICOFI (see also SOP-command). Signaling Signaling Signaling Signaling output input output input output input output input expansion logic Expansion logic provided Signaling expansion logic only possible with SICOFI port (see also Signaling Byte) SICOFIs port SICOFI port SICOFI access SLD-Bus voice channel controlled Transmit (SICOFI SLD-Bus) SICOFI channel channel channel channel SICOFI channel channel Signaling Expansion Logic Address Mode Receive (SLD-Bus SICOFI) SICOFI channel channel channel channel SICOFI channel channel PCM-law B-Filter Coefficients A-law µ-law (µ255 PCM) Programmed coefficients Fixed coefficients SICOFI transmits same byte channel Three Party Conference. Semiconductor Group 2060 Configuration Register Analog Gain Control Transmit-Path 6.03 amplification 12.06 amplification amplification Analog Gain Control Receive-Path 6.03 attenuation 12.06 attenuation attenuation Power Power Down1) Power Down (standby) Power (operating) Three Party Conference/Reverse Operating Mode (see CR2)1) Linear Operating Mode (see Serial Interface) mode Linear mode Linear mode (Change linear mode becomes valid next DIR-cycle). bits also overwritten Command with LSEL part Command). With LSEL bits Command ignored. Subsequent SOP/COP-read Command control signaling information transmitted instead linear voice. Semiconductor Group 2060 Configuration Register TEST MODES test mode Additional digital gain transmit direction (GX) Additional digital gain transmit direction (GX) Enable chip tone generation1) analog loop back2) TEST MODES test mode Digital loop back analog port (VIN VOUT) Other codes reserved future use. With R-filter disabled kHz, dBm0 sinusoidal signal input receive Lowpass Filter (other frequencies Appendix output X-filter input R-filter kHz, linear). Semiconductor Group 2060 Command With Command coefficients programmable filters written SICOFI coefficient transmitted SLD-bus verification. Address A-SICOFI addressed Information B-SICOFI addressed This evaluated with SICOFIs SLD-port only. With SICOFIs port, SICOFI identified, consistent with level (see Signaling Byte, Programming Procedure). Read/Write Write SICOFI Information Read from SICOFI This indicates whether filter coefficients written SICOFI read from SICOFI. CODE B-Filter coefficients part B-Filter coefficients part Z-Filter coefficients B-Filter delay coefficients X-Filter coefficients R-Filter coefficients GR-Filter coefficients*) (followed bytes data) (followed bytes data) (followed bytes data) (followed bytes data) (followed bytes data) (followed bytes data) (followed bytes data) Other codes reserved future use. range gain adjustment possible steps 0.25 Semiconductor Group 2060 Signaling Byte signaling interface SICOFI consists pins. transmit signaling inputs: SI1, receive signaling outputs: SO1, bidirectional programmable signaling pins: Data present possibly some programmed inputs) sampled transferred serially onto SLD-bus. Data received serially from SLD-Bus latched possibly some programmed output. signaling field format generally: receive direction: transmit direction: where signaling expansion CR2. different cases possible, signaling byte format Receive Signaling Byte Case A-SIC B-SIC A-SIC B-SIC Transmit Signaling Byte high impedance, don't care Semiconductor Group 2060 Cases SICOFI connected port, signaling expansion logic provided); programmed transmit signaling inputs. SICOFI connected port, (signaling expansion logic provided); programmed transmit signaling inputs. SICOFI connected port; signaling expansion logic provided); programmed receive signaling outputs. SICOFI connected port; (signaling expansion logic provided); programmed receive signaling outputs. signaling expansion logic provided (see case signaling bits which programmed signaling inputs outputs used additional expansion bits receive transmit direction, respectively. SICOFI concerned, high-impedance state "don't care" state while these bits transferred. SICOFIs connected port; programmed transmit signaling input. SICOFIs connected port; programmed receive signaling output. SICOFIs connected port, signaling expansion logic possible. programmed input automatically, defines addressed SICOFI: A-SICOFI B-SICOFI. usable with SICOFIs port. Semiconductor Group 2060 Programming Procedure following table shows some control byte sequences. SICOFI configured completely during initialization, bytes will transferred. Receive Transmit Receive Transmit Receive Transmit Receive Transmit Receive Transmit Receive ITD02445 Operation Write LSEL LSEL LSEL LSEL Read LSEL LSEL LSEL LSEL Write Bytes Bytes Read Bytes Bytes don't care DB1, coefficient Data Byte Semiconductor Group 2060 Operating Modes Basic Setting Upon initial application reseting while operating, SICOFI enters basic setting mode. Basic setting means, that SICOFI configuration registers initialized. bits (all programmable filters disabled except BFilter where fixed coefficients used, test mode); inputs, signaling expansion logic provided, SICOFI SLD-port, µ-law chosen fixed BFilter coefficients used). bits reset additional amplification attenuation, linear mode, power down, test mode). Receive signaling registers cleared. high-impedance state, analog output VOUT receive signaling outputs forced ground. serial interface active receive commands starting with next 8-kHz SLD-Bus frame. serial interface port remains high-impedance state until been defined. SICOFIs connected port, both SICOFI's same information during initialization. subsequent byte assigned addressed SICOFI only. SICOFI's need different information, SOP-CR2 sequence provided once again (each SICOFI knows address now). voltage applied input before initial application VDD, SICOFI enter Basic Setting Mode. this case necessary either reset SICOFI initialize configuration registers CR1, CR2, CR3, CR4. Standby Mode Upon reception command load from basic setting, SICOFI enters standby mode (basic setting replaced individual CR2). Being operating mode, SICOFI reset standby mode with Power-Up SOP-command directly). serial interface active receive transmit commands data. Operating Mode From standby mode, operating mode entered upon recognition Power-Up SOP-command directly). Semiconductor Group 2060 Transmission Characteristics target figures this specification based subscriber-line board requirements. proper adjustment programmable filters (transhybrid balancing: impedance matching: frequency-response correction: needs complete knowledge SICOFIs analog environment. Unless otherwise stated, transmission characteristics guaranteed within test condition below. GNDA GNDD H(Z) H(B) H(X) H(R) 6.03, 12.06, 6.03, 12.06, 1000 dBm0; A-law µ-law; dBm0 signal equivalent 1.5763 [1.5710] Vrms. 3.14 [3.17] dBm0 signal equivalent 2.263 Vrms which corresponds overload point (A-law, [µ-law]). Parameter Gain (either value)1) Gain absolute (AGR 0-70 Gain absolute (AGR 0-70 Total harmonic distortion, dBm0; 3400 Intermodulation f22) f23) Symbol min. Limit Values typ. max. Unit 0.06 0.10 Crosstalk dBm0; 3400 Transmit receive Receive transmit Idle channel noise, transmit, psophometric, A-law transmit, C-message, µ-law receive, psophometric, A-law receive, C-message, µ-law idle code idle code 67.4 17.5 dBm0p dBrnc dBm0p dBrnc causes additional attenuation range between Equal input levels range between dBm0 dBm0; different frequencies range between 3400 Input level dBm0, frequency range 3400 dBm0, Semiconductor Group 2060 Attenuation Distortion Attenuation deviations stay within limits figures below. ITD00637 Attenuation -0.125 -0.5 -1.0 0.650 0.125 Receive: Reference frequency kHz, input signal level dBm0 Transmit: Reference frequency kHz, input signal level dBm0 Semiconductor Group 2060 Group Delay Maximum delays operating SICOFI with H(B) H(Z) H(R) H(X) including delay through A/D- converters. Specific filter programming cause additional group delays. Group delay deviations stay within limits figures below. Group Delay Absolute Values: Input signal level dBm0 Parameter Transmit Delay Receive Delay Symbol min. Limit Values typ. max. Unit Test Condition ITD00639 Group Delay Distortion: Input signal level dBm0, reference frequency Semiconductor Group 2060 Out-of-Band Signals Analog Input With out-of-band sine wave signal with frequency level applied analog input, level resulting frequency component digital output will stay least below level ITD00640 Attenuation ITD00641 Attenuation 0.06 Out-of-Band Signals Analog Output With dBm0 sine wave frequency applied digital input, level resulting out-of-band signal analog output will stay least below dBm0, sine wave reference signal analog output. ITD00642 Attenuation Semiconductor Group 2060 Gain Tracking (Receive Transmit) gain deviations stay within limits figures below ITD00643 -0.5 0.25 0.25 -1.0 dBm0 Input Level Gain Tracking: Measured with noise signal according CCITT recommendations, reference level dBm0, ITD00644 -0.2 -0.5 -1.4 dBm0 Input Level 0.25 -0.25 Gain Tracking: Measured with sine wave range 1100 reference level dBm0, Semiconductor Group 2060 Total Distortion signal-to-distortion ratio exceeds limits following figures. ITD00645 36.0 29.7 36.7 34.3 28.4 14.7 Input Level dBm0 Receive: Measured with noise signal according CCITT recommendations ITD00646 35.4 33.3 28.7 36.3 27.4 13.7 dBm0 Input Level Transmit: Measured with noise signal according CCITT recommendations Semiconductor Group 2060 signal distortion ratio exceeds limits following figures. ITD00647 35.5 31.0 27.0 24.5 29.5 36.4 Input Level dBm0 Receive Transmit: Measured with sine wave range 1100 excluding submultiples Signal Total Distortion CCITT Noise Signal Digital-Digital (A-law µ-law) Parameter Input Level Unit Digital Loop Back B-Filter Digital Loop Back Analog port dBm0 dBm0 dBm0 dBm0 Total Distortion min. Unit Semiconductor Group 2060 Transhybrid Loss quality transhybrid-balancing very sensitive deviations gain group delay deviations inherent SICOFI A/D- D/A-converters well external components used line card (SLIC, OP's etc.) SICOFI transhybrid loss measured following way: sine wave signal with level dBm0 frequency range 3400 applied digital input. resulting analog output signal VOUT directly connected VIN, e.g. with SICOFI testmode "Digital Loop Back Analog Port" (see CR4). programmable filters disabled, balancing filter enabled with coefficients optimized this configuration (VOUT VIN). resulting echo measured digital output least below level digital input signal shown table below. B-filter coefficients recommended transhybrid loss measurement with COP-Write B-filter part B-filter part B-filter delay (83) (8B) (98) Coefficients Parameter Transhybrid loss Transhybrid loss 2500 Transhybrid loss 3000 Transhybrid loss Transhybrid loss 2500 Transhybrid loss 3000 Transhybrid loss Transhybrid loss 2500 Transhybrid loss 3000 Symbol THL500 THL2500 THL3000 THL500 THL2500 THL3000 THL500 THL2500 THL3000 Limit Values min. typ. Unit Test Condition 6.03, 12.06, 14.00 Semiconductor Group 2060 Absolute Maximum Ratings Parameter referred GNDD referred GNDD GNDA GNDD Analog input output voltage referred referred digital input voltages referred GNDD referred GNDD input output current input output Storage temperature Ambient temperature under bias Power dissipation Symbol Limit Values min. 10.3 max. 10.3 Unit Operating Range GNDD GNDA Parameter supply current stand operating supply current stand operating Power supply rejection either supply/direction) Power dissipation stand Power dissipation operating Symbol min. PSRR mVrms ripple Limit Values typ. max. Unit Test Condition Semiconductor Group 2060 Electrical Characteristics Digital Interface GNDD GNDA Parameter L-input voltage H-input voltage L-output voltage H-output voltage Input leakage current Symbol Limit Values min. 0.45 max. Unit Test Condition Analog Interface GNDD GNDA Parameter Analog input resistance Analog output resistance Input offset voltage Output offset voltage Input voltage range Output voltage range Symbol Limit Values min. Unit Test Condition max. Semiconductor Group 2060 SCLK SCLK DIRxS DIRxH SCLK DINxS Data Data SCLK DINxH dOUT dDHZ High Imp. ITT00649 Interface Timing (SLD-Bus) Switching Characteristics Parameter Period SCLK Duty cycle Period setup time hold time data setup time data hold time data delay data high impedance delay SCLK dDOUT dDHZ Symbol min. SCLK Limit Values typ. 1/512 Unit max. Semiconductor Group 2060 SCLK Data Last Signaling dSIG Data Last Control dSIGZ INxS Data INxH Last Control First Signaling ITD02446 Signaling Interface Timing Switching Characteristics Parameter Delay signaling SCLK1) Delay signaling high impedance SCLK setup time2) hold time2) Reset pulse width3) Symbol min. dSIGOUT dSIGZ SIGIN SIGIN Limit Values typ. max. Unit Pins SO3; Pins output Pins SI3; Pins input SICOFI ready accept SOP/COP commands next Cycle. Spikes shorter than will ignored. Semiconductor Group 2060 Appendix Specific Interface Types SICOFI used with three different SLD-bus type interfaces. specific interface type selected with three pins: TEST, PLL. TEST SCLK MCLK Data ITD00651 4096 SLD-Bus Interface1) TEST SI3*) cannot used Signaling SCLK MCLK Data ITD00652 SLD-Bus Interface with Variable Clock Frequencies 4096-kHz Masterclock MCLK generated from 512-kHz SCLK chip Maximum MCLK-frequency Semiconductor Group 2060 TEST SI3*) cannot used Signaling SCLK MCLK Data ITD00653 Burst Mode Interface1) Maximum MCLK-frequency Semiconductor Group 2060 burst-mode 16-bit bursts received transmitted, depending linear mode selected (see field CR3). Field Field Field Voice Voice Control Signaling Voice Voice Control Signaling Detail ITD00654 SCLK Field Field Field Voice Voice Linear Voice ITD00655 Detail voice control voice signaling 15-8 linear output linear output Semiconductor Group 2060 Appendix Chip Tone Generation setting field '100' on-chip tone generator activated with fixed frequency kHz. frequency fTONE programmed R-filter coefficients (Rfilter enabled) range kHz. gain adjusted with programmable GRfilter. trapezoidal tone generation algorithm used, provides harmonic distortion better than Calculation R-filter Coefficients: fTONE 8192 INC/f MCLK with MCLK, TONE [kHz] 2-EXPR1 2-EXPR2 2-EXPR3 (.(.(1 2-EXPR9).)) SIGN, EXPONENT ITD00656 FIND EXPi: 2-EXPi) MIN; EXPi 2-EXPi) +1)/2), BIN(EXPi) transferred SICOFI) NEXT Programming Byte Sequence Selected Frequencies Coefficients write*) Frequency 2000 1000 1209 1336 1477 1633 2B/AB 2B/AB 2B/AB 2B/AB 2B/AB 2B/AB 2B/AB 2B/AB 2B/AB 2B/AB 2B/AB don't care SICOFI SICOFI Semiconductor Group Dual Channel Codec Filter (SICOFI®-2) 2260 2260 CMOS Features Dual channel single chip codec filter Band limitation according CCITT AT&T recommendations Digital signal processing techniques encoded digital voice transmission (A-law µ-law) Programmable digital filters impedance matching transhybrid balancing gain frequency response correction digital Interfaces three serial Interface (eg. 2050/52) four serial IOM®-2 Interface with different clock-frequencies time-slot assignment (e.g. 2055/56) P-LCC-28-R Programmable signaling interface peripherals (e.g. SLIC) High performance conversion Programmable analog gain adjustment Advanced test capabilities three digital loop back modes analog loop back modes programmable tone generators trimming adjustments external components Advanced power 2µCMOS technology Power supply Meets exceeds CCITT LSSGR recommendations types available: 2260 with standard temperature range 0.70oC 2260 with extended temperature range -40.85oC Type 2260-N 2260-N Version Ordering Code Q67100-H6191 Q67100-H6261 Package P-LCC-28-R (SMD) P-LCC-28-R (SMD) Semiconductor Group 03.92 2260 2260 General Description Dual Channel Codec Filter 2260 (SICOFI®-2) fully integrated codec filter fabricated power 2µCMOS technology applications digital communication systems. Based advanced digital filter concept, 2260 provides excellent transmission performance high flexibility. digital signal processing approach includes attractive programmable features such transhybrid balancing, impedance matching, gain frequency response correction. Configuration Mode (top view) Configuration IOM®-2 Mode (top view) Semiconductor Group 2260 2260 Definitions Functions Interface Mode Symbol GNDD Input Output Function power supply power supply Ground digital. internally connected GNDA GNDB. digital signals referred this Ground analog channel internally connected GNDD GNDB. channel analog signals referred this Ground analog channel internally connected GNDD GNDA. channel analog signals referred this Channel analog voice input Channel analog voice output Channel analog voice input Channel analog voice output Operating mode selection, IOM-2 Interface: connected interface mode Slave clock, Direction Signal, 8-kHz frame synchronisation Serial interface port, bidirectional serial data port Reset input, forces SICOFI-2 basic setting mode GNDA GNDB VINA VOUTA VINB VOUTB MODE SCLK SI1A SI2A SI3A SI1B SI2B SI3B Signaling inputs: data present SI1A SI3B sampled transmitted serial interface Semiconductor Group 2260 2260 Definitions Functions Interface Mode (continued) Symbol SO1A SO2A SO3A SO1B SO2B SO3B Input Output Bidirectional signaling pins: SBA, pins programmed input output individually with adequate SICOFI-2 status settings Signaling outputs: data received serial interface latched SO1A SO3B Function Definitions Functions IOM®2 Interface Mode Symbol GNDD Input Output Function power supply power supply Ground digital. internally connected GNDA GNDB. digital signals referred this Ground analog channel internally connected GNDD GNDB. channel analog signals referred this Ground analog channel internally connected GNDD GNDA. channel analog signals referred this Channel analog voice input Channel analog voice output Channel analog voice input Channel analog voice output Operating mode selection, IOM-2 Interface: connected IOM-2 interface mode GNDA GNDB VINA VOUTA VINB VOUTB MODE Semiconductor Group 2260 2260 Definitions Functions IOM®2 Interface Mode (continued) Symbol CI1A CI2A CI1B CI2B Input Output Time-slot selection pins with ternary logic Bidirectional command/indication pins: CI1A CI2B programmed input output individually with adequate SICOFI-2 status settings Command outputs: data received serial interface latched Function Data clock, 4096 Frame synchronisation clock, Data upstream Data downstream Reset input, forces SICOFI-2 basic setting mode Indication inputs: data present sampled transmitted serial interface Semiconductor Group 2260 2260 SICOFI®-2 Principles SICOFI-2 codec filter solution highly digital approach utilizing advantages digital signal processing such excellent performance, high flexibility, easy testing, sensitivity fabrication temperature variations, problems with crosstalk power supply rejection. PREFI Comp PCMOUT Transmit Receive VOUT POFI PCMIN ITS02447 SICOFI®-2 Signal Flow Graph (for either channel) Transmit Direction analog input signal converted, digitally filtered transmitted PCM-encoded. Antialiasing done with order Sallen-Key prefilter (PREFI). Converter (ADC) modified slopeadaptive interpolative sigma-delta modulator with sampling rate kHz. Digital downsampling done subsequent decimation filters together with transmit lowpass filter (LPX). Receive Direction digital input signal received PCM-encoded, digitally filtered converted generate analog output signal. Digital interpolation done receive lowpass filter (LPR) interpolation filters Converter (DAC) output order Sallen-Key postfilter (POFI). Programmable Functions high flexibility SICOFI-2 based variety user programmable filters, which analog gain adjustment AGX, digital gain adjustment frequency response adjustment impedance matching filter transhybrid balancing filter Semiconductor Group 2260 2260 SLIC-Interface DIR/FSC Channel VOUT POFI Channel VOUT POFI ITB00659 PREFI SLD/ Interface SCL/DCL SIP/DU PREFI Coeff. SICOFI®-2 Block Diagram SICOFI-2 bridges between analog digital voice signal transmission modern telecommunication systems. High performance oversampling Analog-to-Digital Converters (ADC) Digital-to-Analog Converters (DAC) provide conversion accuracy required. Analog antialiasing prefilters (PREFI) smoothing postfilters (POFI) included. dedicated chip Digital Signal Processor (DSP) handles algorithms necessary, e.g. bandpass filtering, sample rate conversion companding. IOM-2 Interface handles digital voice transmission, SICOFI-2 feature control access SICOFI-2 signaling pins. Specific filter programming done downloading coefficients coefficient (CRAM). Semiconductor Group 2260 2260 SICOFI®-2 Digital Interfaces SICOFI-2 digital interface section consists serial interface which configured compatible IOM-2 standard (with different data clock frequencies), powerful signaling interface. Selecting between IOM-2 interfacing mode simply performed strapping MODE pin. MODE Interface MODE IOM-2 Interface better understanding, names quoted with their interface specific name. E.g. SIP/DU: interface mode, IOM-2 interface mode. Interface serial interface consists bidirectional SIP, data clock input SCLK, synchronization input DIR. Data bits loaded read serial interface SIP. Bits clocked falling edge clocked rising edge slave clock SCLK (512 kHz). SCLK inputs must phase locked. frame lasts consists bits transferred SICOFI-2 followed bits transferred from SICOFI2 bus. interface thus provides full duplex kbit/s communication channel. This channel subdivided kbit/s voice/data channels, kbit/s feature control channel other kbit/s signaling channel direction. Bytes channels serialized first. SCLK Channel Receive Channel SICOFI Control Signaling Channel Transmit SICOFI Channel Control Signaling SCLK ITD02448 Semiconductor Group 2260 2260 IOM®-2 Interface IOM-2 interface consists data lines clock lines. (data upstream) carries data from SICOFI-2 master device. (data downstream) carries data from master device SICOFI-2. (frame synchronization clock) signal well 4096 (data clock) signal supplied. SICOFI-2 implements functions analogue devices described IOM-2 specification. Detail MONITOR Data MONITOR Data ITD02449 IOM®-2 Interface, (one channel frame) 4096 Detail Detail ITD02450 IOM®-2 Interface, 4096 (eight channels frame) Semiconductor Group 2260 2260 DD/DU ITD02451 Detail MONITOR Data MONITOR Data ITD02452 Detail Semiconductor Group 2260 2260 With frequency 4096 assignment time slots possible. IOM-2 operating mode time-slot selection completely pin-strapping pins TS2, which work with ternary logic [N], [P]). IoM-2 Operating Mode IOM-2, IOM-2, 4096 kHz, time slot IOM-2, 4096 kHz, time slot IOM-2, 4096 kHz, time slot IOM-2, 4096 kHz, time slot IOM-2, 4096 kHz, time slot IOM-2, 4096 kHz, time slot IOM-2, 4096 kHz, time slot IOM-2, 4096 kHz, time slot IOM®-2 MONITOR Channel Data Structure MONITOR channel used transfer maintenance information between functional blocks. MONITOR control bits direction, data transferred complete handshake procedure. messages transmitted MONITOR channel have different kinds data structures. Therefore, first byte message used indicate structure following data. Messages from SICOFI-2 started with following byte: Thus providing information analog lines, SICOFI-2 device IOM-2 channel. MONITOR data specific analog channel selected SICOFI-2 specific command following. more details IOM-2 MONITOR channel data structure, IOM-2 specific identification command Appendix Semiconductor Group 2260 2260 Programming message oriented byte transfer used, fact that SICOFI-2 needs extended control information. With appropriate commands, data written SICOFI-2 read from SICOFI-2 IOM-2 interface monitor channel. Data transfer SICOFI-2 starts with write command, followed bytes data. SICOFI-2 responds read command with requested information, that bytes data. (see Programming procedure). same command structure used both IOM-2 interface mode. SICOFI2 operating IOM-2 interface mode, command sequence starts with SICOFI-2 specific address-byte. following command same IOM-2 mode. command requests answer, mode SICOFI-2 will start immediately (next transmission period) with requested data. IOM-2 mode SICOFI-2 specific address byte will sent first, followed requested data. Attention: IOM-2 mode, each byte monitor channel, sent twice least. Example programming sequence IOM-2 interface mode: Interface Receive SOP-Write SOP-Read Transmit Receive Address SOP-Write SOP-Read Address IOM-2 Interface Transmit Semiconductor Group 2260 2260 Control Bytes 8-bit control bytes consist either commands, status information data. There three different classes SICOFI-2 commands: OPERATION: STATUS OPERATION: COEFFICIENT OPERATION: status modification data exchange SICOFI-2 status setting/monitoring filter coefficient setting/monitoring class command selected control byte shown below. don't care extended SICOFI-2 feature control facilities, commands contain additional information programming verifying SICOFI-2. Programmable Devices configuration registers channel: coefficient channel: common configuration register: CR1, CR2, CRAM only available IOM-2 mode contents valid both channels obtain more clarity, fields containing different informations IOM-2 interface high lighted subsequent chapters. Semiconductor Group 2260 2260 Command status modification SICOFI-2 required, operation byte transferred. receive, useful IOM-2 interface mode transmit, only available interface mode VERSION VERSION channel power-down mode channel power-up mode channel power-down mode channel power-up mode Four SICOFI-2 version identification VERSION 1111 PEB2260 V1.X, V2.0 Semiconductor Group 2260 2260 Command modify evaluate SICOFI-2 status, contents three (four) configuration registers CR1, CR2, (and CR4) transferred from SICOFI-2. This done SOP-Command (status operation command). interface mode three configuration registers channel accessible. SICOFI-2 operating with IOM-2 interface additional fourth configuration register (CR4) written read. Address Information channel addressed with this command channel addressed with this command Read/Write Information: Enables reading from SICOFI-2 writing information SICOFI-2. Write SICOFI-2 Read from SICOFI-2 Power Up/Power Down sets assigned channel (see SICOFI-2 power-up mode (operating) resets assigned channel SICOFI-2 power-down (standby mode) Reset SICOFI-2 forces SICOFI-2 enter Basic Setting Mode (see Operating Modes). LSEL Length select information (see also Programming Procedure) This field identifies number subsequent data bytes LSEL byte following LSEL following LSEL following LSEL CR3, following interface mode CR4*), CR3, CR2, following IOM-2 interface mode Commands concerning independent command. Semiconductor Group 2260 2260 Configuration Register Configuration register defines basic SICOFI-2 settings, which are: enabling/disabling programmable digital filters, programming signaling pins, selection companding characteristics. SB/C3A Enable filter Enable filter Enable filter Enable filter Enable filter Enable filter filter disabled, H(B) filter enabled filter disabled, H(Z) filter enabled filter disabled, H(X) filter enabled filter disabled, H(R) filter enabled filter disabled, H(GR) filter enabled filter disabled, H(GX) filter enabled SB/C3A Interface mode: program bidirectional signaling programmable signaling input programmable signaling output IOM-2 interface mode: operation mode C3A*) programmed command output detector select output (see CR4) selection (µ255 PCM) SB/C3A Setting either channel forces detector select output. Semiconductor Group 2260 2260 Configuration Register Configuration register sets analog gain control enables on-chip tone- generators. IOM-2 operating mode bidirectional command/indication pins controlled. 0/CI1 O/CI2 Analog gain control receive-path attenuation 11.95 attenuation 13.9 attenuation Analog gain control transmit-path amplification 11.95 amplification 13.9 amplification Enable chip tone generation With R-filter disabled kHz, dBm0 sinusoidal signal input receive lowpass filter Frequency gain set, programming GR-filter. chip tone generator disabled chip tone generator enabled Enable chip tone generation With R-filter disabled kHz, dBm0 sinusoidal signal input receive lowpass filter Frequency gain set, programming GR-filter. chip tone generator disabled chip tone generator enabled Interface mode: this reserved future IOM-2 Interface mode: Command/indication CI1A CI1B Programmable signaling CI1x indication input Programmable signaling CI1x command output Interface mode: this reserved future IOM-2 Interface mode: Command/indication CI2A CI2B Programmable signaling CI2x indication input Programmable signaling CI2x command output 0/CI1 0/CI1 0/CI2 0/CI2 Semiconductor Group 2260 2260 Configuration Register This register accessing testmodes only Swap channels1) VOUTA VINA assigned SLD/IOM-2 channel VOUTB VINB assigned SLD/IOM-2 channel VOUTA VINA assigned SLD/IOM-2 channel VOUTB VINB assigned SLD/IOM-2 channel Disable transmit highpass Highpass enabled Highpass disabled receive path (analog voice output VOUTA VOUTB '0') receivepath enabled Analog voice output Disable transmit signaling1) Transmission signaling/indication data SIP/DU) enabled Transmission signaling/indication data SIP/DU) disabled. SIP/DU high impedance state. Analog loop back2) analog loop back established Analog loop back Z-filter. H(Z) Z-filter disabled analog loop back (via kHz, linear) Digital loop back digital loop back established Digital loop back PCM-register (via kHz, PCM) Digital loop back B-filter (via kHz), H(B) B-filter disabled Digital loop back analog port (VIN VOUT) Setting bits SWP, either channel enables function. other codes reserved future use. Semiconductor Group 2260 2260 Configuration Register (available IOM®-2 interface mode only) Register configures data-upstream command/indication channel. content valid both channels Upstream Update Interval restrict rate upstream C/I-bit changes, persistance checking status information from SLIC applied. status information will transmitted upstream, after been stable milliseconds. programmable range steps with persistance checking disabled. Field Update Interval Time Persistance checking disabled Upstream transmission after Upstream transmission after Upstream transmission after Upstream transmission after Semiconductor Group 2260 2260 Detector Select Sampling Interval SLICs with multiplexed loop- ground-key-status, which have single status output carrying loop- ground-key-status information, need special detector select input SLIC Detector Select Control Indication Upstream Loop/GND Input from SLIC CI2A SLIC-A SLIC-B Programmable Loop/GND Input from SLIC CI2B SICOFI Connection available with 512-kHz Interface only ITS02453 Semiconductor Group 2260 2260 SICOFI-2 programmed detector select output CR1. This command output normally logical '0', such that SLIC outputs loop status, which passed C/I-bits indication pins I1B. Every microseconds, detector select output changes logical time 15.63 During this time ground status read from SLIC transferred upstream using C/I-bits indication pins I1B. time interval programmable from 1.875 steps. possible program output permanently logical '1'. Field Time Interval Between Detector Select High States Detector select output programmed permanently Time interval Time interval Time interval 1.875 Detector select output programmed permanently Semiconductor Group 2260 2260 Command With Command coefficients programmable filters written SICOFI-2 coefficient transmitted IOM-2 interface verification CODE Address information channel addressed with this command channel addressed with this command Read/write information This indicates whether filter coefficients written SICOFI-2 read from SICOFI-2. Write SICOFI-2 Read from SICOFI-2 CODE B-Filter coefficients part B-Filter coefficients part Z-Filter coefficients B-Filter delay coefficients X-Filter coefficients R-Filter coefficients GX-Filter coefficients GR-Filter coefficients (followed bytes data) (followed bytes data) (followed bytes data) (followed bytes data) (followed bytes data) (followed bytes data) (followed bytes data)*) (followed bytes data)*) other codes reserved future use. range gain adjustment possible steps 0.25 Semiconductor Group 2260 2260 SLIC Interface connection between SICOFI-2 SLIC performed SICOFI-2 signaling command/indication pins. interface mode, receive signaling byte transferred signaling output pins. Data present signaling input pins transferred transmit signaling byte. Operating SICOFI-2 with IOM-2 interface, data received from downstream byte transferred command output pins C/I). Data input pins C/I) transferred upstream I-byte. Interface Signaling Byte SICOFI-2 offers parallel signaling interface channel. Channel SI1A, SI2A, SI3A SO1A, SO2A, SO3A SI1B, SI2B, SI3B SO1B, SO2B, SO3B signaling input pins signaling output pins programmable bidirectional signaling pin. signaling input pins signaling output pins programmable bidirectional signaling pin. Channel Data present SI1A SI3B SBA, programmed input) sampled transferred bus. Data received from latched SO1A SO3B SBA, programmed output). Signaling byte format receive direction: SBB1) SO3B SO2B SO1B SBA1) SO3A SO2A SO1A Signaling byte format transmit direction: SBB2) SI3B SI2B SI1B SBA2) SI3A SI2A SI1A Don't care, programmed input (see CR1). '0', programmed output (see CR1). Semiconductor Group 2260 2260 four possible cases signaling byte format listed below. Case Receive Signaling Byte SO3B SO3B SO3B SO3B SO2B SO2B SO2B SO2B SO1B SO1B SO1B SO1B SO3A SO3A SO3A SO3A SO2A SO2A SO2A SO2A SO1A SO1A SO1A SO1A don't care Case Case Case Case Case Transmit Signaling Byte SI3B SI3B SI3B SI3B SI2B SI2B SI2B SI2B SI1B SI1B SI1B SI1B SI3A SI3A SI3A SI3A SI2A SI2A SI2A SI2A SI1A SI1A SI1A SI1A programmed signaling outputs programmed output, programmed signaling input programmed output, programmed signaling input programmed signaling inputs IOM®-2 Interface Command/Indication Byte SICOFI-2 offers parallel command/indication SLIC interface Indication input pins: Command output pins: C1A, C1B, CI1A, CI2A CI1B, CI2B (associated with channel (associated with channel (associated with channel (associated with channel (associated with channel (associated with channel Programmable command/indication pins: Data present I1A, CI1A CI2B programmed input) sampled transferred upstream. Data received downstream from IOM-2 interface latched CI1A CI2B programmed output). Semiconductor Group 2260 2260 Data-downstream channel byte format (receive): C3A2) CI2A/B1) CI1A/B1) C2A/B C1A/B data-downstream direction, field split into address data-word. Depending bit, data transmitted pins associated channel channel either case. Data-upstream channel byte format (transmit): CI2B3) CI1B3) CI2A3) CI1A3) data-upstream direction, field partioned fields. three bits contain command/indication data associated with analogue channel. Typical examples byte listed below. Case don't care Data-Downstream (Receive) Byte CI2A/B4) CI2A/B4) CI1A/B4) CI1A/B4) C2A/B4) C2A/B4) C2A/B4) C2A/B4) C1A/B4) C1A/B4) C1A/B4) C1A/B4) Case Case Case Case Case Data-Upstream (Transmit) Byte CI2B CI2B CI1B CI1B CI2A CI2A CI1A CI1A CI2A/B CI1A/B programmed command outputs CI2A/B programmed output, CI1A/B programmed indication input CI2A/B programmed input, CI1A/B programmed command output CI2A/B CI1A/B programmed indication inputs Don't care, programmed input (see CR2) Don't care, programmed detector select output (see CR1) '0', programmed output (see CR2) Semiconductor Group 2260 2260 Interface Programming Procedure following table shows typical control byte sequences. SICOFI-2 configured completely during initialization, bytes will transferred. Receive Transmit Receive Transmit Receive Transmit Receive Transmit Receive Transmit Receive ITD02445 Operation Write LSEL LSEL LSEL LSEL Read LSEL LSEL LSEL LSEL Write Bytes Bytes Read Bytes Bytes coefficient data byte don't care Semiconductor Group 2260 2260 IOM®-2 Interface Programming Procedure Example typical IOM-2 interface programming procedure, consisting identification request answer, write command with four byte following, read verify programming. Frame Monitor IDRQT IDANS Address Data Down MR/MX Data MR/MX Monitor 11111111 IDRQT.1stbyte IDRQT.1stbyte IDRQT.2ndbyte IDRQT.2ndbyte 11111111 11111111 11111111 11111111 11111111 11111111 Address Address Write Write Read Read 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 IDANS.1stbyte IDANS.1stbyte IDANS.2ndbyte IDANS.2ndbyte 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 Address Address 11111111 identification request (80H, 00H) answer identification request (80H, 80H) SICOFI-2 specific address byte (81H) Data for/of configuration register Semiconductor Group 2260 2260 Operating Modes Basic Setting Mode Upon initial application resetting during operation, software-reset (see Command), SICOFI-2 enters basic setting mode. Basic setting means, that SICOFI-2 configuration registers initialized both channel programmable filters disabled, A-law chosen, programmable signaling command/indication pins inputs. Analog gains amplification attenuation respectively. tone-generators well testmodes disabled. There persistance checking programmed command output IOM-2 mode selected. Receive signaling registers cleared. SIP/DU high impedance state, analog outputs VOUTA VOUTB receive signaling outputs forced ground. serial IOM-2 interface ready receive commands, starting with next frame. interface mode serial interface port remains high impedance state, until reception valid command. voltage applied input-pin before initial application VDD, SICOFI-2 enter basic setting mode. this case necessary reset SICOFI-2 initialize SICOFI-2 configuration registers '0'. Standby Mode SICOFI-2 forced standby mode with power-down command SOP-byte. Both channels must programmed separately. During standby mode serial SICOFI-2 interface ready receive transmit commands data. Operating Mode operating mode channels entered upon recognition power-up command specific channel. Semiconductor Group 2260 2260 Transmission Characteristics target figures this specification based subscriber-line board requirements. proper adjustment programmable filters (transhybrid balancing, impedance matching, frequency-response correction) needs complete knowledge SICOFI-2's analog environment. Unless otherwise stated, transmission characteristics guaranteed within test condition below. (PEB 2260); (PEF 2260); GNDA GNDB GNDD H(Z) H(B) H(X) H(R) 6.00, 11.95, 13.90 6.00, 11.95, 13.90 1000 dBm0; A-law µ-law; dBm0 signal equivalent 1.5763 [1.5710] Vrms. 3.14 [3.17] dBm0 signal equivalent 2.263 Vrms which corresponds overload point (A-law, [µ-law]). Parameter Symbol min. Gain (either value)1) Gain absolute (AGR Gain absolute (AGR 13.9o 13.90 Total harmonic distortion, dBm0, 1000 2nd, order Intermodulation f22) f23) Limit Values typ. max. Unit 0.20 0.06 0.20 0.30 0.30 0.40 0.40 Crosstalk dBm0, 3400 Transmit receive Receive transmit Idle channel noise, transmit, A-law, psophometric transmit, µ-law, C-message receive, A-law, psophometric receive, µ-law, C-message idle code idle code CTXR CTRX 67.4 17.5 78.0 12.0 dBm0p dBrnc dBm0p dBrnc causes additional attenuation range between Equal input levels range between dBm0 dBm0; different frequencies range between 3400 Input level dBm0, frequency range 3400 dBm0, Semiconductor Group 2260 2260 Attenuation Distortion Attenuation deviations stay within limits figures below. ITD00637 Attenuation -0.125 -0.5 -1.0 0.650 0.125 Receive: Reference frequency kHz, input signal level dBm0 ITD00638 Attenuation -0.5 -1.0 0.650 0.125 -0.125 Transmit: Reference frequency kHz, input signal level dBm0 Semiconductor Group 2260 2260 Group Delay Maximum delays operating SICOFI-2 with H(B) H(Z) H(R) H(X) including delay through A/D- converters. Specific filter programming cause additional group delays. Group delay deviations stay within limits figures below. Group Delay Absolute Values: Input signal level dBm0 Parameter Transmit Delay Receive Delay Symbol min. Limit Values typ. max. Unit Test Condition ITD00639 Group Delay Distortion: Input signal level dBm0, reference frequency Semiconductor Group 2260 2260 Out-of-Band Signals Analog Input With out-of-band sine wave signal with frequency level applied analog input, level resulting frequency component digital output will stay least below level ITD00640 Attenuation ITD00641 Attenuation 0.06 Out-of-Band Signals Analog Output With dBm0 sine wave frequency applied digital input, level resulting out-of-band signal analog output will stay least below dBm0, sine wave reference signal analog output. ITD00642 Attenuation Semiconductor Group 2260 2260 Gain Tracking (Receive Transmit) gain deviations stay within limits figures below ITD00643 -0.5 0.25 0.25 -1.0 dBm0 Input Level Gain Tracking: Measured with noise signal according CCITT recommendations, reference level dBm0, ITD00644 -0.2 -0.5 -1.4 dBm0 Input Level 0.25 -0.25 Gain Tracking: Measured with sine wave range 1100 reference level dBm0, Semiconductor Group 2260 2260 Total Distortion signal-to-distortion ratio exceeds limits following figures. ITD00645 36.0 29.7 36.7 34.3 28.4 14.7 Input Level dBm0 Receive: Measured with noise signal according CCITT recommendations ITD00646 35.4 33.3 28.7 36.3 27.4 13.7 dBm0 Input Level Transmit: Measured with noise signal according CCITT recommendations Semiconductor Group 2260 2260 signal distortion ratio exceeds limits following figure. ITD00647 35.5 31.0 27.0 24.5 29.5 36.4 Input Level dBm0 Receive Transmit: Measured with sine wave range 1100 excluding submultiples Parameter Input Level Unit Digital loop back B-filter digital loop back analog port dBm0 dBm0 dBm0 dBm0 Total Distortion min. Unit Transhybrid Loss quality transhybrid-balancing very sensitive deviations gain group delay deviations inherent SICOFI-2 A/D- D/A-converters well external components used line card (SLIC, OP's etc.) SICOFI-2 transhybrid loss measured following way: sine wave signal with level dBm0 frequency range 3400 applied digital input. resulting analog output signal VOUT directly connected VIN, e.g. with SICOFI2 testmode "Digital Loop Back Analog Port" (see CR3). programmable filters disabled, balancing filter enabled with coefficients optimized this configuration (VOUT VIN). resulting echo measured digital output least below level digital input signal shown table below. Semiconductor Group 2260 2260 B-filter coefficients recommended transhybrid loss measurement with VOUT COP-Write B-filter part B-filter part B-filter delay (03)/(83) (0B)/(8B) (18)/(98) Coefficients Parameter Symbol Limit Values min. typ. Unit Test Condition Transhybrid loss Transhybrid loss 2500 Transhybrid loss 3000 Transhybrid loss Transhybrid loss 2500 Transhybrid loss 3000 THL500 THL2500 THL3000 THL500 THL2500 THL3000 6.03, 12.06, 14.00 6.03,12.06, 14.00 Transhybrid loss Transhybrid loss 2500 Transhybrid loss 3000 THL500 THL2500 THL3000 Transhybrid loss Transhybrid loss 2500 Transhybrid loss 3000 THL500 THL2500 THL3000 Transhybrid loss Transhybrid loss 2500 Transhybrid loss 3000 THL500 THL2500 THL3000 Semiconductor Group 2260 2260 Absolute Maximum Ratings Parameter referred GNDD referred GNDD GNDA GNDD Analog input output voltage referred referred digital input voltages referred GNDD referred GNDD input output current input output Storage temperature Ambient temperature under bias Power dissipation Symbol Limit Values min. 10.3 max. 10.3 Unit Semiconductor Group 2260 2260 Operating Range GNDD GNDA Parameter supply current standby operating supply current standby operating Power supply rejection either supply/direction) Symbol min. 0.05 PSRR 2.75 0.08 mVrms ripple Limit Values typ. max. Unit Test Condition Power dissipation standby Power dissipation operating Power dissipation operating channel channels GNDD GNDA supply current standby operating supply current standby operating Power supply rejection either supply/direction) 0.6/0.65 26/28 0.06/0.065 0.08 14/16 PSRR 3.3/3.6 132/143 200/220 5.2/6.1 180/195 280/305 mVrms ripple channel channels 0.95/1.1 34/37 -25oC/-40oC -25oC/-40oC Power dissipation standby Power dissipation operating Power dissipation operating Semiconductor Group 2260 2260 Electrical Characteristics Digital Interface (PEB 2260); (PEF 2260); GNDD GNDA Parameter L-input voltage H-input voltage Negative-input voltage L-output voltage H-output voltage Input leakage current Symbol Limit Values min. 0.45 max. Unit Test Condition Analog Interface (PEB 2260); (PEF 2260); GNDD GNDA Parameter Analog input resistance Analog output resistance Input offset voltage Output offset voltage Input voltage range Output voltage range Symbol Limit Values min. Unit Test Condition max. Reset Timing reset SICOFI-2 basic setting mode, positive pulses applied have longer than SCLK Interface mode, IOM-2 Interface mode. SICOFI2 resetted, clock applied (SCLK/DCL). Spikes shorter than tSCLK -DCL) will ignored. Semiconductor Group 2260 2260 SCLK SCLK DIRxS DIRxH SCLK DINxS Data Data SCLK DINxH dOUT dDHZ High Imp. ITT00649 Interface Timing (SLD) Switching Characteristics Parameter Period SCLK*) SCLK duty cycle Period DIR*) setup time hold time data setup time data hold time data delay data high impedance delay dDOUT dDHZ Symbol min. SCLK Limit Values typ. 1/512 SCLKh Unit max. tDIR tSCLK Semiconductor Group 2260 2260 SCLK Data Last Signaling dSIG Data Last Control dSIGZ INxS Data INxH Last Control First Signaling ITD02446 Signaling Interface Timing (SLD) Switching Characteristics Parameter Delay signaling Delay signaling high impedance Delay signaling active setup time hold time Symbol min. tdSIGOUT tdSIGZ tdSIGA tSIGIN tSIGIN Limit Values typ. max. Unit Pins SO3; Pins output Pins SI3; Pins input programmable signaling pins SBA/SBB Semiconductor Group 2260 2260 DCLh FSC_S FSC_H DD_S DD_H dDUhz High Imp. ITD03389 IOM®-2 Interface Timing Switching Characteristics Parameter Period 'slow' mode1) Period 'fast' mode1) duty cycle Period FSC1) setup time hold time data setup time data hold time data delay 1502) Symbol min. DCLH Limit Values typ. 1/512 1/4096 Unit max. IOM-2 interface mode, kHz: IOM-2 interface mode, 4096 kHz: Depending pull resistor (typical Semiconductor Group 2260 2260 Last Command Last Monitor Command Valid Command Valid Frame Later Command High Imp. Command High Imp. Last Monitor First Indication Ind. ITT02454 IOM®-2 Command/Indication Interface Timing Switching Characteristics Parameter Command delay Command high impedance Command active Indication setup time Indication hold time Symbol min. dCout Limit Values typ. max. Unit Semiconductor Group 2260 2260 Detector Select Timing Detail DD/DU Monitor Data C3Ads C3Ah ITT02455 IOM®-2 Interface, (one channel frame) Detail 4096 DD/DU C3Adf ITT02456 IOM®-2 Interface, 4096 (eight channels frame) I1A/B ITD02457 Detail Switching Characteristics Parameter Detector select high time Detector select delay, 'slow' mode Detector select delay, 'fast' mode Indication setup time Indication hold time Symbol min. tC3Ah tC3Ads tC3Adf tlin tlin Limit Values typ. 15.6 82.0 46.8 max. Unit Semiconductor Group 2260 2260 Appendix Chip Tone Generation With TG2, configuration register tone generators channel activated receive direction; R-filter output with tone generator activated. Each tone generator frequency amplitude programmable individually R-filter coefficients. Every byte sequence started with 2B/AB depending channel programmed F[HZ] 2000 1000 1209 1477 2000 1000 1000 1000 1000 1000 1000 1000 Gain [dB] F[HZ] 2000 1000 1336 1633 1000 Gain [dB] Frequency Byte Sequence TG1-Coefficient Gain TG2-Coefficient Frequency Gain Note: generated tones sinewaves with harmonic distortion Semiconductor Group 2260 2260 Appendix IOM®-2 Interface MONITOR Transfer Protocol MONITOR channel used transfer maintenance information between functional blocks. MONITOR control bits direction, data transferred complete handshake procedure. bits fourth octet (the control channel) IOM-2 frame used handling MONITOR channel. pair inactive state more consecutive frames indicates idle state MONITOR channel message (EOM) start transmission initiated transmitter with transmission form inactive state active state together with first byte sent MONITOR channel. receiver acknowledges first byte setting other direction active keeping active least more frame. same byte sent continuously each frame until either byte transmitted, message abort Flow control, form transmission delay, only take place when transmitters receivers active state. false received receiver transmitter leads request abort abort, respectively. Since receiver able receive MONITOR data least twice consecutive frames), able check data errors. different bytes received receiver will wait receipt identical successive bytes (last look function). collision resolution mechanism implemented transmitter. This done looking idle phase MX-bit making collision check transmitted MONITOR data. abort leads reset SICOFI-2 command stack, device ready receive commands. obtain maximum speed data transfer, transmitter anticipates falling edge receivers acknowledgement. inherent SLD-programming structure, duplex operation possible. Semiconductor Group 2260 2260 Identification Command order able unambiguously identify different devices software, byte identification command defined analog line IOM-2 devices. Each device will then respond with specific identification code. SICOFI-2 this byte identification code Each byte transferred least twice consecutive frames). Semiconductor Group 2260 2260 Idle Wait Abort Initial State Byte Byte Wait CLS/ABT State ITD02458 State Diagram SICOFI®-2 MONITOR Transmitter MR-bit received MX-bit calculated expected DU-line MX-bit sampled DU-line Collision within MONITOR data byte Request transmission form internal source Abort request/indication Semiconductor Group 2260 2260 Idle Initial State Byte Abort State Wait Byte Valid Byte Byte Wait ITD02459 State Diagram SICOFI®-2 MONITOR Receiver MR-bit transmitted DU-line MX-bit received data downstream Last lock MONITOR byte received Abort indication internal source Semiconductor Group PackagePEB 2260 Outlines 2260 Plastic Dual-in-Line Package, P-DIP-22 Approx. weight SICOFI® Plastic-Leaded Chip Carrier, P-LCC-28-R (SMD) Dimensions SICOFI®, SICOFI®-2 Surface Mounted Device Semiconductor Group Development Support Tools General Overview Hardware Software Tools Designation Ordering Code Q67100-H6058 Q67100-H6149 Q67100-H6175 Q67100-H6270 Q67100-H6178 Q67100-H6179 Q67100-H6180 Q67100-H6181 Q67100-H6176 Q67100-H6177 Software Hardware User Boards SICOFI Testboard SICOFI-2 Module1) SLIC Boards HARRIS 5502/5504 HARRIS 5509 SL3000 L3030 SL3000 L3090 ERICSSON 3762 ERICSSON 3736 Transformer Series Feeding Transformer Transverse Feeding STUT 2060 SIPB 5135 STUS 5502 STUS 5509 STUS 3030 STUS 3090 STUS 3762 STUS 3736 STUS 1000 STUS 1001 Software SICOFI Coefficient Simulation Program 2060 2060/PEB2260 Related Boards1) Main Board IOM-2 Line Card Module PCM4 Digital Adaptor SIPB 5000 SIPB 5121 SIPB 5311 Q67100-H8647 Q67100-H8656 Q67100-H6126 ISDN Userboard System (SIPB) Mainboard Firmware Menu Software available under development Semiconductor Group Development Support Tools Semiconductor Group Development Support Tools SICOFI® Coefficients Program (STS 2060) Features Coefficients program available floppy disk compatible Calculates coefficients digital filters SICOFI 2060/PEB 2260 Menu driven program surface Graphic screen output various SLIC/SICOFI transfer functions Direct programming SICOFI testboard STUT 2060 SLIC program parts various standard SLICs included Analog simulation program modelling user specific SLICs included General Overview high flexibility SICOFI based variety user programmable filters, which consist analog gain adjustment AGX, digital gain adjustment frequency response adjustment impedance matching filter transhybrid balancing filter gain optimum result within given environment while observing existing prescriptions, Siemens offers SICOFI user software packet 2060, which performs calculation filter coefficients using overall optimizing approach. Because modularity SICOFI software program, possible SICOFI together with transformer SLICs with series transverse feeding fixed electronic SLICs (Boards SLIC program parts available from Siemens Semiconductor) user specific SLICs 2060 software runs IBM-AT compatible under MD-DOS Version later providing Kbyte available RAM, Mbyte floppy disk drive, math coprocessor 80287 (optional). 2060 software consists major sections: SLIC program (SLIC.EXE) SICOFI program (SICOFI.BAT). transfer file (SLIC.SLI) provides interface between these programs. Instead SLIC.EXE possible special analog simulation program (S.BAT) modelling user specific SLICs. specific values concerning SLIC external circuitry (physical data, filter dimensions, gathered input file SLIC.INP. SLIC program SLIC.EXE models SLIC external circuitry order create file SLIC.SLI which contains their transmission characteristics. SLIC.SLI transfer file (output/input file) between SLIC program SICOFI program introduce SLIC circuit data into SICOFI program. COUNTRY.SPE input file SICOFI program describing customer's specification (CCITT measurement configuration parameters (e.g. termination impedance). Semiconductor Group Development Support Tools REF.BYT optional input file SICOFI program. reference file which defines frame which program write calculated coefficients with some predefined commands. These commands macrocommands necessary send SICOFI coefficients from PBC/PIC (PEB 2050/52) SICOFI (PEB 2060/2260) means SLD-bus control byte. After calculation actual SICOFI coefficients stored output file called e.g. USER.BYT. This file contains commands from REF.BYT file together with updated coefficients. SICOFI.CTL control file SICOFI program. contains data controlling optimization simulation processes. SICOFI.BAT SICOFI batch program which starts execution program generate SICOFI coefficients calculate theoretical transfer functions SLIC-SICOFI. RESULT.RES output file SICOFI.BAT. contains coefficients programming SICOFI according SLIC used. calculated results corresponding various measurements taken SICOFI SLIC listed. (e.g. return loss, frequency response, echo return loss, etc.) This result file also used control file SICOFI.BAT. SICOFI® Software Structure Semiconductor Group Development Support Tools SICOFI® Test Board (STUT 2060) Features SICOFI 2060 2050 2052 onboard 8031 microprocessor system Serial interface interfaces connecting customer specific SLIC boards Adapter connecting SICOFI-2 2260 included General Overview SICOFI® test board STUT 2060 stand alone board which offers possibility connecting external customer specific SLICs with SICOFI evaluation customer specific combinations SLIC SICOFI. This setup allows measurements tests covering transfer functions complete subscriber line module. board programmable interface terminal registers SICOFI accessed therefore SLIC programmed. Different customer specific SLICs ready designed SLIC boards available from Siemens Semiconductor connected SICOFI testboard STUT 2060 64-pin connector. With this setup possible make following investigations: test SLIC hardware verify programmed coefficients, which calculated with SICOFI coefficients program measure many different SLICs short time Semiconductor Group Development Support Tools Semiconductor Group Development Support Tools SICOFI®-2 Module (SIPB 5135) Features Compatible SIPB 5000 userboard system interfaces connecting customer specific SLIC boards Same SLIC connector SICOFI Testboard STUT 2060 SICOFI-2 operated different interface modes (SLD IOM®-2) General Overview Siemens ISDN Development System provides significant savings time when designing customer specific ISDN application. system consists modular hardware form Siemens ISDN User Board (SIPB) several software packages. With SICOFI-2 2260 SICOFI-2 module already provides ready codec/filter interfaces SLICs. Thus this module offers outstanding advantage enabling immediate starting with experiments subscriber line board. SICOFI-2 module SIPB 5135 developed used connection with Line Card Module SIPB 5121. secondary side Line Card Module PCM4 Adaptor SIPB 5311 connected, very useful development testing tool analog line card built Using PCM4 Wandel Goltermann following measurements possible: return loss level A/D- D/A-direction gain tracking A/D- D/A-direction noise A/D- D/A-direction echo return loss Semiconductor Group Development Support Tools Measuring with SICOFI®-2 Module Semiconductor Group Software Description 2060 Software Description 2060 Contents Page Introduction SICOFI® Software Principle SLIC Program Description Program Functions, M-Parameters Input File Description HARRIS SLIC Output File Description, Format M-Parameter Table SICOFI Program Description Program Functions Control File: SICOFI.CTL. Listing Control File HARRIS.CTL. Specification File: COUNTRY.SPE Sign Convention Relative Levels Circuit Library. Listing Specification File BRD.SPE Byte File: USER.BYT. Listing Description RESULT.RES FILE 4.2.1 4.3.1 4.3.2 4.3.3 Using Software Packet. Installation SICOFI® Software 2060 Main Menu 2060 SLIC Menu 2060 Menu Using SICOFI® Program 2060 SICOFI® Menu Example: Obtain SICOFII® Coefficients Special SLIC Application Calculation M-Parameters HARRIS SLIC Working Method Calculating SICOFI® Coefficients Semiconductor Group Software Description 2060 Contents (cont'd) 7.2. 7.2.1 7.2.2 7.3. 7.3.1 Page Extended SICOFI® Calculation Features Special Variables Control File Special Variables Specification File Listing Specification File BRD1.SPE with Special Variables Format Impedance File K-Parameters. Format K-Parameter Table Running SICOFI® Calculation Program BATCH Mode Measurements Specifications. Measurements Verification SICOFI®-SLIC Transfer Functions Extract SLMA Specifications Valid "Deutsche Bundespost" Appendix Features SICOFI® Software Version Gain Tables Programming Transmit SICOFI® V3.x. Values from Gain Tables Programming Receive SICOFI®. Values from Index Variables Used Software Semiconductor Group Software Description 2060 Introduction This Manual already familiar with former SICOFI software version 2.0, suggest starting having look 'New features SICOFI software version 3.0' described appendix 9.1. background some theory described chapters want start straightaway with program, begin directly with chapter example chapter explains obtain SICOFI coefficients special SLIC application. Some tricks take advantage possibilities program explained chapter Measurements SICOFI-SLIC transfer functions some specifications described chapter modularity flexibility software introduces large amount files variables. alphabetical index available this document chapter 'Index variables used software' idea proceed case suggested following figure Semiconductor Group Software Description 2060 Figure General Suggestions Using this Manual Semiconductor Group Software Description 2060 SICOFI provides separate input output ports transmit receive direction. Transmit Direction analog input signal converted, digitally filtered transmitted either PCM-encoded linear. converter used modified slope adaptive interpolative sigma-delta modulator with sampling rate kHz. remove resulting noise, antialiasing done with order Sallen-Key prefilter (PREFI). Subsequently signal downsampled decimation filters together with bandpass filters (LPX, HP). Receive Direction digital input signal received PCM-encoded linear, digitally filtered converted generate analog output signal. Digital interpolation done lowpass filter (LPR) interpolation filters Converter output order Sallen-Key postfilter (POFI). Programmable Function high flexibility SICOFI based variety user programmable filters, which analog gain adjustment AGX, digital gain adjustment frequency response adjustment impedance matching filter transhybrid balancing filter gain optimum result within given environment while observing existing prescriptions, Siemens offers SICOFI user software packet 2060, which performs calculation filter coefficients using overall optimizing approach. Because modularity SICOFI software program, possible SICOFI together with transformer SLICs with series transverse feeding fixed electronic SLICs (see chapter 9.2: Available SICOFI SLIC Documentation) user specific SLICs 2060 software runs IBM-AT compatible under MS-DOS Version later providing Kbyte available RAM, Mbyte floppy disk drive, math coprocessor 80297 (optional). purpose following pages given overview SICOFI software background. more details SICOFI hardware, refer SICOFI data sheets. list available SICOFI software hardware tools will found chapter 9.2. Semiconductor Group Software Description 2060 SICOFI® Software Principle hardware split into parts: SLIC external circuitry hand SICOFI other (see figure Figure SLIC-SICOFI® Hardware Accordingly 2060 software consists major sections: SLIC program SICOFI program. transfer file (SLIC file) provides interface between these programs (see figure Figure Software Structure Semiconductor Group Software Description 2060 Details SICOFI software structure shown following figure: Figure Details Software Structure specific values concerning SLIC external circuitry (physical data, filter dimensions, gathered input file SLIC.INP. SLIC program SLIC.EXE models SLIC external circuitry order create file SLIC.SLI which contains their transmission characteristics. SLIC.SLI transfer file (output/input file) between SLIC program SICOFI program introduce SLIC circuit data into SICOFI program. COUNTRY.SPE input file SICOFI program describing customer's specification (CCITT measurement configuration parameters (e.g. termination impedance). Semiconductor Group Software Description 2060 REF.BYT optional input file SICOFI program. reference file which defines frame which program write calculated coefficients with some predefined commands. These commands macrocommands necessary send SICOFI coefficients from Peripheral Board Controller (PEB 2050) SICOFI (PEB 2060) means SLD-bus control byte. After calculation actual SICOFI coefficients stored output file called e.g. USER.BYT. This file contains commands from REF.BYT file together with updated coefficients. SICOFI.CTL control file SICOFI program. contains data controlling optimization simulation processes. SICOFI.BAT SICOFI batch program which starts execution program generate SICOFI coefficients calculate theoretical transfer functions SLIC-SICOFI. RESULT.RES output file SICOFI.BAT. contains coefficients programming SICOFI according SLIC used. calculated results corresponding various measurements taken SICOFI SLIC listed. (e.g. return loss, frequency response, echo return loss, etc.). This result file also used control file SICOFI.BAT. Semiconductor Group Software Description 2060 SLIC Program Description Program Functions, M-Parameter SLIC program SLIC.EXE generates model SLIC external circuitry provide SICOFI program with transfer functions this circuit. SLIC external circuitry accessible through three ports shown figure Figure SLIC External Circuitry Three-Port port currents port voltages. This circuit described following equations: Note: definition port When SLIC connected SICOFI, assume that: because high SICOFI input impedance. special cases SICOFI input imp Other recent searchesTLGE18CP - TLGE18CP TLGE18CP Datasheet TC4423 - TC4423 TC4423 Datasheet TC4424 - TC4424 TC4424 Datasheet TC4425 - TC4425 TC4425 Datasheet PBLP-300 - PBLP-300 PBLP-300 Datasheet M24C16 - M24C16 M24C16 Datasheet M24C08 - M24C08 M24C08 Datasheet M24C04 - M24C04 M24C04 Datasheet M24C02 - M24C02 M24C02 Datasheet M24C01 - M24C01 M24C01 Datasheet KA8516 - KA8516 KA8516 Datasheet CS0805 - CS0805 CS0805 Datasheet CS0805-2N8 - CS0805-2N8 CS0805-2N8 Datasheet CS0805-3N0 - CS0805-3N0 CS0805-3N0 Datasheet CS0805-3N3 - CS0805-3N3 CS0805-3N3 Datasheet CS0805-5N6 - CS0805-5N6 CS0805-5N6 Datasheet CS0805-6N8 - CS0805-6N8 CS0805-6N8 Datasheet CS0805-7N5 - CS0805-7N5 CS0805-7N5 Datasheet CS0805-8N2 - CS0805-8N2 CS0805-8N2 Datasheet CS0805-10N - CS0805-10N CS0805-10N Datasheet CS0805-12N - CS0805-12N CS0805-12N Datasheet CS0805-15N - CS0805-15N CS0805-15N Datasheet CS0805-18N - CS0805-18N CS0805-18N Datasheet CS0805-22N - CS0805-22N CS0805-22N Datasheet CS0805-24N - CS0805-24N CS0805-24N Datasheet CS0805-27N - CS0805-27N CS0805-27N Datasheet CS0805-33N - CS0805-33N CS0805-33N Datasheet CS0805-36N - CS0805-36N CS0805-36N Datasheet CS0805-39N - CS0805-39N CS0805-39N Datasheet CS0805-43N - CS0805-43N CS0805-43N Datasheet CS0805-47N - CS0805-47N CS0805-47N Datasheet CS0805-56N - CS0805-56N CS0805-56N Datasheet CS0805-68N - CS0805-68N CS0805-68N Datasheet CS0805-82N - CS0805-82N CS0805-82N Datasheet
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