Operating Range 5.5-V EPIC (Enhanced-Performance Implanted CMOS) Proce

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Operating Range 5.5-V EPIC (Enhanced-Performance Implanted CMOS) Proce

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SN54AHC165, SN74AHC165 8-BIT PARALLEL-LOAD SHIFT REGISTERS
Operating Range 5.5-V EPIC (Enhanced-Performance Implanted CMOS) Process Complementary Outputs Direct Overriding Load (Data) Inputs Gated Clock Inputs Parallel-to-Serial Data Conversion Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), Ceramic Flat Packages, Ceramic Chip Carriers (FK), Standard Plastic Ceramic 300-mil DIPs
SN54AHC165 PACKAGE SN74AHC165 PACKAGE (TOP VIEW)
SH/LD
SN54AHC165 PACKAGE (TOP VIEW)
description
'AHC165 8-bit parallel-load shift registers that, when clocked, shift data toward serial (QH) output. Parallel-in access each stage provided eight individual direct data (A-H) inputs that enabled level shift/load (SH/LD) input. 'AHC165 also feature clock-inhibit (CLK INH) function complementary serial (QH) output. Clocking accomplished low-to-high transition clock (CLK) input while SH/LD held high held low. functions interchangeable. Since low-to-high transition also accomplish clocking, should changed high level only while high. Parallel loading inhibited when SH/LD held high. While SH/LD low, parallel inputs register enabled independently levels CLK, INH, serial (SER) inputs.
SH/LD
internal connection
SN54AHC165 characterized operation over full military temperature range -55°C 125°C. SN74AHC165 characterized operation from -40°C 85°C.
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. EPIC trademark Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
Copyright 1997, Texas Instruments Incorporated
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PRODUCT PREVIEW
SN54AHC165, SN74AHC165 8-BIT PARALLEL-LOAD SHIFT REGISTERS
FUNCTION TABLE INPUTS FUNCTION SH/LD Parallel load change change Shift Shift
Shift content each internal register shifts toward serial output Data shifted into first register.
logic symbol
SH/LD This symbol accordance with ANSI/IEEE 91-1984 Publication 617-12. numbers shown packages. SRG8 [LOAD]
PRODUCT PREVIEW
logic diagram (positive logic)
SH/LD
numbers shown packages.
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SN54AHC165, SN74AHC165 8-BIT PARALLEL-LOAD SHIFT REGISTERS
typical shift, load, inhibit sequence
SH/LD
Data Inputs
Inhibit Load
Serial Shift
POST OFFICE 655303
DALLAS, TEXAS 75265
PRODUCT PREVIEW
SN54AHC165, SN74AHC165 8-BIT PARALLEL-LOAD SHIFT REGISTERS
absolute maximum ratings over operating free-air temperature range
Supply voltage range, -0.5 Input voltage range, (see Note -0.5 Output voltage range, (see Note -0.5 Input clamp current, Output clamp current, VCC) Continuous output current, VCC) Continuous current through Package thermal impedance, (see Note package 113°C/W package 131°C/W package 78°C/W package 149°C/W Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD except through-hole packages, which trace length zero.
PRODUCT PREVIEW
recommended operating conditions (see Note
SN54AHC165 Supply voltage High-level voltage High input Low-level input voltage Input voltage Output voltage High-level output current High Low-level output current 3.85 1.65 SN74AHC165 3.85 1.65 UNIT
ns/V
Input transition rise fall rate
Operating free-air temperature NOTE Unused inputs must held high prevent them from floating.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AHC165, SN74AHC165 8-BIT PARALLEL-LOAD SHIFT REGISTERS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS GND, 2.58 3.94 0.36 0.36 ±0.1 25°C SN54AHC165 2.48 SN74AHC165 2.48 0.44 0.44 UNIT
timing requirements over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
25°C Pulse duration high SH/LD high before before Setup time Data before SH/LD before SH/LD high before Hold time data after data after SH/LD SN54AHC165 SN74AHC165 UNIT
timing requirements over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
25°C Pulse duration high SH/LD high before before Setup time Data before SH/LD before SH/LD high before Hold time data after data after SH/LD SN54AHC165 SN74AHC165 UNIT
POST OFFICE 655303
DALLAS, TEXAS 75265
PRODUCT PREVIEW
SN54AHC165, SN74AHC165 8-BIT PARALLEL-LOAD SHIFT REGISTERS
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
SN54AHC165 PARAMETER FROM (INPUT) (OUTPUT) LOAD CAPACITANCE SH/LD 25°C UNIT
fmax tPLH* tPHL* tPLH* tPHL* tPLH* tPHL* tPLH tPHL tPLH tPHL tPLH tPHL
SH/LD
PRODUCT PREVIEW
products compliant MIL-PRF-38535, this parameter ensured production tested.
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
SN74AHC165 PARAMETER FROM (INPUT) (OUTPUT) LOAD CAPACITANCE SH/LD 25°C UNIT
fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL
SH/LD
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AHC165, SN74AHC165 8-BIT PARALLEL-LOAD SHIFT REGISTERS
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
SN54AHC165 PARAMETER FROM (INPUT) (OUTPUT) LOAD CAPACITANCE SH/LD 25°C UNIT
fmax tPLH* tPHL* tPLH* tPHL* tPLH* tPHL* tPLH tPHL tPLH tPHL tPLH tPHL
SH/LD
products compliant MIL-PRF-38535, this parameter ensured production tested.
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
SN74AHC165 PARAMETER FROM (INPUT) (OUTPUT) LOAD CAPACITANCE SH/LD 25°C UNIT
fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL
SH/LD
POST OFFICE 655303
DALLAS, TEXAS 75265
PRODUCT PREVIEW
SN54AHC165, SN74AHC165 8-BIT PARALLEL-LOAD SHIFT REGISTERS
noise characteristics, 25°C (see Note
PARAMETER VOL(P) VOL(V) VOH(V) VIH(D) Quiet output, maximum dynamic Quiet output, minimum dynamic Quiet output, minimum dynamic High-level dynamic input voltage SN74AHC165 -0.4 -0.8 UNIT
VIL(D) Low-level dynamic input voltage NOTE Characteristics determined during product characterization ensured design surface-mount packages only.
operating characteristics, 25°C
PARAMETER Power dissipation capacitance TEST CONDITIONS load, UNIT
PARAMETER MEASUREMENT INFORMATION
PRODUCT PREVIEW
From Output Under Test (see Note
Test Point Input
VOLTAGE WAVEFORMS PULSE DURATION tPLH tPHL tPHL Out-of-Phase Output VOLTAGE WAVEFORMS DELAY TIMES tPLH
LOAD CIRCUIT
Input (see Note
Timing Input (see Note Data Input
In-Phase Output
VOLTAGE WAVEFORMS SETUP HOLD TIMES
NOTES: includes probe capacitance. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement.
Figure Load Circuit Voltage Waveforms
POST OFFICE 655303
DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments (TI) reserves right make changes products discontinue semiconductor product service without notice, advises customers obtain latest version relevant information verify, before placing orders, that information being relied current. warrants performance semiconductor products related software specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. Certain applications using semiconductor products involve potential risks death, personal injury, severe property environmental damage ("Critical Applications"). SEMICONDUCTOR PRODUCTS DESIGNED, INTENDED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. Inclusion products such applications understood fully risk customer. products such applications requires written approval appropriate officer. Questions concerning potential risk applications should directed through local sales office. order minimize risks associated with customer's applications, adequate design operating safeguards should provided customer minimize inherent procedural hazards. assumes liability applications assistance, customer product design, software performance, infringement patents services described herein. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used.
Copyright 1996, Texas Instruments Incorporated

Operating Range 5.5-V EPIC (Enhanced-Performance Implanted CMOS) Proce

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