Operating Range 5.5-V EPIC (Enhanced-Performance Implanted CMOS) Proce
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SN54AHC163, SN74AHC163 4-BIT SYNCHRONOUS BINARY COUNTERS
Operating Range 5.5-V EPIC (Enhanced-Performance Implanted CMOS) Process Internal Look-Ahead Fast Counting Carry Output n-Bit Cascading Synchronous Counting Synchronously Programmable Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), Ceramic Flat Packages, Ceramic Chip Carriers (FK), Standard Plastic Ceramic 300-mil DIPs
SN54AHC163 PACKAGE SN74AHC163 PACKAGE (TOP VIEW)
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SN54AHC163 PACKAGE (TOP VIEW)
internal connection
These counters fully programmable; that they preset number between presetting synchronous, setting level load input disables counter causes outputs agree with setup data after next clock pulse, regardless levels enable inputs. clear function 'AHC163 synchronous. level clear (CLR) input sets four flip-flop outputs after next low-to-high transition CLK, regardless levels enable inputs. This synchronous clear allows count length modified easily decoding outputs maximum count desired. active-low output gate used decoding connected synchronously clear counter 0000 (LLLL). carry look-ahead circuitry provides cascading counters n-bit synchronous applications without additional gating. ENP, ENT, ripple-carry output (RCO) instrumental accomplishing this function. Both must high count, forward enable RCO. Enabling produces high-level pulse while count maximum with high). This high-level overflow ripple-carry pulse used enable successive cascaded stages. Transitions allowed, regardless level CLK.
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PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
Copyright 1997, Texas Instruments Incorporated
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These synchronous, presettable counters feature internal carry look-ahead application high-speed counting designs. 'AHC163 4-bit binary counters. Synchronous operation provided having flip-flops clocked simultaneously that outputs change coincident with each other when instructed count-enable (ENP, ENT) inputs internal gating. This mode operation eliminates output counting spikes normally associated with synchronous (ripple-clock) counters. buffered clock (CLK) input triggers four flip-flops rising (positive-going) edge clock waveform.
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description
SN54AHC163, SN74AHC163 4-BIT SYNCHRONOUS BINARY COUNTERS
description (continued)
These counters feature fully independent clock circuit. Changes control inputs (ENP, ENT, LOAD) that modify operating mode have effect contents counter until clocking occurs. function counter (whether enabled, disabled, loading, counting) dictated solely conditions meeting stable setup hold times. SN54AHC163 characterized operation over full military temperature range -55°C 125°C. SN74AHC163 characterized operation from -40°C 85°C.
logic symbol
CTRDIV16 5CT=0 C5/2,3,4+ 1,5D
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3CT=15
PRODUCT PREVIEW
This symbol accordance with ANSI/IEEE 91-1984 Publication 617-12. numbers shown packages.
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SN54AHC163, SN74AHC163 4-BIT SYNCHRONOUS BINARY COUNTERS
logic diagram (positive logic)
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2T/1C3
2T/1C3
2T/1C3
simplicity, routing complementary signals shown this overall logic diagram. uses these signals shown logic diagram flip-flops. numbers shown packages.
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2T/1C3
SN54AHC163, SN74AHC163 4-BIT SYNCHRONOUS BINARY COUNTERS
logic symbol, each flip-flop
(Load) (Toggle Enable) (Clock) 2T/1C3 (Output)
(Inverted Data) (Inverted Reset)
logic diagram, each flip-flop (positive logic)
PRODUCT PREVIEW
origins shown logic diagram overall device.
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SN54AHC163, SN74AHC163 4-BIT SYNCHRONOUS BINARY COUNTERS
typical clear, preset, count, inhibit sequence
following sequence illustrated below: Clear outputs zero (synchronous) Preset binary Count Inhibit
LOAD Inhibit Count Sync Preset Clear Async Clear
Data Inputs
Data Outputs
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SN54AHC163, SN74AHC163 4-BIT SYNCHRONOUS BINARY COUNTERS
absolute maximum ratings over operating free-air temperature range
Supply voltage range, -0.5 Input voltage range, (see Note -0.5 Output voltage range, (see Note -0.5 Input clamp current, Output clamp current, VCC) Continuous output current, VCC) Continuous current through Package thermal impedance, (see Note package 113°C/W package 131°C/W package 78°C/W package 149°C/W Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD except through-hole packages, which trace length zero.
PRODUCT PREVIEW
recommended operating conditions (see Note
SN54AHC163 Supply voltage High-level voltage High input Low-level input voltage Input voltage Output voltage High-level output current High Low-level output current 3.85 1.65 SN74AHC163 3.85 1.65 UNIT
ns/V
Input transition rise fall rate
Operating free-air temperature NOTE Unused inputs must held high prevent them from floating.
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SN54AHC163, SN74AHC163 4-BIT SYNCHRONOUS BINARY COUNTERS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS GND, 2.58 3.94 0.36 0.36 ±0.1 25°C SN54AHC163 2.48 SN74AHC163 2.48 0.44 0.44 UNIT
timing requirements over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
25°C Pulse duration, high Setup time before Data ENP, LOAD Hold time, synchronous inputs after SN54AHC163 SN74AHC163 UNIT
timing requirements over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
25°C Pulse duration, high Setup time before Data ENP, LOAD Hold time, synchronous inputs after SN54AHC163 SN74AHC163 UNIT
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SN54AHC163, SN74AHC163 4-BIT SYNCHRONOUS BINARY COUNTERS
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
SN54AHC163 PARAMETER FROM (INPUT) (OUTPUT) LOAD CAPACITANCE (count mode) (preset mode) (count mode) (preset mode) 25°C 10.8 10.8 11.2 11.2 13.5 13.5 10.5 10.5 12.8 12.8 13.6 13.6 17.2 17.2 12.3 12.3 16.3 16.3 17.1 17.1 20.7 20.7 15.8 15.8 14.5 14.5 18.5 18.5 19.5 19.5 23.5 23.5 UNIT
fmax tPLH* tPHL* tPLH* tPHL* tPLH* tPHL* tPLH* tPHL* tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL
PRODUCT PREVIEW
products compliant MIL-PRF-38535, this parameter ensured production tested.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AHC163, SN74AHC163 4-BIT SYNCHRONOUS BINARY COUNTERS
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
SN74AHC163 PARAMETER FROM (INPUT) (OUTPUT) LOAD CAPACITANCE (count mode) (preset mode) (count mode) (preset mode) 25°C 10.8 10.8 11.2 11.2 13.5 13.5 10.5 10.5 12.8 12.8 13.6 13.6 17.2 17.2 12.3 12.3 16.3 16.3 17.1 17.1 20.7 20.7 15.8 15.8 14.5 14.5 18.5 18.5 19.5 19.5 23.5 23.5 UNIT
fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL
POST OFFICE 655303
DALLAS, TEXAS 75265
PRODUCT PREVIEW
SN54AHC163, SN74AHC163 4-BIT SYNCHRONOUS BINARY COUNTERS
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
SN54AHC163 PARAMETER FROM (INPUT) (OUTPUT) LOAD CAPACITANCE (count mode) (preset mode) (count mode) (preset mode) 25°C 10.3 10.3 10.1 10.1 10.1 10.1 12.3 12.3 10.1 10.1 11.5 11.5 11.5 11.5 11.5 11.5 UNIT
fmax tPLH* tPHL* tPLH* tPHL* tPLH* tPHL* tPLH* tPHL* tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL
PRODUCT PREVIEW
products compliant MIL-PRF-38535, this parameter ensured production tested.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AHC163, SN74AHC163 4-BIT SYNCHRONOUS BINARY COUNTERS
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
SN74AHC163 PARAMETER FROM (INPUT) (OUTPUT) LOAD CAPACITANCE (count mode) (preset mode) (count mode) (preset mode) 25°C 10.3 10.3 10.1 10.1 10.1 10.1 12.3 12.3 10.1 10.1 11.5 11.5 11.5 11.5 11.5 11.5 UNIT
fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL
noise characteristics, 25°C (see Note
PARAMETER VOL(P) VOL(V) VOH(V) VIH(D) Quiet output, maximum dynamic Quiet output, minimum dynamic Quiet output, minimum dynamic High-level dynamic input voltage SN74AHC163 -0.4 -0.8 UNIT
VIL(D) Low-level dynamic input voltage NOTE Characteristics determined during product characterization ensured design surface-mount packages only.
operating characteristics, 25°C
PARAMETER Power dissipation capacitance TEST CONDITIONS load, UNIT
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SN54AHC163, SN74AHC163 4-BIT SYNCHRONOUS BINARY COUNTERS
PARAMETER MEASUREMENT INFORMATION
From Output Under Test (see Note Test Point Input VOLTAGE WAVEFORMS PULSE DURATION tPLH Timing Input (see Note Data Input VOLTAGE WAVEFORMS SETUP HOLD TIMES VOLTAGE WAVEFORMS DELAY TIMES Out-of-Phase Output tPHL In-Phase Output tPHL tPLH LOAD CIRCUIT
Input (see Note
PRODUCT PREVIEW
NOTES: includes probe capacitance. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement.
Figure Load Circuit Voltage Waveforms
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IMPORTANT NOTICE Texas Instruments (TI) reserves right make changes products discontinue semiconductor product service without notice, advises customers obtain latest version relevant information verify, before placing orders, that information being relied current. warrants performance semiconductor products related software specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. Certain applications using semiconductor products involve potential risks death, personal injury, severe property environmental damage ("Critical Applications"). SEMICONDUCTOR PRODUCTS DESIGNED, INTENDED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. Inclusion products such applications understood fully risk customer. products such applications requires written approval appropriate officer. Questions concerning potential risk applications should directed through local sales office. order minimize risks associated with customer's applications, adequate design operating safeguards should provided customer minimize inherent procedural hazards. assumes liability applications assistance, customer product design, software performance, infringement patents services described herein. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used.
Copyright 1996, Texas Instruments Incorporated
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