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Members Texas Instruments Widebus Family Operating Range 5.5-V EPIC (E
Top Searches for this datasheetSN54AHC16245, SN74AHC16245 16-BIT TRANSCEIVERS WITH 3-STATE OUTPUTS Members Texas Instruments Widebus Family Operating Range 5.5-V EPIC (Enhanced-Performance Implanted CMOS) Process Distributed Configuration Minimizes High-Speed Switching Noise Flow-Through Architecture Optimizes Layout Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Thin Shrink Small-Outline (DGG) Packages 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings SN54AHC16245 PACKAGE SN74AHC16245 PACKAGE (TOP VIEW) description 'AHC16245 16-bit (dual-octal) noninverting 3-state transceivers designed synchronous two-way communication between data buses. control-function implementation minimizes external timing requirements. These devices used 8-bit transceivers 16-bit transceiver. They allow data transmission from from bus, depending logic level direction-control (DIR) input. output-enable (OE) input used disable device that buses effectively isolated. SN54AHC16245 characterized operation over full military temperature range -55°C 125°C. SN74AHC16245 characterized operation from -40°C 85°C. FUNCTION TABLE (each 8-bit section) INPUTS OPERATION data data Isolation Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. EPIC Widebus trademarks Texas Instruments Incorporated. PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice. Copyright 1997, Texas Instruments Incorporated POST OFFICE 655303 DALLAS, TEXAS 75265 PRODUCT PREVIEW 1DIR 2DIR SN54AHC16245, SN74AHC16245 16-BIT TRANSCEIVERS WITH 3-STATE OUTPUTS logic symbol 1DIR 2DIR [BA] [AB] [BA] [AB] PRODUCT PREVIEW This symbol accordance with ANSI/IEEE 91-1984 Publication 617-12. logic diagram (positive logic) 1DIR 2DIR Seven Other Channels Seven Other Channels POST OFFICE 655303 DALLAS, TEXAS 75265 SN54AHC16245, SN74AHC16245 16-BIT TRANSCEIVERS WITH 3-STATE OUTPUTS absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, -0.5 Input voltage range, (see Note -0.5 Output voltage range, (see Note -0.5 Input clamp current, Output clamp current, VCC) Continuous output current, VCC) Continuous current through each Package thermal impedance, (see Note package 89°C/W package 94°C/W Storage temperature range, Tstg -65°C 150°C Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD recommended operating conditions (see Note SN54AHC16245 Supply voltage High-level voltage High input Low-level input voltage Input voltage Output voltage High-level output current High Low-level output current 3.85 1.65 SN74AHC16245 3.85 1.65 UNIT ns/V Input transition rise fall rate Operating free-air temperature NOTE Unused inputs must held high prevent them from floating. POST OFFICE 655303 DALLAS, TEXAS 75265 PRODUCT PREVIEW SN54AHC16245, SN74AHC16245 16-BIT TRANSCEIVERS WITH 3-STATE OUTPUTS electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS inputs GND, (OE) inputs GND, 2.58 3.94 0.36 0.36 ±0.1 ±0.1 ±0.25 25°C SN54AHC16245 2.48 ±2.5 SN74AHC16245 2.48 0.44 0.44 ±2.5 UNIT PRODUCT PREVIEW parameter includes input leakage current. switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure PARAMETER tPLH* tPHL* tPZH* tPZL* tPHZ* tPLZ* tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) (OUTPUT) LOAD CAPACITANCE 25°C 11.5 11.5 13.2 13.2 12.5 12.5 11.9 11.9 16.7 16.7 15.8 15.8 SN54AHC16245 15.5 15.5 15.5 15.5 13.5 13.5 SN74AHC16245 15.5 15.5 15.5 15.5 13.5 13.5 UNIT products compliant MIL-PRF-38535, this parameter ensured production tested. POST OFFICE 655303 DALLAS, TEXAS 75265 SN54AHC16245, SN74AHC16245 16-BIT TRANSCEIVERS WITH 3-STATE OUTPUTS switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure PARAMETER tPLH* tPHL* tPZH* tPZL* tPHZ* tPLZ* tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) (OUTPUT) LOAD CAPACITANCE 25°C 10.6 10.6 SN54AHC16245 SN74AHC16245 UNIT output-skew characteristics, (see Note SN74AHC16245 PARAMETER 25°C UNIT tsk(o) Output skew NOTE Characteristics determined during product characterization ensured design. noise characteristics, 25°C (see Note PARAMETER VOL(P) VOL(V) VOH(V) VIH(D) Quiet output, maximum dynamic Quiet output, minimum dynamic Quiet output, minimum dynamic High-level dynamic input voltage SN74AHC16245 -0.9 UNIT VIL(D) Low-level dynamic input voltage NOTE Characteristics determined during product characterization ensured design surface-mount packages only. operating characteristics, 25°C PARAMETER Power dissipation capacitance TEST CONDITIONS load, UNIT POST OFFICE 655303 DALLAS, TEXAS 75265 PRODUCT PREVIEW products compliant MIL-PRF-38535, this parameter ensured production tested. SN54AHC16245, SN74AHC16245 16-BIT TRANSCEIVERS WITH 3-STATE OUTPUTS PARAMETER MEASUREMENT INFORMATION From Output Under Test (see Note Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open LOAD CIRCUIT Input tPLH In-Phase Output tPHL Out-of-Phase Output VOLTAGE WAVEFORMS DELAY TIMES tPHL tPLH Output Waveform (see Note Output Control (low-level enabling) Output Waveform (see Note tPZL tPZH tPLZ tPHZ PRODUCT PREVIEW VOLTAGE WAVEFORMS ENABLE DISABLE TIMES NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement. Figure Load Circuit Voltage Waveforms POST OFFICE 655303 DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments (TI) reserves right make changes products discontinue semiconductor product service without notice, advises customers obtain latest version relevant information verify, before placing orders, that information being relied current. warrants performance semiconductor products related software specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. Certain applications using semiconductor products involve potential risks death, personal injury, severe property environmental damage ("Critical Applications"). SEMICONDUCTOR PRODUCTS DESIGNED, INTENDED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. Inclusion products such applications understood fully risk customer. products such applications requires written approval appropriate officer. Questions concerning potential risk applications should directed through local sales office. order minimize risks associated with customer's applications, adequate design operating safeguards should provided customer minimize inherent procedural hazards. assumes liability applications assistance, customer product design, software performance, infringement patents services described herein. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used. 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