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True Logic High-Current 3-State Outputs Drive LSTTL Loads Package Opti
Top Searches for this datasheetSN54HC645, SN74HC645 OCTAL TRANSCEIVERS WITH 3-STATE OUTPUTS True Logic High-Current 3-State Outputs Drive LSTTL Loads Package Options Include Plastic Small-Outline (DW) Ceramic Flat Packages, Ceramic Chip Carriers (FK), Standard Plastic Ceramic 300-mil DIPs SN54HC645 PACKAGE SN74HC645 PACKAGE (TOP VIEW) description These octal transceivers designed asynchronous two-way communication between data buses. These devices transmit data from from bus, depending upon level direction-control (DIR) input. output-enable (OE) input used disable device buses effectively isolated. SN54HC645 characterized operation over full military temperature range -55°C 125°C. SN74HC645 characterized operation from -40°C 85°C. FUNCTION TABLE INPUTS OPERATION data data Isolation SN54HC645 PACKAGE (TOP VIEW) Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. Copyright 1997, Texas Instruments Incorporated POST OFFICE 655303 DALLAS, TEXAS 75265 SN54HC645, SN74HC645 OCTAL TRANSCEIVERS WITH 3-STATE OUTPUTS logic symbol [BA] [AB] This symbol accordance with ANSI/IEEE 91-1984 Publication 617-12. logic diagram (positive logic) Seven Other Transceivers POST OFFICE 655303 DALLAS, TEXAS 75265 SN54HC645, SN74HC645 OCTAL TRANSCEIVERS WITH 3-STATE OUTPUTS absolute maximum ratings over operating free-air temperature range Supply voltage range, -0.5 Input clamp current, VCC) (see Note Output clamp current, VCC) (see Note Continuous output current, VCC) Continuous current through Package thermal impedance, (see Note package 97°C/W package 67°C/W Storage temperature range, Tstg -65°C 150°C Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD except through-hole packages, which trace length zero. recommended operating conditions SN54HC645 Supply voltage High-level voltage High input Low-level input voltage Input voltage Output voltage Input transition time (rise fall) Operating free-air temperature 3.15 1.35 1000 SN74HC645 3.15 1.35 1000 UNIT POST OFFICE 655303 DALLAS, TEXAS 75265 SN54HC645, SN74HC645 OCTAL TRANSCEIVERS WITH 3-STATE OUTPUTS electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS -7.8 3.98 5.48 25°C 1.998 4.499 5.999 0.002 0.001 0.001 0.17 0.15 ±0.1 ±0.01 0.26 0.26 ±100 ±0.5 SN54HC645 ±1000 SN74HC645 3.84 5.34 0.33 0.33 ±1000 UNIT switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure PARAMETER FROM (INPUT) (OUTPUT) tdis 25°C SN54HC645 SN74HC645 UNIT POST OFFICE 655303 DALLAS, TEXAS 75265 SN54HC645, SN74HC645 OCTAL TRANSCEIVERS WITH 3-STATE OUTPUTS switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure PARAMETER FROM (INPUT) (OUTPUT) 25°C SN54HC645 SN74HC645 UNIT operating characteristics, 25°C PARAMETER Power dissipation capacitance transceiver TEST CONDITIONS load UNIT POST OFFICE 655303 DALLAS, TEXAS 75265 SN54HC645, SN74HC645 OCTAL TRANSCEIVERS WITH 3-STATE OUTPUTS PARAMETER MEASUREMENT INFORMATION PARAMETER Test Point tPZH tPZL tPHZ tPLZ Open Closed Open Closed Open Closed Open Closed Open Open From Output Under Test (see Note tdis LOAD CIRCUIT Input tPLH In-Phase Output tPHL Out-of-Phase Output tPLH tPHL Output Control (Low-Level Enabling) tPZL Output Waveform (See Note tPZH tPLZ tPHZ VOLTAGE WAVEFORMS PROPAGATION DELAY OUTPUT TRANSITION TIMES Input Output Waveform (See Note VOLTAGE WAVEFORM INPUT RISE FALL TIMES VOLTAGE WAVEFORMS ENABLE DISABLE TIMES 3-STATE OUTPUTS NOTES: includes probe test-fixture capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. Phase relationships between waveforms were chosen arbitrarily. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement. tPLZ tPHZ same tdis. tPZL tPZH same ten. tPLH tPHL same tpd. Figure Load Circuit Voltage Waveforms POST OFFICE 655303 DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments (TI) reserves right make changes products discontinue semiconductor product service without notice, advises customers obtain latest version relevant information verify, before placing orders, that information being relied current. warrants performance semiconductor products related software specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. Certain applications using semiconductor products involve potential risks death, personal injury, severe property environmental damage ("Critical Applications"). SEMICONDUCTOR PRODUCTS DESIGNED, INTENDED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. Inclusion products such applications understood fully risk customer. products such applications requires written approval appropriate officer. Questions concerning potential risk applications should directed through local sales office. order minimize risks associated with customer's applications, adequate design operating safeguards should provided customer minimize inherent procedural hazards. assumes liability applications assistance, customer product design, software performance, infringement patents services described herein. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used. Copyright 1996, Texas Instruments Incorporated Other recent searchesPL00200 - PL00200 PL00200 Datasheet GBU8A - GBU8A GBU8A Datasheet GBU8K - GBU8K GBU8K Datasheet CDV19 - CDV19 CDV19 Datasheet CDV30 - CDV30 CDV30 Datasheet BUL138 - BUL138 BUL138 Datasheet BAV70W - BAV70W BAV70W Datasheet B66372A2000T001 - B66372A2000T001 B66372A2000T001 Datasheet
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