Flow-Through Architecture Optimizes Layout Center-Pin Configuration Mi

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Flow-Through Architecture Optimizes Layout Center-Pin Configuration Mi

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54AC11011, 74AC11011 TRIPLE 3-INPUT POSITIVE-AND GATES
Flow-Through Architecture Optimizes Layout Center-Pin Configuration Minimizes High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity 125°C Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, Standard Plastic Ceramic 300-mil DIPs
54AC11011 PACKAGE 74AC11011 PACKAGE (TOP VIEW)
description
These devices contain three independent 3-input gates. They perform Boolean functions positive logic. 54AC11011 characterized operation over full military temperature range 55°C 125°C. 74AC11011 characterized operation from 40°C 85°C.
54AC11011 PACKAGE (TOP VIEW)
internal connection OUTPUT
Copyright 1993, Texas Instruments Incorporated
FUNCTION TABLE (each gate) INPUTS
EPIC trademark Texas Instruments Incorporated.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
POST OFFICE 655303
DALLAS, TEXAS 75265
54AC11011, 74AC11011 TRIPLE 3-INPUT POSITIVE-AND GATES
logic symbol
logic diagram (positive logic)
This symbol accordance with ANSI/IEEE 91-1984 Publication 617-12. numbers shown packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, Input voltage range, (see Note Output voltage range, (see Note Input clamp current, VCC) Output clamp current, VCC) Continuous output current, VCC) Continuous current through Storage temperature range 65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTE input output voltage ratings exceeded input output clamp-current ratings observed.
POST OFFICE 655303
DALLAS, TEXAS 75265
54AC11011, 74AC11011 TRIPLE 3-INPUT POSITIVE-AND GATES
recommended operating conditions
54AC11011 Supply voltage High-level input voltage High Low-level input voltage Input voltage Output voltage High-level output current High Low-level output current Input transition rise fall rate Operating free-air temperature 3.15 3.85 1.35 1.65 74AC11011 3.15 3.85 1.35 1.65 UNIT
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS GND, 0.36 0.36 0.36 1.65 1.65 2.58 3.94 4.94 25°C 54AC11011 3.85 3.85 0.44 0.44 0.44 74AC11011 2.48 UNIT
more than output should tested time, duration test should exceed
POST OFFICE 655303
DALLAS, TEXAS 75265
54AC11011, 74AC11011 TRIPLE 3-INPUT POSITIVE-AND GATES
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER tPLH tPHL FROM (INPUT) (OUTPUT) 25°C 54AC11011 74AC11011 UNIT
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER tPLH tPHL FROM (INPUT) (OUTPUT) 25°C 54AC11011 74AC11011 UNIT
operating characteristics, 25°C
PARAMETER Power dissipation capacitance gate TEST CONDITIONS UNIT
PARAMETER MEASUREMENT INFORMATION
From Output Under Test (see Note Output Input (see Note tPLH tPHL
LOAD CIRCUIT
VOLTAGE WAVEFORMS
NOTES: includes probe capacitance. Input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement.
Figure Load Circuit Voltage Waveforms
POST OFFICE 655303
DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments (TI) reserves right make changes products discontinue semiconductor product service without notice, advises customers obtain latest version relevant information verify, before placing orders, that information being relied current. warrants performance semiconductor products related software specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. Certain applications using semiconductor products involve potential risks death, personal injury, severe property environmental damage ("Critical Applications"). SEMICONDUCTOR PRODUCTS DESIGNED, INTENDED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. Inclusion products such applications understood fully risk customer. products such applications requires written approval appropriate officer. Questions concerning potential risk applications should directed through local sales office. order minimize risks associated with customer's applications, adequate design operating safeguards should provided customer minimize inherent procedural hazards. assumes liability applications assistance, customer product design, software performance, infringement patents services described herein. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used.
Copyright 1996, Texas Instruments Incorporated

Flow-Through Architecture Optimizes Layout Center-Pin Configuration Mi

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