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TC500 TC500 TC500A TC500A TC510 TC510 TC514 TC514 PRECISION ANALO
Top Searches for this datasheetPRECISION ANALOG FRONT ENDS TC500 TC500 TC500A TC500A TC510 TC510 TC514 TC514 PRECISION ANALOG FRONT ENDS FEATURES Precision Bits) Converter "Front End" 3-Pin Control Interface Microprocessor Flexible: User Trade-Off Conversion Speed Resolution Single Supply Operation (TC510/514) Input, Differential Analog (TC514) Automatic Input Voltage Polarity Detection Power Dissipation TC500/500A: 10mW TC510/514: 18mW Wide Analog Input Range ±4.2V (TC500A/510) Directly Accepts Bipolar Differential Input Signals GENERAL DESCRIPTION TC500/500A/510/514 family precision analog front ends that implement dual slope converters having maximum resolution bits plus sign. minimum, each device contains integrator, zero crossing comparator processor interface logic. TC500 base max) device requires both positive negative power supplies. TC500A identical TC500, except improved linearity allowing operate maximum resolution bits. TC510 adds onboard negative power supply converter single supply operation. TC514 adds both negative power supply converter input differential analog multiplexer. Each device same processor control interface consisting wires: control inputs zerocrossing comparator output (CMPTR). processor manipulates sequence TC5xx through four phases conversion: Auto Zero, Integrate, Deintegrate Integrator Zero. During Auto Zero phase, offset voltages TC5xx corrected closed-loop feedback mechanism. input voltage applied integrator during Integrate phase. This causes integrator output dv/dt directly proportional magnitude input voltage. higher input voltage, greater magnitude voltage stored integrator during this phase. start Deintegrate phase, external voltage reference applied integrator, same time, external host processor starts on-board timer. processor ORDERING INFORMATION Part TC500ACOE TC500ACPE TC500COE TC500CPE TC510COG TC510CPF TC514COI TC514CPJ TC500EV Package 16-Pin SOIC 16-Pin Plastic (Narrow) 16-Pin SOIC 16-Pin Plastic (Narrow) 24-Pin SOIC 24-Pin Plastic (300 Mil.) Temp. Range +70°C +70°C +70°C +70°C +70°C +70°C 28-Pin SOIC +70°C 28-Pin Plastic (300 Mil.) +70°C Evaluation TC500/500A/510/514 FUNCTIONAL BLOCK DIAGRAM CREF RINT VREF CINT CREF VREF CREF BUFFER INTEGRATOR CINT CONTROL LOGIC CONVERTER STATE ZERO INTEGRATOR OUTPUT AUTO-ZERO SIGNAL INTEGRATE DEINTEGRATE ACOM DIF. (TC514) SWRI SWRI CMPTR TC500 TC500A TC510 CMPTR TC514 LEVEL SHIFT CMPTR OUTPUT SWRI SWRI SWIZ POLARITY DETECTION ANALOG SWITCH CONTROL SIGNALS DC-TO-DC CONVERTER (TC510 TC514) PHASE DECODING LOGIC DGND VOUT CAP- CAP+ (TC500 TC500A) 1.0µF COUT 1.0µF CONTROL LOGIC TC500/A/510/514-3 10/3/96 TelCom Semiconductor reserves right make changes circuitry specifications devices. PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 GENERAL DESCRIPTION (Cont.) maintains this state until transition occurs CMPTR output, which time processor halts timer. resulting timer count converted analog data. Integrator Zero (the final phase conversion) removes residue remaining integrator preparation next conversion. TC500/500A/510/514 offer high resolution bits) superior 50Hz/60Hz noise rejection, power operation, minimum connections, input bias currents lower cost compared other converter technologies having similar conversion speeds. TC500/500A Negative Supply Voltage (VSS GND) Analog Input Voltage Logic Input Voltage +0.3V 0.3V Voltage 0.3V (VDD +0.3V) 5.5V Ambient Operating Temperature Range +70°C Storage Temperature Range 65°C +150°C Lead Temperature (Soldering, sec) +300°C Static-sensitive device. Unused devices must stored conductive material. Protect devices from static discharge static fields. Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only functional operation device these other conditions above those indicated operation sections specifications implied. Exposure absolute maximum rating conditions extended periods affect device reliability. ABSOLUTE MAXIMUM RATINGS* TC510/514 Positive Supply Voltage (VDD GND) +10.5V TC500/500A Supply Voltage (VDD VSS) +18V TC500/500A Positive Supply Voltage (VDD GND) +12V ELECTRICAL CHARACTERISTICS: TC510/514: +5V, TC500/500A: unless otherwise specified. CREF 0.47 +25°C Symbol Parameter Analog ZSTC Resolution Zero-Scale Error with Auto Zero Phase Point Linearity Best Case Straight Line Linearity Zero-Scale Temperature Coefficient Full-Scale Symmetry Error (Roll-Over Error) Full-Scale Temperature Coefficient Note TC500/510/514 TC500A TC500/510/514, Notes TC500A TC500/510/514, Notes TC500A Over Operating Temperature Range Note Over Operating Temperature Range External Reference 0ppm/°C 0.005 0.003 0.005 0.003 0.015 0.010 0.008 0.005 0.005 0.003 0.015 0.010 0.012 0.009 0.060 0.045 F.S. F.S. F.S. F.S. F.S. µV/°C +70°C Unit Test Conditions FSTC 0.01 0.03 F.S. ppm/°C VCMR Input Current Common-Mode Voltage Range Integrator Output Swing Analog Input Signal Range ACOM Voltage Reference Range +1.5 +0.9 +1.5 +1.5 +0.9 +1.5 +0.9 +1.5 VREF PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 ELECTRICAL CHARACTERISTICS: (Cont.) +25°C Symbol Digital Comparator Logic Output High Comparator Logic Output Logic Input High Voltage Logic Input Voltage Logic Input Current Comparator Delay ISOURCE 400µA ISINK 2.1mA µsec +70°C Unit Parameter Test Conditions Logic Multiplexer (TC514 Only) RDSON ROUT IOUT Maximum Input Voltage Drain/Source Resistance Power (TC510/514 Only) Supply Current Power Dissipation Positive Supply Operating Voltage Range Operating Source Resistance Oscillator Frequency Maximum Current IOUT 10mA (Note ±5V, Power (TC500/500A Only) Supply Current Power Dissipation Positive Supply Operating Voltage Range Negative Supply Operating Voltage Range NOTES: Integrate time 66msec, auto-zero time 66msec, VINT (peak) point linearity ±1/4, ±3/4 F.S. after full-scale adjustment. Roll-over error related CINT, CREF, characteristics. PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 CONFIGURATIONS CINT ACOM DIGITAL CMPTR CINT ACOM CREF DIGITAL CMPTR CREF CREF VREF TC500/ TC500A TC500/ TC500A CREF VREF VREF VREF VOUT CINT DGND VOUT DGND CMPTR CINT ACOM CREF CREF ACOM CREF TC510CPF CMPTR TC510COG VOUT DGND VOUT DGND CMPTR CH1+ CH2+ CH3+ CH4+ CINT ACOM CREF CINT ACOM CREF CREF CREF TC514CPJ CMPTR TC514COI CH1+ CH2+ CH3+ CH4+ CH4- CH3- CH2- CH1- CH4- CH3- CH2- CH1- PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 DESCRIPTION (TC500, 500A) (TC510) Used (TC514) Used Symbol CINT ACOM Description Integrator output. Integrator capacitor connection. Negative power supply input (TC500/500A only). Auto-zero input. Auto-zero capacitor connection. Buffer output. Integrator capacitor connection. This grounded most applications. recommended that ACOM input common (VIN within analog common mode range (CMR). Input. Negative reference capacitor connection. Input. Positive reference capacitor connection. Input. External voltage reference connection. Input. External voltage reference connection. Negative analog input. Positive analog input. Input. Converter phase control MSB. (See input Input. Converter phase control LSB. states place TC5xx four required phases. conversion complete when four phases have been executed: Integrator Zero Auto Zero Phase control input pins: Integrate Deintegrate Zero crossing comparator output. CMPTR HIGH during Integration phase when positive input voltage being integrated when negative input voltage being integrated. HIGH-to-LOW transition CMPTR signals processor that Deintegrate phase completed. CMPTR undefined during Auto-Zero phase. should monitored time Integrator Zero phase (see text). Input. Digital ground. Input. Power supply positive connection. Input. Negative power supply converter capacitor connection. Input. Negative power supply converter capacitor connection. Output. Negative power supply converter output reservoir capacitor connection. This output used power other devices circuit requiring negative bias voltage. Oscillator control input. negative power supply converter normally runs frequency 100kHz. converter oscillator frequency slowed down reduce quiescent current) connecting external capacitor between this VDD. (See Typical Characteristics Curves). Positive analog input pin. channel Negative analog input pin. channel Positive analog input pin. channel Negative analog input pin. channel Positive analog input pin. channel Negative analog input pin. channel Positive analog input pin. channel Used Used CREF CREF VREF VREF CMPTR DGND CAP+ CAP- VOUT CH1+ CH2- CH3+ CH3- CH4+ PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 DESCRIPTION (Cont.) (TC500/A) (TC510) (TC514) Symbol Description Negative analog input pin. channel Multiplexer input channel select input LSB. (See A1). Multiplexer input channel select input MSB. Channel Channel Phase control input pins: Channel Channel GENERAL THEORY OPERATION Dual-Slope Conversion Principles (Figure Actual data conversion accomplished phases: input signal Integration reference voltage Deintegration. integrator output initialized prior start Integration. During Integration, analog switch connects integrator input where maintained fixed time period (tINT). application causes integrator output depart rate determined magnitude VIN, direction determined polarity VIN. Deintegration phase initiated immediately expiration tINT. During Deintegration, connects reference voltage (having polarity opposite that VIN) integrator input. same time, external precision timer started. Deintegration phase maintained until comparator output changes state, indicating integrator returned starting point When this occurs, precision timer stopped. Deintegration time period (tDEINT), measured precision timer, directly proportional magnitude applied input voltage. simple mathematical equation relates Input Signal, Reference Voltage Integration time: CINT RINT INTEGRATOR VINT PHASE CONTROL TC510 COMPARATOR CMPTR ANALOG INPUT (VIN) VOLTAGE SWITCH DRIVER POLARITY CONTROL CONTROL LOGIC INTEGRATOR OUTPUT TINT TDEINT VFULL SCALE VFULL SCALE VSUPPLY VINT MICROCOMPUTER TIMER COUNTER Figure Basic Dual-Slope Converter PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 NORMAL MODE REJECTION (dB) RINT CINT tINT VREF tDEINT RINT CINT MEASUREMENT PERIOD where: VREF Reference Voltage tINT Signal Integration time (fixed) tDEINT Reference Voltage Integration time (variable) constant VIN: VREF DEINT tINT dual-slope converter accuracy unrelated integrating resistor capacitor values long they stable during measurement cycle. inherent benefit noise immunity. Input noise spikes integrated (averaged zero) during integration periods. Integrating ADCs immune large conversion errors that plague successive approximation converters high-noise environments. Integrating converters provide inherent noise rejection with least 20dB/decade attenuation rate. Interference signals with frequencies integral multiples integration period are, theoretically, completely removed since average value sine wave frequency (1/t) averaged over period zero. Integrating converters often establish integration period reject 50/60Hz line frequency interference signals. ability reject such signals shown normal mode rejection plot (Figure Normal mode rejection limited practice 65dB, since line frequency deviate tenths percent (Figure NORMAL MODE REJECTION (dB) 0.1/T INPUT FREQUENCY 10/T Figure Integrating Converter Normal Mode Rejection TC500/500A/510/514 CONVERTER OPERATION TC500/500A/510/514 incorporates Auto zero Integrator phase addition input signal Integrate reference Deintegrate phases. addition these phases reduce system errors calibration steps, shorten overrange recovery time. typical measurement cycle uses four phases following order: Auto zero Input signal integration Reference deintegration Integrator output zero internal analog switch status each these phases summarized Table This table referenced Functional Block Diagram first page this data sheet. Auto-Zero Phase (AZ) During this phase, errors buffer, integrator comparator offset voltages nulled charging (auto-zero capacitor) with compensating error voltage. external input signal disconnected from internal circuitry opening switches. internal input points connect analog common. reference capacitor charged reference voltage potential through SWR. feedback loop, closed around integrator comparator, charges capacitor with voltage compensate buffer amplifier, integrator comparator offset voltages. NORMAL MODE DEV) REJECTION DEVIATION FROM INTEGRATION PERIOD 0.01 LINE FREQUENCY DEVIATION FROM Figure Line Frequency Deviation PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 Table Internal Analog Gate Status Internal Analog Gate Status Conversion Phase Auto-Zero Input Signal Integration Reference Voltage Deintegration Integrator Output Zero SWRI SWRI Closed Closed Closed Closed SWIZ Closed* Closed Closed Closed Closed *Assumes positive polarity input signal. SWRI would closed negative input signal. Analog Input Signal Integration Phase (INT) TC5xx integrates differential voltage between (VIN) (VIN) inputs. differential voltage must within device's common-mode range VCMR. input signal polarity normally checked software this phase: CMPTR positive polarity; CMPTR negative polarity. voltage range, common-mode rejection typically 80dB. Full accuracy maintained, however, when inputs less than 1.5V from either supply. integrator output also follows common-mode voltage. integrator output must allowed saturate. worst-case condition exists, example, when large, positive common-mode voltage with near full-scale negative differential input voltage applied. negative input signal drives integrator positive when most swing been used positive common-mode voltage. these critical applications, integrator swing reduced. integrator output swing within 0.9V either supply without loss linearity. Reference Voltage Deintegration Phase (DINT) previously charged reference capacitor connected with proper polarity ramp integrator output back zero. externally-provided, precision timer used measure duration this phase. resulting time measurement proportional magnitude applied input voltage. Analog Common Analog common used return during system- zero reference deintegrate. different from analog common, common-mode voltage exists system. This signal rejected excellent converter. most applications, will fixed known voltage (i.e., power supply common). common-mode voltage will exist when connected analog common. Differential Reference (VREF, VREF) Integrator Output Zero Phase (IZ) This phase guarantees integrator output when Auto Zero phase entered that only system offset voltages compensated. This phase used reference voltage deintegration phase MUST used TC5xx applications having resolutions bits more. this phase used, value AutoZero capacitor (CAZ) must about times value integration capacitor (CINT) reduce effects charge-sharing. Integrator Output Zero phase should programmed operate until Output Comparator returns "HIGH". overall Timing System shown Figure ANALOG SECTION Differential Inputs (VIN, VIN) TC5xx operates with differential voltages within input amplifier common-mode range. amplifier common-mode range extends from 1.5V below positive supply 1.5V above negative supply. Within this common-mode reference voltage anywhere within power supply voltage converter. Roll-over error caused reference capacitor losing gaining charge stray capacitance nodes. difference reference input voltages will cause roll-over error. This error minimized using large reference capacitor comparison stray capacitance. Phase Control Inputs unlatched logic inputs select TC5xx operating phase. inputs normally driven microprocessor port external logic. PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 Comparator Output monitoring comparator output during fixed signal integrate time, input signal polarity determined microprocessor controlling conversion. comparator output HIGH positive signals negative signals during signal-integrate phase (see timing diagram). During reference deintegrate phase, comparator output will make HIGH-to-LOW transition integrator output ramp crosses zero. transition used signal processor that conversion complete. internal comparator delay 2µsec, typically. Figure shows comparator output large positive negative signal inputs. signal inputs near zero volts, however, integrator swing very small. commonmode noise present, comparator switch several times during beginning signal-integrate period. ensure that polarity reading correct, comparator output should read stored signal integrate phase. comparator output undefined during AutoZero Phase used time Integrator Output Zero phase. (See Integrator Output Zero Phase System Timing section). SIGNAL INTEGRATE INTEGRATOR OUTPUT REFERENCE DEINTEGRATE SIGNAL INTEGRATE REFERENCE DEINTEGRATE ZERO CROSSING INTEGRATOR OUTPUT ZERO CROSSING COMPARATOR OUTPUT COMPARATOR OUTPUT Positive Input Signal Negative Input Signal Figure Comparator Output PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 APPLICATIONS Component Value Selection procedure outlined below allows user arrive values following TC5xx design variables: Integration Phase Timing Integrator Timing Components (RINT, CINT) Auto Zero Reference Capacitors Voltage Reference Table CREF Selection Conversions Typical Value Suggested Second CREF, (µF) Part Number less 0.22 0.47 WIMA MK12 .1/63/20 WIMA MK12 .22/63/20 WIMA MK12 .47/63/20 *WIMA Corp. listing last page this data sheet. Select Integration Time Integration time must picked multiple period line frequency. example, tINT times 33msec, 66msec 132msec maximize 60Hz line rejection. DINT Phase Timing duration DINT phase function amount voltage stored integrator during TINT, value VREF. DINT phase must initiated immediately following terminated when integrator output zero-crossing detected. general, maximum number counts chosen DINT twice that (with VREF chosen (max)/2). Calculate Integrating Resistor (RINT) desired full-scale input voltage amplifier output current capability determine value RINT. buffer integrator amplifiers each have full-scale current 20µA. value RINT therefore directly calculated follows: RINT(in where: Maximum input voltage (full count voltage) RINT =Integrating Resistor loop stability, RINT should 50k. Select Reference (CREF) Auto Zero (CAZ) Capacitors CREF must leakage capacitors (such polypropylene). slower conversion rate, larger value CREF must Recommended capacitors CREF shown Table Larger values CREF also used limit roll-over errors. Calculate Integrating Capacitor (CINT) integrating capacitor must selected maximize integrator output voltage swing. integrator output voltage swing defined absolute value VSS) less 0.9V (i.e., 0.9V +0.9V Using 20µA buffer maximum output current, value integrating capacitor calculated using following equation. (tINT) 0.9) where: tINT Integration Period Applied Supply Voltage CINT critical that integrating capacitor very dielectric absorption. Polypropylene capacitors example such chemistry. Polyester Polybicarbonate capacitors also used less critical applications. Table summarizes recommended capacitors CINT. Table Recommend Capacitor CINT Value 0.22 0.33 0.47 Suggested Part Number* WIMA MK12 .1/63/20 WIMA MK12 .22/63/20 WIMA MK12 .33/63/20 WIMA MK12 .47/63/20 *WIMA Corp. listing last page this data sheet. Calculate VREF reference deintegration voltage calculated using: VREF Volts) 0.9) (CINT) (RINT) 2(tINT) PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 INTEGRATOR OUTPUT COMPARATOR OUTPUT COMP INTEGRATE PHASE DESIGN CONSIDERATIONS Noise threshold noise (NTH) algebraic integrator noise comparator noise. This value typically 30µV. Figure shows value reference voltage affect final count. Such errors reduced increased integration times, same that 50/60Hz noise rejected. signal-to-noise ratio related integration time (tINT) integration time constant (RINT) (CINT) follows: (dB) Normal High VREF SLOPE VREF RINT CINT Noise Threshold Figure Noise ZERO CROSSING OVERSHOOT DEINTEGRATE PHASE INTEGRATOR ZERO PHASE Figure shows overall timing typical system which TC5xx interfaced microcontroller. microcontroller drives inputs with lines monitors comparator output, CMPTR, using line dedicated timer-capture control pin. necessary monitor state CMPTR output addition having control timer directly Reference Deintegration phase. (This further explained below.) timing diagram Figure scale timing real system depends many system parameters component value selections. There four critical timing events shown Figure sampling input polarity; capturing deintegration time; minimizing overshoot properly executing Integrator Output Zero phase. Figure Overshoot Auto-Zero Phase length this phase usually equal Input Signal Integration time. This decision virtually arbitrary since magnitudes various system errors known. Setting Auto-Zero time equal Input Integrate time should more than adequate null system errors. system remain this phase indefinitely, i.e., Auto-Zero appropriate idle state TC5xx device. Input Signal Integrate Phase length this phase constant from conversion next depends system parameters component value selections. calculation tINT shown elsewhere this data sheet. some point near this phase, microcontroller should sample CMPTR determine input signal polarity. This value effect, Sign overall conversion result. Optimally, CMPTR should sampled just before this phase terminated changing from consideration here tINT (RINT) (CINT) System Timing obtain maximum performance from TC5xx, overshoot Deintegration phase must minimized. Also, Auto Zero phase must terminated soon comparator output returns high. (See timing diagram, Figure PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 that, during initial stage input integration when integrator voltage low, comparator affected noise output unreliable. Once integration well underway, comparator will defined state. Integrator Output Zero phase comparator delay controller's response latency result Overshoot causing charge buildup integrator conversion. This charge must removed performance will degrade. Integrator Output Zero phase should activated until CMPTR goes high. absolutely critical that this phase terminated immediately that Overshoot allowed occur opposite direction. this point, assured that integrator near zero. Auto Zero should entered TC5xx held this state until next cycle begun. Reference Deintegration length this phase must precisely measured from transition from falling edge CMPTR. comparator delay contributes some error timing this phase. typical delay specified 2µsec. This should considered context length single count when determining overall system performance possible single-count errors. Additionally, Overshoot will result charge accumulating integrator after output crosses zero. This charge must nulled during Integrator Output Zero phase. TIME CONVERTER STATUS INTEGRATOR VOLTAGE VINT COMPARATOR OUTPUT AUTO -ZERO INTEGRATE FULL SCALE INPUT REFERENCE DEINTEGRATE OVERSHOOT INTEGRATOR OUTPUT ZERO COMPARATOR DELAY UNDEFINED NEGATIVE INPUT POSITIVE INPUT READY NEXT CONVERSION (AUTO-ZERO IDLE STATE) INPUTS CONTROLLER OPERATION BEGIN CONVERSION WITH AUTO-ZERO PHASE TIME INPUT INTEGRATION PHASE CAPTURE DEINTEGRATION TIME INTEGRATOR OUTPUT ZERO PHASE COMPLETE SAMPLE INPUT POLARITY TYPICALLY tINT (POSITIVE INPUT SHOWN) NOTES length this phase chosen almost arbitrarily needs long enough null worst case errors (see text) tINT COMPARATOR DELAY PROCESSOR LATENCY MINIMIZING OVERSHOOT WILL MINIMIZE I.O.Z. TIME Figure Typical Dual Slope Converter System Timing PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 Design Example Given: Required Resolution: Bits (65,536 counts). Maximum VIN: Power Supply Voltage: 60Hz System USING TC510/514 Negative Supply Voltage Converter (TC510, TC514) capacitive charge pump employed invert voltage negative bias within TC510/514. This voltage also available provide negative bias elsewhere system. external capacitors required perform conversion. Timing generated internal state machine driven from on-board oscillator. During first phase, capacitor switched across power supply charged This charge transferred capacitor during second phase. oscillator normally runs 100kHz ensure minimum output ripple. This frequency reduced placing capacitor from VDD. relationship between capacitor value shown typical characteristics curves this data sheet. Step Pick integration time (tINT) multiple line frequency: 1/60Hz 16.6msec. line frequency 66msec Step Calculate RINT RINT VINMAX/20 2/20 100k Step Calculate CINT maximum (4V) integrator output swing: CINT (tINT) 0.9) (.066) (4.1) .32µF (use closest value: 0.33µF) Analog Input Multiplexer (TC514) TC514 equipped with four input differential analog multiplexer. Input channels selected using select inputs (A1, A0). These high-true control signals (i.e., channel selected when (A1, 00). NOTE: TelCom recommended capacitor: WIMA p/n: MK12 .33/63/10 Step Choose CREF based conversion rate: Conversions/sec 1/(tAZ tINT tINT 2msec) 1/(66msec +66msec +132msec +2msec) conversions/sec From which CREF 0.22µF (see Table NOTE: TelCom recommended capacitor: WIMA p/n: MK12 .22/63/10 Step Calculate VREF VREF Volts) 0.9) (CINT) (RINT) 2(tINT) (4.1) (0.33 (105) 2(.066) 1.025V EVALUATION (TC500EV) TC500EV consists pre-assembled, inch inch printed circuit board that connects serial port dumb terminal. Design software also included. TC500EV helps reduce design time optimize converter performance. Please contact your local TelCom representative more information. PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 CINT 0.33µF 0.22µF CINT RINT 100k TC05 CREF 0.22µF ACOM TYPICAL WAVEFORMS VOUT CAP- DGND TC510 CMPTR MICRO CONTROLLER CREF VREF INPUT+ INPUT 0.01µF Figure TC510 Design Example (See "Design Example") VOUT 0.22µF CREF CREF VREF 0.01µF 100k 0.22µF 0.33µF 100k 0.01µF INPUT TC04 TC510 PRINTER PORT PORT 0378 CMPTR CINT DGND ACOM Figure TC510 Compatible Printer Port PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 CINT 0.33µF 0.22µF RINT 100k TC05 .01µF CREF 0.22µF VOUT CINT DGND TYPICAL WAVEFORMS ACOM INPUT INPUT INPUT INPUT INPUT INPUT INPUT4+ INPUT4- ANALOG LOGIC MICRO CONTROLLER CREF CMPTR CH1+ CH1- CH2+ CH2- CH3+ CH3- CH4+ CH4- TC514 Figure TC514 Design Example (See "Design Example") CH1+ VOUT CAP+ CREF INPUT INPUT INPUT INPUT CH1- CH2+ CH2- CH3+ VREF 0.22µF CH4+ TC04 TC514 0.01µF VREF CMPTR 100k ANALOG CONTROL LOGIC PRINTER PORT PORT 0378 CINT 0.22µF 0.33µF ACOM DGND Figure TC514 Compatible Printer Port PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 TYPICAL PERFORMANCE CHARACTERISTICS INTERNAL DC-TO-DC CONVERTER Output Voltage Load Current OUTPUT VOLTAGE LOAD CURRENT (mA) Slope 25°C OUTPUT VOLTAGE 25°C OUTPUT CURRENT (mA) Output Source Resistance Temperature OUTPUT SOURCE RESISTANCE IOUT 10mA Output Voltage Output Current Output Ripple Load Current OUTPUT RIPPLE PK-PK) LOAD CURRENT (mA) Oscillator Frequency Capacitance OSCILLATOR FREQUENCY (kHz) OSCILLATOR FREQUENCY (kHz) +25°C 10µF 25°C Osc. Freq. 100kHz TEMPERATURE (°C) Oscillator Frequency Temperature OSCILLATOR CAPACITANCE (pF) 1000 TEMPERATURE (°C) PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 PACKAGE DIMENSIONS 16-Pin Plastic (Narrow) .260 (6.60) .240 (6.10) .770 (19.56) .745 (18.92) .200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92) .310 (.787) .290 (.737) .040 (1.02) .020 (0.51) .015 (0.38) .008 (0.20) .400 (10.16) .310 (7.87) MIN. .110 (2.79) .090 (2.29) .070 (1.78) .045 (1.14) .022 (0.56) .015 (0.38) 16-Pin SOIC .299 (7.59) .419 (10.65) .290 (7.40) .394 (10.10) .413 (10.49) .398 (10.10) .104 (2.64) .097 (2.46) .050 (1.27) TYP. .019 (0.48) .014 (0.36) .012 (0.30) .004 (0.10) MAX. .050 (1.27) .015 (0.40) .013 (0.33) .009 (0.23) Dimensions: inches (mm) PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 PACKAGE DIMENSIONS (Cont.) 24-Pin Plastic (300 Mil.) .280 (7.11) .240 (6.10) .045 (1.14) .030 (0.76) 1.195 (30.35) 1.155 (29.34) .200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92) .310 (7.87) .290 (7.37) .040 (1.02) .015 (0.38) .015 (0.38) .008 (0.20) .400 (10.16) .310 (7.87) MIN. .110 (2.79) .090 (2.29) .070 (1.78) .045 (1.14) .022 (0.56) .015 (0.38) 24-Pin SOIC Wide .299 (7.59) .419 (10.65) .290 (740) .394 (10.10) .615 (15.62) .597 (15.16) .104 (2.64) .097 (2.46) .012 (0.30) .004 (0.10) MAX. .050 (1.27) .015 (0.40) .013 (0.33) .009 (0.23) .050 (1.27) TYP. .019 (0.48) .014 (0.36) Dimensions: inches (mm) PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 PACKAGE DIMENSIONS (Cont.) 28-Pin Plastic (300 Mil.) .288 (7.32) .240 (6.10) .030 (0.76) .045 (1.14) .310 (7.87) .290 (7.37) 1.400 (35.56) 1.345 (34.16) .200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92) .040 (1.02) .015 (0.38) .015 (0.38) .008 (0.20) .400 (10.16) .310 (7.87) MIN. .110 (2.79) .090 (2.29) .070 (1.78) .045 (1.14) .022 (0.56) .015 (0.38) 28-Pin SOIC .299 (7.59) .419 (10.65) .290 (7.40) .394 (10.10) .713 (18.11) .697 (17.70) .103 (2.62) .097(2.46) .019 (0.48) .014 (0.36) .012 (0.30) .004 (0.10) MAX. .050 (1.27) .015 (0.40) .013 (0.33) .009 (0.23) .050 (1.27) TYP. Dimensions: inches (mm) PRECISION ANALOG FRONT ENDS TC500 TC500A TC510 TC514 WIMA Corporation Capacitor Representatives (Tables Applications Section) Australia: ADILAM ELECTRONICS (PTY.) LTD. P.O. Nicole Close Bayswater 3153 Tel.: 3-761-4466 Fax: 3-761-4161 Canada: R-THETA INC. Matheson Blvd. East, Unit Mississauga, Ont. L4Z1Y6 Tel.: 905-890-0221 Fax: 905-890-1628 Hong Kong: REALTRONICS LTD. E-3, Hung-On Building King's Road Tel.: 25-70-1151 Fax: 28-06-8474 India: SUSAN AGENCIES P.O. 2138 Srirampuram P.O. Bangalore-560 Tel.: 080-332-0662 Fax: 080-332-4338 Israel: M.G.R. TECHNOLOGY P.O. 2229 Rehavot 76121 Tel.: 972-841-1719 Fax: 972-841-4178 Japan: UNIDUX INC. 5-1-21, Kyonan-Cho Musashino-Shi Tokyo Tel.: 04-2232-4111 Fax: 04-2232-0331 Malaysia: ELECTRONICS 346-B Jalan Jelutong 11600 Penang Tel.: 604-281-4518 Fax: 604-281-4515 Singapore: MICROTRONICS ASSOC. (PTE.) LTD. Lorong Bakar Batu 03-01, Kolam Ayer Ind. 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