TC530 TC530 TC534 TC534 PRECISION DATA ACQUISITION SUBSYSTEMS
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PRECISION DATA ACQUISITION SUBSYSTEMS
TC530 TC530 TC534 TC534
PRECISION DATA ACQUISITION SUBSYSTEMS
FEATURES
Precision Bits) Converter Wire Serial Port Flexible: User Trade-Off Conversion Speed Against Resolution Single Supply Operation Output Input, Differential Analog (TC534) Automatic Input Polarity Overrange Detection Operating Current Wide Analog Input Range ±4.2V Cost Effective
GENERAL DESCRIPTION
TC530/534 serial analog data acquisition subsystems ideal high precision measurements bits plus sign). TC530 consists dual slope integrating converter, negative power supply generator wire serial interface port. TC534 identical TC530, adds four channel differential input multiplexer. converter operating parameters (Auto Zero Integration time) programmable, allowing user trade-off conversion time resolution. Data conversion initiated when RESET input brought low. After conversion, data loaded into output shift register asserted indicating data available. converted data (plus Overrange polarity bits) held output shift register until read processor, until next conversion completed allowing user access data time. TC530/534 timebase derived from external crystal 2MHz (max), from external frequency source. TC530/534 requires single power supply features 10mA output which used supply negative bias other components system.
ORDERING INFORMATION
Part
TC530COI TC530CPJ TC534CKW TC534CPL TC530EV
Package
Temp. Range
28-Pin SOIC +70°C 28-Pin Plastic (300 Mil.) +70°C 44-Pin PQFP +70°C 40-Pin Plastic +70°C Evaluation TC530/534
FUNCTIONAL BLOCK DIAGRAM
RINT
CINT
CREF
100k
TC05
.01µF
(TC530 Only)
CREF CREF Dual Slope Converter CMPTR
VREF
VREF
ACOM
DIF. (TC534 Only)
0.01µF RESET
Optional Power-On Reset
TC534 (Only)
TC530 TC534
State Machine
DC-TO-DC CONVERTER
Serial Port DOUT DCLK
Oscillator
CAP+
OSCIN
OSCOUT
Negative Supply Output
TC530/534-3 11/14/96 TelCom Semiconductor reserves right make changes circuitry specifications devices.
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage Analog Input Voltage (VIN VIN) Logic Input Voltage (VDD 0.3V) (GND 0.3V) Ambient Operating Temperature Range Plastic Package +70°C SOIC Package +70°C PQFP Package +70°C Storage Temperature Range 65°C +150°C Lead Temperature (Soldering, sec) +300°C
*Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
ELECTRICAL CHARACTERISTICS
Symbol
VCCD ICCD
+25°C
+70°C
Parameter
Analog Power Supply Voltage Digital Power Supply Voltage TC530/534 Total Power Dissipation Supply Current PIN) Supply Current (VCCD PIN)
Test Conditions
Unit
VCCD
fOSC 1MHz
ELECTRICAL CHARACTERISTICS: VCCD, CREF 0.47µF, unless otherwise specified.
+25°C Symbol Analog
ZSTC FSTC VCMR VINT VREF Resolution Zero-Scale Error with Auto Zero Phase Point Linearity Deviation from Best Straight Line Zero-Scale Temperature Coefficient Roll-Over Error Full-Scale Temperature Coefficient Input Current Common-Mode Voltage Range Integrator Output Swing Analog Input Signal Range Voltage Reference Range Zero Crossing Comparator Note Note Ext. VREF T.C. 0ppm/°C 0.015 0.008 .012 0.030 0.015 0.005 0.015 0.012 Bits F.S.
+70°C Unit
Parameter
Test Conditions
Note Notes
0.045 F.S. F.S. µV/°C F.S. ppm/°C µsec
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
ELECTRICAL CHARACTERISTICS: Serial Port Interface: VCCD +5V, unless otherwise specified.
+25°C Symbol
+70°C
Parameter
Input Logic HIGH Level Input Logic Level Input Current (DI, DCLK) Logic Output Voltage (EOC)
Test Conditions
0.35
Unit
IOUT 250µA
ELECTRICAL CHARACTERISTICS: Serial Port Interface: VCCD +5V, unless otherwise specified.
+25°C Symbol
FXTL FEXT tDRS tPWL tPWH
+70°C
Parameter
Rise Fall Times (EOC, Crystal Frequency External Frequency OSCIN Read Setup Time Read Delay Time DCLK DOUT Delay DCLK Pulse Width DCLK HIGH Pulse Width Data Ready Delay
Test Conditions
10pF
Unit
nsec µsec nsec nsec nsec nsec nsec
ELECTRICAL CHARACTERISTICS: DC/DC Converter Section: +5V, unless otherwise specified.
+25°C Symbol
ROUT fCLK IOUT
+70°C
Parameter
Output Resistance Oscillator Frequency Output Current
Test Conditions
IOUT 10mA COSC
Unit
ELECTRICAL CHARACTERISTICS: Multiplexer: (Note unless otherwise specified.
+25°C Symbol
VINMAX RDSON
Notes:
+70°C
Parameter
Maximum Input Voltage Drain/Source Resistance
Test Conditions
Unit
Integrate time 66msec, Auto Zero time 66msec, VINT (pk) point linearity F.S. after full scale adjustment. Roll-over error related capacitor used CINT (See "Recommended Suppliers CINT", Table TC534 Only.
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
CONFIGURATIONS
CINT ACOM CREF
CREF
AGND VCCD RESET DCLK DOUT OSCIN
CINT ACOM CREF CREF
AGND VCCD RESET DCLK DOUT OSCIN
TC530CPJ
TC530COI
DGND OSCOUT
DGND OSCOUT
AGND
CINT
CINT ACOM CREF CREF
AGND CAP+ VCCD RESET ACOM CREF CREF
VCCD RESET
CH4- CH3- CH2- CH1- CH4+ CH3+ CH2+ CH1+ DGND
TC534CKW
CH4- CH3- CH2- CH1- CH4+
TC534CPL
DCLK DOUT OSCIN
CH1+
OSCOUT
CH3+ CH2+
DOUT
DCLK
OSCOUT
OSCIN
DGND
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
DESCRIPTION
(TC530 28-Pin PDIP, Mil.)
(TC530 28-Pin SOIC)
(TC534 40-Pin PDIP)
(TC534 44-Pin PQFP)
Symbol
Description
Analog Output. Negative power supply converter output reservoir capacitor connection. This output used provide negative bias other devices system. Analog Output. Integrator capacitor connection integrator output. Analog Input. Auto Zero capacitor connection. Analog Output. Integrator capacitor connection voltage buffer output. Analog Input. This ground analog switches converter. grounded most applications. ACOM input common (VIN Chx-) should within common mode range, CMR. Analog Input. Reference negative connection. Analog Input. Reference positive connection. Analog Input. External voltage reference negative connection. Analog Input. External voltage reference positive connection. Analog Input. Multiplexer channel negative differential analog input. Analog Input. Multiplexer channel negative differential analog input. Analog Input. Multiplexer channel negative differential analog input. Analog Input. Multiplexer channel negative differential analog input. Analog Input. Multiplexer channel positive differential analog input. Analog Input. Multiplexer channel positive differential analog input. Analog Input. Multiplexer channel positive differential analog input. Analog Input. Multiplexer channel positive differential analog input. Analog Input. Negative differential analog voltage input. Analog Input. Positive differential analog voltage input. Analog Input. Ground connection serial port circuit. Logic Level Input. Multiplexer address MSB. Logic Level Input. Multiplexer address LSB. Analog Input. Timebase state machine. This connects side AT-cut crystal having effective series resistance (typ) parallel capacitance 20pF external frequency source used clock TC530/534, this must left floating.
CINT ACOM
Used Used Used Used Used Used Used Used Used Used
Used Used Used Used Used Used Used Used Used Used
Used Used
Used Used
CREF CREF VREF VREF CH4-
CH3- CH2- CH1- CH4+ CH3+ CH2+ CH1+
DGND OSCOUT
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
DESCRIPTION (Cont.)
(TC530 (TC530 28-Pin 28-Pin PDIP, Mil.) SOIC)
(TC534 40-Pin PDIP)
(TC534 44-Pin PQFP)
Symbol
OSCIN
Description
Analog Input. This connects other side crystal described OSCOUT above. TC530/534 also clocked from external frequency source connected this pin. external frequency source must pulse wave form with minimum duty cycle rise fall times 15nsec (Max). external frequency source used, OSCOUT must left floating. maximum operating frequency 2MHz (crystal) 4MHz (external clock source) permitted. Logic Level Output. Serial port data output pin. This enabled only when high. Logic Input, Positive Negative Edge Triggered. Serial port clock. When high, serial data clocked TC530/534A DOUT) each HIGH-to-LOW transition DCLK. initialization data (LOAD VALUE) clocked into TC530/534 DIN) each LOW-to-HIGH transition DCLK. maximum serial port DCLK frequency 3MHz permitted. Logic Level Input. Serial port input pin. converter integration time (TINT) Auto Zero time (TAZ) values determined LOAD VALUE byte clocked into this pin. This initialization must take place power rewritten modified rewritten) time. LOAD VALUE clocked into first. Logic Level Input. This must brought perform write serial port (e.g. initialize converter). DOUT serial port enabled only when this high. Open Drain Output. End-of-Conversion (EOC) asserted time TC530/534 phase conversion. This occurs when either TC530/534 initiates normal phase, when RESET pulled high. returned high when TC530/534 exits Since driven immediately following completion conversion cycle, used DATA READY processor interrupt. Logic Level Input. necessary force TC530/534 into Auto Zero phase when power initially applied. This accomplished momentarily taking RESET high. Using port line from microprocessor, applying external system reset signal, connecting 0.01µF capacitor from RESET input VSS. Conversions performed continuously long RESET conversion halted when RESET high. RESET therefore used complex system momentarily suspend conversion (for example while address lines input multiplexer changing state). this case, RESET should pulled high only when avoid excessively long integrator discharge times which could result erroneous conversion (see Applications Section).
DOUT DCLK
RESET
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
DESCRIPTION (Cont.)
(TC530 28-Pin PDIP, Mil.)
(TC530 28-Pin SOIC)
(TC534 40-Pin PDIP)
(TC534 44-Pin PQFP)
Symbol
VCCD
Description
Analog Input. Power supply connection digital logic serial port. Proper power-up sequencing critical, Applications section. Input. negative power supply converter normally runs frequency 100kHz. This frequency slowed down reduce quiescent current connecting external capacitor between this (See Typical Characteristics). Analog Input. Power supply connection analog section DC-DC converter. Proper power-up sequencing critical, Applications section. Analog Input. Storage capacitor positive connection DC/DC converter. Analog Input. Ground connection DC/DC converter. Analog Input. Storage capacitor negative connection DC/DC converter. connect. connect signal these pins.
CAP+ AGND CAP-
READ TIMING
WRITE TIMING
WRITE DEFAULT TIMING
tLDL tDLS tPWL tLDS
DOUT tDRS DCLK tPWL DCLK
READ FORMAT
DOUT
DCLK
WRITE FORMAT
DOUT
DCLK
Polled Interrupt Operation Write Value Modified Cycle TC520A Data Sheet Figure
Figure Serial Port Timing
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
Conversion Phase Data Serial Port Transmit Register
DINT
Updated Data Ready
Updated Data Ready
Figure Converter Timing
DETAILED DESCRIPTION Dual Slope Integrating Converter
TC530/534 dual slope converter operates integrating input signal fixed time period, then applying opposite polarity reference voltage while timing period (counting clocks pulses) integrator output cross (deintegrating). resulting count read conversion data. simple mathematical expression that describes dual slope conversion Integrate Voltage Deintegrate Voltage
tINT 1/RINTCINT VIN(t)dt 1/RINTCINT
tDINT VREF
from which: (VIN)
Another inherent benefit noise immunity. Input noise spikes integrated averaged zero) during integration period. integrating converter noise immunity with attenuation rate least -20dB decade. Interference signals with frequencies integral multiples integration period are, most part, completely removed. this reason, integration period converter often established reject 50/60Hz line noise. ability reject such noise shown plot Figure addition phases required dual slope measurement (Integrate Deintegrate), TC530/534 performs additional adjustments minimize measurement error system offset voltages. resulting four internal operations (conversion phases) performed each measurement cycle are: Auto Zero (AZ), Integrator Output Zero (IZ), Input Integrate (INT) Reference Deintegrate (DINT). phases compensate system offset errors DINT phases perform actual conversion.
NORMAL MODE REJECTION (dB)
(tINT) (RINT)(CINT)
(VREF)
(tDINT) (RINT)(CINT)
MEASUREMENT PERIOD
therefore: VREF
tDINT tINT
where: VREF Reference Voltage tINT Integrate Time tDINT Reference Voltage Deintegrate Time Inspection equation shows dual slope converter accuracy unrelated integrating resistor capacitor values, long they stable throughout measurement cycle. This measurement technique inherently ratiometric (i.e., ratio between tINT tDINT times equal ratio between VREF).
0.1/T
INPUT FREQUENCY
10/T
Figure Integrating Converter Normal Mode Rejection
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
Auto Zero Phase (AZ) This phase compensates errors buffer, integrator comparator offset voltages. During this phase, internal feedback loop forces compensating error voltage auto zero capacitor (CAZ). duration phase programmable serial port (see also Programming Phase Duration paragraph this document). Input Integrate Phase (INT) this phase, current directly proportional differential input voltage sourced into integrating capacitor CINT. amount voltage stored CINT phase directly proportional applied differential input voltage. Input signal polarity (sign bit) determined this phase. Converter resolution conversion speed function duration phase, which programmable user serial port (see also Programming Phase Duration paragraph this document). shorter integration time, faster speed conversion, lower resolution. Conversely, longer integration time, greater resolution, slower speed conversion. Reference Deintegrate Phase (DINT) This phase consists measuring time integrator output return rate determined external reference voltage) from initial voltage resulting timer data stored output shift register converted analog data. Integrator Output Zero Phase (IZ) This phase guarantees integrator output zero volts when phase entered that only true system offset voltages will compensated for. internal converter timing derived from frequency source OSCIN OSCOUT. This frequency source must either externally provided clock signal, external crystal. external clock used, must connected OSCIN OSCOUT must remain floating. crystal used, must connected between OSCIN OSCOUT physically located close OSCIN OSCOUT pins possible. either case, incoming clock frequency divided four resulting clock serves internal TC530/534 timebase. Select Integration Time Integration time must picked multiple period line frequency. example, tINT times 33msec, 66msec 132msec maximize 60Hz line rejection. Estimate Crystal Frequency Crystal frequencies high 2MHz allowed. Crystal frequency estimated using:
2(R) tINT
where:
Desired Converter Resolution counts) Input Frequency MHz) Integration Time seconds)
Calculate LOAD VALUE
[LOAD VALUE]10 (tINT)(FIN) 1024
adjusted standard value during this step. resulting base LOAD VALUE must converted hexadecimal number, then loaded into serial port prior initiating conversion. DINT Phase Timing duration DINT phase function amount voltage stored integrator capacitor during INT, value VREF. DINT phase initiated immediately following terminated when integrator output zero-crossing detected. general, maximum number counts chosen DINT twice that (with VREF chosen VIN(max)/2). System RESET TC530/534 must forced into state when power first applied. .01µF capacitor connected from RESET external system reset logic signal) used momentarily drive RESET high minimum 100msec.
Selecting Component Values TC530/534
Calculate Integrating Resistor (RINT) desired full-scale input voltage amplifier output current capability determine value RINT. buffer integrator amplifiers each have fullscale current 20µA. value RINT therefore directly calculated follows:
APPLICATIONS Programming TC530/534
Phase Duration: These phases have equal duration determined crystal external) frequency timer initialization byte (LOAD VALUE). Timing selected follows:
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
RINT VINMAX
Table Recommend Capacitor CINT
Value
0.22 0.33 0.47
Suggested Part Number*
WIMA MK12 .1/63/20 WIMA MK12 .22/63/20 WIMA MK12 .33/63/20 WIMA MK12 .47/63/20
where: VINMAX Maximum Input Voltage (full count voltage) RINT Integrating Resistor loop stability, RINT should 50k. Select Reference (CREF) Auto Zero (CAZ) Capacitors CREF must leakage capacitors (such polypropylene). slower conversion rate, larger value CREF must Recommended capacitors CREF shown Table Larger values CREF also used limit roll-over errors. Table CREF Selection Conversions Typical Value Suggested Second CREF, (µF) Part Number less 0.22 0.47 WIMA MK12 .1/63/20 WIMA MK12 .22/63/20 WIMA MK12 .47/63/20
*WIMA Corp. listing last page this data sheet.
Calculate VREF reference deintegration voltage calculated using: VREF Volts) 0.9)(CINT)(RINT) 2(tINT)
Serial Port Communication with TC530/534 accomplished over wire serial port. Data clocked into rising edge DCLK clocked DOUT falling edge DCLK. must HIGH read converted data from serial port write LOAD VALUE TC530/ 534. Load Value Write Cycle (Figure Following power-up reset pulse, LOAD VALUE (which sets duration INT) must next transmitted serial port. accomplish this, processor monitors state (which available hardware output DOUT). taken initiate write cycle only when (during phase). (Failure observe cause offset voltage developed across CINT resulting erroneous readings). LOAD VALUE data clocked DCLK. processor then terminates write cycle taking high. (Data transferred from serial input shift register time base counter rising edge R/W, data conversion initiated). Data Read Cycle (Figure Data shifted serial port following order: Conversion (EOC), Overrange (OVR), Sign (SGN), conversion data (MSB first). When high, state polled simply reading state DOUT. This allows processor determine data available without connecting additional wire output (this especially useful polled environment). Input Multiplexer (TC534 Only) input, differential multiplexer included TC534. states channel address lines determine which differential pair routed converter input. least significant address (i.e.,
*WIMA Corp. listing last page this data sheet.
Calculate Integrating Capacitor (CINT) integrating capacitor must selected maximize integrator output voltage swing. integrator output voltage swing defined absolute value VSS) less 0.9V (i.e. |VDD 0.9V| |VSS 0.9V|). Using 20µA buffer maximum output current, value integrating capacitor calculated using following equation:
CINT (µF)
where: tINT CINT
(tINT)(20) 0.9)
Integration Period Applied Supply Voltage Integrator Capacitor Value
critical that integrating capacitor have very dielectric absorption. capacitors example such chemistry. Table summarizes various capacitors suitable CINT.
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
Timing Status Power-up RESET Undefined Write LOAD VALUE Serial Port Converter Normal Service
Conversion Phase
DINT
brought during serial port write cycle
Continuous Conversions HIGH strobes LOAD VALUE into timebase starts conversion
Converter held state RESET
RESET
DCLK
LOAD VALUE
Figure TC530/534 Initialization Load Value Write Cycle
channel selected when multiplexer designed operated differential mode. single-ended inputs, CHx- input channel under selection must connected ground reference associated with input signal.
charge pump clock operates typical frequency 100kHz. lower quiescent current desired, charge pump clock slowed connecting external capacitor from VDD. Reference typical characteristics curves.
APPLICATIONS Design Example
DCLK
DOUT
Figure shows typical TC534 interrupt-driven application. Timing component values calculated from equations recommendations made Dual Slope Integrating Converter Programming TC530/534 sections this document. connection processor input interrupt-driven applications only. polled systems, output available DOUT). GIVEN REQUIRED RESOLUTION: Bits (65,536 counts.) MAXIMUM VIN: POWER SUPPLY VOLTAGE: 60Hz SYSTEM Pick Integration time (tINT) 66msec Estimate crystal frequency 2R/tINT 65536/66 1.98MHz (use 2MHz)
Figure Serial Port Data Read Cycle
DC/DC Converter on-board, TC7660H-type charge pump supplies negative bias converter circuitry, well external devices. charge pump develops negative output voltage moving charge from power supply reservoir capacitor commutating capacitor connected CAP+ CAP- inputs.
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
Calculate LOAD VALUE LOAD VALUE (tINT)(FIN)/1024 [128]10 [128]10 Calculate RINT RINT VINMAX/20 2/20 100k Calculate CINT maximum (4V) integrator output swing CINT (tINT)(20 -6)/ 0.9) (.066)(20 -6)/(4.1) .32µF (use closest value: 0.33µF) NOTE: TelCom recommended capacitor: WIMA p/n: MK12 .33/63/10 Choose CREF based conversion rate Conversions/sec 1/(tAZ tINT 2tINT 2msec) 1/(66msec 66msec 132msec 2msec) conversions/sec from which CREF 0.22µF (see Table NOTE: TelCom recommended capacitor: WIMA p/n: MK12 .22/63/10 Calculate VREF VREF Volts 0.9)(CINT)(RINT) 2(tINT) (4.1)(0.33x10 -6)(105)/2(.066) 1.025V
Power Supply Sequencing
Improper sequencing power supply inputs (VDD VCCD) potentially cause improper power-up sequence occur. Circuit Design/Layout Considerations below. Failing insure proper power-up sequence cause spurious operation.
Ciruit Design/Layout Considerations
Separate ground return paths should used analog digital circuitry. ground planes trace fill analog circuit sections highly recommended EXCEPT around integrator section CREF, CAZ. (CINT, CREF, CAZ, RINT). Stray capacitance between these nodes ground appears parallel with components themselves affect measurement accuracy.
.01µF 10µF
.01µF
RESET VCCD DOUT DCLK TC534 OSCIN 2MHz OSCOUT DGND
VCCD .01µF Analog Inputs
(Optional)
PROCESSOR
0.33µF
0.22µF
CINT
RINT 100k CREF 0.22µF Channel Control
CREF
100k
VREF
100k
VREF
(1.03V)
TC04 (1.25V VREF)
ACOM
Figure TC530/534 Typical Application
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
Improper sequencing power supply inputs (VDD VCCD) potentially cause improper power-up sequence occur internal state machines. recommended that digital supply, VCCD, powered first. method insuring correct power-up sequence delay analog supply using series resistor capacitor. Figure TC530/534 Typical Application. Decoupling capacitors, preferably higher value electrolytic tantulum parallel with small ceramic tantalum, should used liberally. This includes bypassing supply connections active components voltage reference. Critical components should chosen stability noise. metal-film resistor RINT Polypropylene Polyphenelyne Sulfide (PPS) capacitors CINT, CAZ, CREF highly recommended. inputs integrator section very high impedance nodes. Leakage from these critical nodes contribute measurement error. guard-ring should used protect integrator section from stray leakage. Circuit assemblies should scrupulously clean prevent presence contamination from assembly, handling, cleaning itself. Minutely conductive trace contaminates, easily ignored most applications, adversely affect performance high impedance circuits. input integrator sections should made compact close TC53x possible. Digital other dynamic signal conductors should kept from TC53x's analog section possible. microcontroller other host logic should kept quiet during measurement cycle. Background activites such keypad scanning, display refreshing, power switching introduce noise.
TC530EV Evaluation
TC530EV consists pre-assembled circuit board that connects serial port dumb terminal. Also included WindowsTM* ExcelTM*-based design utility that calculates component LOAD values based user input, prints finished circuit schematic. Please contact your local TelCom representative more information, point your browser http://www.telcomsemi.com.
*All Trademarks Trade Names property their respective owners.
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
TYPICAL CHARACTERISTICS
Output Voltage Load Current 25°C 25°C Output Voltage Output Current
OUTPUT VOLTAGE
OUTPUT VOLTAGE
LOAD CURRENT (mA)
Slope
OUTPUT CURRENT (mA) Output Source Resistance Temperature
Output Ripple Load Current
OUTPUT SOURCE RESISTANCE
OUTPUT RIPPLE PK-PK)
25°C Osc. Freq. 100kHz
IOUT 10mA
10µF
LOAD CURRENT (mA) Oscillator Frequency Capacitance +25°C
TEMPERATURE (°C) Oscillator Frequency Temperature
OSCILLATOR FREQUENCY (kHz)
OSCILLATOR FREQUENCY (kHz)
OSCILLATOR CAPACITANCE (pF) 1000
TEMPERATURE (°C)
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
PACKAGE DIMENSIONS 28-Pin Plastic (300 Mil.)
.288 (7.32) .240 (6.10)
.030 (0.76) .045 (1.14) .310 (7.87) .290 (7.37)
1.400 (35.56) 1.345 (34.16) .200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92)
.040 (1.02) .015 (0.38)
.015 (0.38) .008 (0.20) .400 (10.16) .310 (7.87)
MIN.
.110 (2.79) .090 (2.29)
.070 (1.78) .045 (1.14)
.022 (0.56) .015 (0.38)
28-Pin SOIC
.299 (7.59) .419 (10.65) .290 (7.40) .394 (10.10)
.713 (18.11) .697 (17.70) .103 (2.62) .097(2.46) .019 (0.48) .014 (0.36) .012 (0.30) .004 (0.10)
MAX. .050 (1.27) .015 (0.40)
.013 (0.33) .009 (0.23)
.050 (1.27) TYP.
Dimensions: inches (mm)
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
PACKAGE DIMENSIONS (Cont.) 40-Pin Plastic
.555 (14.10) .530 (13.46)
2.065 (52.45) 2.035 (51.49)
.610 (15.49) .590 (14.99)
.200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92) .040 (1.02) .020 (0.51) .015 (0.38) .008 (0.20) .700 (17.78) .610 (15.50) .022 (0.56) .015 (0.38) MIN.
.110 (2.79) .090 (2.29)
.070 (1.78) .045 (1.14)
44-Pin
MAX. .009 (0.23) .005 (0.13)
.018 (0.45) .012 (0.30)
.041 (1.03) .026 (0.65)
.398 (10.10) .390 (9.90) .557 (14.15) .537 (13.65)
.031 (.080) TYP.
.398 (10.10) .390 (9.90) .557 (14.15) .537 (13.65)
.010 (0.25) TYP. .083 (2.10) .075 (1.90) .096 (2.45) MAX.
Dimensions: inches (mm)
PRECISION DATA ACQUISITION SUBSYSTEMS TC530 TC534
WIMA Corporation Capacitor Representatives (Tables
Australia: ADILAM ELECTRONICS (PTY.) LTD. P.O. Nicole Close Bayswater 3153 Tel.: Fax: Canada: R-THETA INC. Matheson Blvd. East, Unit Mississauga, Ont. L4Z1Y6 Tel.: 05-8 90-02 Fax: 05-8 90-16 Hong Kong: REALTRONICS LTD. E-3, Hung-On Building King's Road Tel.: Fax: India: SUSAN AGENCIES P.O. 2138 Srirampuram P.O. Bangalore-560 Tel.: 80-3 Fax: 80-3 Israel: M.G.R. TECHNOLOGY P.O. 2229 Rehavot 76121 Tel.: 72-8-41 Fax: 72-8-41 Japan: UNIDUX INC. 5-1-21, Kyonan-Cho Musashino-Shi Tokyo Tel.: 22-32-41 Fax: 22-32-03 Malaysia: ELECTRONICS 346-B Jalan Jelutong 11600 Penang Tel.: 04-2 Fax: 04-2 Singapore: MICROTRONICS ASSOC. (PTE.) LTD. Lorong Bakar Batu 03-01, Kolam Ayer Ind. Park Singapore 1334 Tel.: 65-7 48-18 Tlx: Fax: 65-7 43-30 South Africa: KOPP ELECTRONICS LIMITED P.O. 3853 2128 Rivonia Tel.: 11-4 44-23 Fax: 11-4 44-17 South Korea: YONG ELECTRONIC #201, Sungwook Bldg. 1460-16, Seocho-Dong Seocho-Ku Seoul, Korea Tel.: 2-52 Fax: Taiwan, R.O.C.: SOLOMON TECHNOLOGY CORP. Floor Lane Sec. Kang Road Taipei Tel.: 86-2-7 Fax: 86-2-7 Thailand: MICROTRONICS THAI LTD. 50/68 T.T. Court Cheng Wattana Road Amphur Pak-Kreed Nonthaburi 11120 Tel.: 62-5 Ext. Fax: 62-5 USA: INTER-TECHNICAL GROUP, INC. WIMA DIVISION Clearbrook Road P.O. Elmsford, 10523-0535 Tel.: 914-347-2474 Fax: 914-347-7230 ELECTRONICS, INC. 4215, Burbank, Blvd. Burbank, 91505 Tel.: 18-8 46-39 Fax: 18-8 46-11
Venezuela: MAGNETICA, S.A. Apartado 78117 Caracas 1074 Tel.: 58-2-2 Fax: 58-2-2
Sales Offices
TelCom Semiconductor 1300 Terra Bella Avenue P.O. 7267 Mountain View, 94039-7267 TEL: 650-968-9241 FAX: 650-967-1590 E-Mail: liter@c2smtp.telcom-semi.com TelCom Semiconductor Austin Product Center 9101 Burnet Suite Austin, 78758 TEL: 512-873-7100 FAX: 512-873-8236 TelCom Semiconductor H.K. Ltd. Chuk Street, Ground Floor Kong, Kowloon Hong Kong TEL: 852-2324-0122 FAX: 852-2354-9957
Printed U.S.A.
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