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MC74AC74/74ACT74 dual D-type flip-flop with Asynchronous Clear inputs
Top Searches for this datasheetMC74AC74, MC74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop MC74AC74/74ACT74 dual D-type flip-flop with Asynchronous Clear inputs complementary (Q,Q) outputs. Information input transferred outputs positive edge clock pulse. Clock triggering occurs voltage level clock pulse directly related transition time positive-going pulse. After Clock Pulse input threshold voltage been passed, Data input locked information present will transferred outputs until next rising edge Clock Pulse input. Asynchronous Inputs: input (Set) sets HIGH level input (Clear) sets level Clear independent clock Simultaneous makes both HIGH PDIP-14 SUFFIX CASE SO-14 SUFFIX CASE 751A Outputs Source/Sink ACT74 Compatible Inputs These devices available Pb-free package(s). Specifications herein apply both standard Pb-free devices. Please website www.onsemi.com specific Pb-free orderable part numbers, contact your local Semiconductor sales office representative. TSSOP-14 SUFFIX CASE 948G EIAJ-14 SUFFIX CASE ORDERING INFORMATION Device Package PDIP-14 PDIP-14 SOIC-14 SOIC-14 SOIC-14 SOIC-14 TSSOP-14 Shipping Units/Rail Units/Rail Units/Rail 2500 Tape Reel Units/Rail 2500 Tape Reel Units/Rail MC74AC74N MC74ACT74N MC74AC74D MC74AC74DR2 MC74ACT74D MC74ACT74DR2 MC74AC74DT MC74AC74DTR2 MC74ACT74DT MC74ACT74DTR2 MC74AC74M MC74AC74MEL MC74ACT74M MC74ACT74MEL Figure Pinout: 14-Lead Packages Conductors (Top View) ASSIGNMENT CP1, CD1, SD1, FUNCTION Data Inputs Clock Pulse Inputs Direct Clear Inputs Direct Inputs Outputs TSSOP-14 2500 Tape Reel TSSOP-14 Units/Rail TSSOP-14 2500 Tape Reel EIAJ-14 EIAJ-14 EIAJ-14 EIAJ-14 Units/Rail 2000 Tape Reel Units/Rail 2000 Tape Reel DEVICE MARKING INFORMATION general marking information device marking section page this data sheet. Semiconductor Components Industries, LLC, 2006 March, 2006 Rev. Publication Order Number: MC74AC74/D MC74AC74, MC74ACT74 TRUTH TABLE (Each Half) Inputs NOTE: Outputs HIGH Voltage Level Voltage Level Immaterial; LOW-to-HIGH Clock Transition Q0(Q0) Previous Q(Q) before LOW-to-HIGH Transition Clock Figure Logic Symbol NOTE: This diagram provided only understanding logic operations should used estimate propagation delays. Figure Logic Diagram MAXIMUM RATINGS* Symbol Vout Iout Tstg Parameter Supply Voltage (Referenced GND) Input Voltage (Referenced GND) Output Voltage (Referenced GND) Input Current, Output Sink/Source Current, Current Output Storage Temperature Value -0.5 +7.0 -0.5 +0.5 -0.5 +0.5 +150 Unit *Maximum Ratings those values beyond which damage device occur. Functional operation should restricted Recommended Operating Conditions. MC74AC74, MC74ACT74 RECOMMENDED OPERATING CONDITIONS Symbol Vin, Vout Supply Voltage Input Voltage, Output Voltage (Ref. GND) Input Rise Fall Time (Note Devices except Schmitt Inputs Input Rise Fall Time (Note Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current High Output Current Parameter ns/V ns/V Unit from VCC; individual Data Sheets devices that differ from typical input rise fall times. from individual Data Sheets devices that differ from typical input rise fall times. CHARACTERISTICS 74AC Symbol Parameter +25°C Minimum High Level Input Voltage Maximum Level Input Voltage Minimum High Level Output Voltage Maximum Level Output Voltage IOLD IOHD Maximum Input Leakage Current Minimum Dynamic Output Current Maximum Quiescent Supply Current 2.25 2.75 2.25 2.75 2.99 4.49 5.49 0.002 0.001 0.001 74AC -40°C +85°C Unit Conditions Guaranteed Limits 3.15 3.85 1.35 1.65 2.56 3.86 4.86 0.36 0.36 0.36 ±0.1 3.15 3.85 1.35 1.65 2.46 3.76 4.76 0.44 0.44 0.44 ±1.0 VOUT VOUT IOUT *VIN IOUT *VIN VCC, VOLD 1.65 VOHD 3.85 *All outputs loaded; thresholds input associated with output under test. Maximum test duration output loaded time. NOTE: guaranteed less than equal respective limit VCC. MC74AC74, MC74ACT74 CHARACTERISTICS (For Figures Waveforms Section Semiconductor FACT Data Book, DL138/D) 74AC Symbol Parameter VCC* fmax tPLH tPHL tPLH tPHL Maximum Clock Frequency Propagation Delay Propagation Delay Propagation Delay Propagation Delay +25°C 10.5 12.5 12.0 13.5 10.0 14.0 10.0 74AC -40°C +85°C 13.0 10.0 13.5 10.5 16.0 10.5 14.5 10.5 Unit Fig. *Voltage Range ±0.3 Voltage Range ±0.5 OPERATING REQUIREMENTS 74AC Symbol Parameter VCC* trec Set-up Time, HIGH Hold Time, HIGH Pulse Width Recovery TIme -2.0 -1.5 -2.5 -2.0 +25°C 74AC -40°C +85°C Unit Fig. Guaranteed Minimum *Voltage Range ±0.3 Voltage Range ±0.5 MC74AC74, MC74ACT74 CHARACTERISTICS 74ACT Symbol Parameter +25°C Minimum High Level Input Voltage Maximum Level Input Voltage Minimum High Level Output Voltage Maximum Level Output Voltage ICCT IOLD IOHD Maximum Input Leakage Current Additional Max. ICC/Input Minimum Dynamic Output Current Maximum Quiescent Supply Current 4.49 5.49 0.001 0.001 74ACT -40°C +85°C Unit Conditions Guaranteed Limits 3.86 4.86 0.36 0.36 ±0.1 3.76 4.76 0.44 0.44 ±1.0 VOUT VOUT IOUT *VIN IOUT *VIN VCC, VOLD 1.65 VOHD 3.85 *All outputs loaded; thresholds input associated with output under test. Maximum test duration output loaded time. CHARACTERISTICS (For Figures Waveforms Section Semiconductor FACT Data Book, DL138/D) 74ACT Symbol Parameter VCC* fmax tPLH tPHL tPLH tPHL Maximum Clock Frequency Propagation Delay Propagation Delay Propagation Delay Propagation Delay +25°C 10.0 11.0 10.0 74ACT -40°C +85°C 10.5 11.5 13.0 11.5 Unit Fig. *Voltage Range ±0.5 MC74AC74, MC74ACT74 OPERATING REQUIREMENTS 74ACT Symbol Parameter VCC* trec Set-up Time, HIGH Hold Time, HIGH Pulse Width Recovery TIme -0.5 -2.5 +25°C 74ACT -40°C +85°C Unit Fig. Guaranteed Minimum *Voltage Range ±0.5 CAPACITANCE Symbol Input Capacitance Power Dissipation Capacitance Parameter Value Unit Test Conditions MC74AC74, MC74ACT74 MARKING DIAGRAMS PDIP-14 MC74AC74N AWLYYWW SO-14 AC74 AWLYWW TSSOP-14 ALYW EIAJ-14 74AC74 ALYW MC74ACT74N AWLYYWW ACT74 AWLYWW ALYW Assembly Location Wafer Year Work Week 74ACT74 ALYW MC74AC74, MC74ACT74 PACKAGE DIMENSIONS PDIP-14 SUFFIX PLASTIC PACKAGE CASE 646-06 ISSUE NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: INCH. DIMENSION CENTER LEADS WHEN FORMED PARALLEL. DIMENSION DOES INCLUDE MOLD FLASH. ROUNDED CORNERS OPTIONAL. INCHES 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 0.015 0.039 MILLIMETERS 18.16 18.80 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 0.38 1.01 SEATING PLANE 0.13 (0.005) SO-14 SUFFIX PLASTIC SOIC PACKAGE CASE 751A-03 ISSUE 0.25 (0.010) NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.127 (0.005) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. SEATING PLANE 0.25 (0.010) MILLIMETERS 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 0.19 0.25 0.10 0.25 5.80 6.20 0.25 0.50 INCHES 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 0.008 0.009 0.004 0.009 0.228 0.244 0.010 0.019 MC74AC74, MC74ACT74 PACKAGE DIMENSIONS TSSOP-14 SUFFIX PLASTIC TSSOP PACKAGE CASE 948G-01 ISSUE NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSION DOES INCLUDE MOLD FLASH, PROTRUSIONS GATE BURRS. MOLD FLASH GATE BURRS SHALL EXCEED 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE INTERLEAD FLASH PROTRUSION. INTERLEAD FLASH PROTRUSION SHALL EXCEED 0.25 (0.010) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.08 (0.003) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. TERMINAL NUMBERS SHOWN REFERENCE ONLY. DIMENSION DETERMINED DATUM PLANE -W-. MILLIMETERS 4.90 5.10 4.30 4.50 1.20 0.05 0.15 0.50 0.75 0.65 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 INCHES 0.193 0.200 0.169 0.177 0.047 0.002 0.006 0.020 0.030 0.026 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 0.10 (0.004) 0.15 (0.006) 0.25 (0.010) IDENT. DETAIL 0.15 (0.006) 0.10 (0.004) SEATING PLANE DETAIL EIAJ-14 SUFFIX PLASTIC EIAJ PACKAGE CASE 965-01 ISSUE DETAIL VIEW 0.13 (0.005) 0.10 (0.004) SECTION NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD FLASH PROTRUSIONS MEASURED PARTING LINE. MOLD FLASH PROTRUSIONS SHALL EXCEED 0.15 (0.006) SIDE. TERMINAL NUMBERS SHOWN REFERENCE ONLY. LEAD WIDTH DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.08 (0.003) TOTAL EXCESS LEAD WIDTH DIMENSION MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT LOCATED LOWER RADIUS FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS ADJACENT LEAD 0.46 0.018). 0.50 MILLIMETERS 2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 7.40 8.20 0.50 0.85 1.10 1.50 0.70 0.90 1.42 INCHES 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 0.291 0.323 0.020 0.033 0.043 0.059 0.028 0.035 0.056 MC74AC74, MC74ACT74 Notes MC74AC74, MC74ACT74 Notes Semiconductor registered trademarks Semiconductor Components Industries, (SCILLC). SCILLC reserves right make changes without further notice products herein. SCILLC makes warranty, representation guarantee regarding suitability products particular purpose, does SCILLC assume liability arising application product circuit, specifically disclaims liability, including without limitation special, consequential incidental damages. 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