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STD90 / MDL90 0.35µm 3.3V CMOS Standard Cell Library for Pure Logic / MDL Products

Marketing Team Samsung Electronics Co., Ltd System LSI Business, ASIC Division, ASIC Marketing Team San #24, Nongseo-Ri, Kiheung-Eup, Yongin-City, Kyunggi-Do, Korea TEL FAX 82-22-331-209-1930 82-2-331-209-1919

STD90 / MDL90 0.35µm 3.3V CMOS Standard Cell Library for Pure Logic / MDL Products
Head Office Samsung Electronics Co., Ltd System LSI Business, ASIC Division, SOC Design Technology San #24, Nongseo-Ri, Kiheung-Eup, Yongin-City, Kyunggi-Do, Korea TEL 82-2-760-6500, 6501(Hot Line) FAX 82-331-209-4920 http://www.intl.samsungsemi.com Printed in the Republic of Korea
Marketing Team Samsung Electronics Co., Ltd System LSI Business, ASIC Division, ASIC Marketing Team San #24, Nongseo-Ri, Kiheung-Eup, Yongin-City, Kyunggi-Do, Korea TEL FAX 82-22-331-209-1930 82-2-331-209-1919
Introduction
This databook contains information about STD90 / MDL90 0.35µm 3.3V TLM / QLM standard cell library for pure logic products developed by SEC (Samsung Electronics Corporation). The "library" basically contains various kinds of internal and I / O cells and soft-macros which are used for developing ASIC (Application Specific Integrated Circuit). It also includes a design kit helping designers to work in a workstation platform, and all sorts of design environments needed for an automatic chip design. There are seven chapters in this databook: Chapter 1 Chapter 2 Chapter 3 Chapter 4 Chapter 5 Chapter 6 Introduction Electrical Characteristics Internal Macrocells Input / Output Cells Compiled Macrocells PLL
In this databook each cell is followed by its AC electrical characteristics, and these characteristic values are almost equal when the corresponding cell is operated in a real chip. The purpose of this databook is to prevent any misuse or misapplication of STD90 / MDL90 cell library by providing precise information about the cell list, electrical data, directions for use, and matters demanding special attention.
Samsung ASIC
STD90 / MDL90
Contents
Introduction
1.1 Library Description ........................................................1-1 1.2 Features ................................................................1-2 1.3 CAE Support .............................................................1-3 1.4 Product Family ...........................................................1-3 1.4.1 Internal Macrocells ..................................................1-3 1.4.2 Compiled Macrocells ................................................1-3 1.4.3 Input / Output Cells...................................................1-4 1.5 Propagation Delays .........................................................1-6 1.6 Delay Model ..............................................................1-12 1.7 Testability Design Methodology................................................1-15 1.8 Maximum Fanouts ..........................................................1-18 1.9 Product Line-Up ...........................................................1-24 1.10 Packages Capability by Lead Count ...........................................1-25 1.11 Power Dissipation.........................................................1-27 1.12 VDD / VSS Rules and Guidelines...............................................1-30 1.13 Crystal Oscillator Considerations .............................................1-35
Electrical Characteristics
DC Electrical Characteristics.....................................................2-1 Input Buffer DC Curves .........................................................2-5 Output Drive Capabilities........................................................2-7
Internal Macrocells
Overview ....................................................................3-1 Summary Tables ..............................................................3-2 Logic Cells AD2DH / AD2 / AD2D2 / AD2D4 .....................................................3-15 AD3DH / AD3 / AD3D2 / AD3D4 .....................................................3-17 AD4DH / AD4 / AD4D2 / AD4D4 .....................................................3-19 AD5 / AD5D2 / AD5D4 ...........................................................3-22 ND2DH / ND2 / ND2D2 / ND2D4 ....................................................3-25 ND3DH / ND3 / ND3D2 / ND3D4 ....................................................3-27 ND4DH / ND4 / ND4D2 / ND4D2B / ND4D4 .............................................3-30
Samsung ASIC
STD90 / MDL90
Samsung ASIC
STD90 / MDL90
Samsung ASIC
STD90 / MDL90
Samsung ASIC
Contents MX4 / MX4D2 / MX4D4 ...........................................................3-453 MX8 / MX8D2 / MX8D4 ...........................................................3-457
Input / Output Cells
Overview ....................................................................4-1 Summary Tables ..............................................................4-2 Input Buffers PvIC / PvICD / PvICU............................................................4-8 PvIS / PvISD / PvISU ............................................................4-11 Output Buffers PvOByz .....................................................................4-15 PvODyz .....................................................................4-21 PvOTyz .....................................................................4-30 Bi-Directional Buffers PvBaDyz / PvBaUDyz ...........................................................4-44 PvBaTyz / PvBaDTyz / PvBaUTyz ...................................................4-44 Input Clock Drivers PSCKDCaby.................................................................4-46 PSCKDSaby.................................................................4-51 Oscillators PSOSCK(1 / 2) ................................................................4-57 PSOSCK(17 / 27) ..............................................................4-60 PSOSCM(1 / 2 / 3) ..............................................................4-63 PSOSCM(16 / 26 / 36) ...........................................................4-67 PCI Buffers PIPCI .......................................................................4-73 POPCI ......................................................................4-74 PBPCI ......................................................................4-75 PTIPCI......................................................................4-76 PTOPCI .....................................................................4-77 PTBPCI .....................................................................4-78 USB I / O Buffers PBUSB / PBUSB1 ..............................................................4-81 Power Pads VDD3(I / P / O / IP / OP / T) ..........................................................4-88 VSS(I / P / O / IP / OP / T)............................................................4-88
Samsung ASIC
STD90 / MDL90
Compiled Macrocells
AL2007LX ...................................................................6-1 AL2007LA ...................................................................6-9
STD90 / MDL90
Samsung ASIC