Fast CMOS Multilevel Pipeline Register These devices multilevel p

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Fast CMOS Multilevel Pipeline Register These devices multilevel p

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CD29FCT520T
Fast CMOS Multilevel Pipeline Register
These devices multilevel pipeline registers containing four 8-bit positive triggered registers which configured dual 2-level single 4-level pipeline. These products designed temporary storage storage delays pipelined systems. When data entered into first level CD29FCT520T, existing data first level moved second level. shift instruction puts registers hold.
December 1996
Features
Advanced micron CMOS Technology These Devices Pinout Function Compatible with IDT29FCT520, QS29FCT520 AMD's Am29520 Four 8-bit High-Speed Registers Hold, Transfer, Load Instructions Dual Two-Level Single Four-Level Pipeline Operation Input Output Levels, Reducing Problematic Ground Bounce High Output Drive 48mA Extremely Static Power (Typ)
Ordering Information
PART NUMBER CD29FCT520ACD29FCT520ATQM CD29FCT520BCD29FCT520BTQM TEMP. RANGE (oC) PACKAGE SOIC QSOP SOIC QSOP PKG. M24.3-P M24.15-P M24.3-P M24.15-P
NOTE: QSOP commonly known SSOP. When ordering, entire part number. suffix obtain variant tape reel.
Pinout
CD29FCT520T (QSOP, SOIC) VIEW
CAUTION: These devices sensitive electrostatic discharge. Users should follow proper Handling Procedures. Copyright Harris Corporation 1996
File Number
4164.1
4-13
CD29FCT520T Functional Block Diagram
D0-D7
REGISTER CONTROL OCTAL REGISTER OCTAL REGISTER
OCTAL REGISTER
OCTAL REGISTER
Y0-Y7
Register Selection
REGISTER
Descriptions
NAME DESCRIPTION Output Enable Input (Active LOW) Three-State Output Port Clock Input. Enter Data into Registers LOW-to-HIGH Transistions Instruction Inputs Multiplexer Select. Inputs Either Register Data Avaialbe Output Ports Register Inputs Register Outputs Ground Power
CD29FCT520T Data Loading
(Note
FIGURE DUAL 2-LEVEL NOTE: hold.
FIGURE SINGLE 4-LEVEL
4-14
CD29FCT520T
Absolute Maximum Ratings
Input Voltage -0.5V 7.0V Output Current 120mA
Thermal Information
Thermal Resistance (Typical, Note (oC/W) SOIC Package QSOP Package Maximum Junction Temperature 150oC Maximum Storage Temperature Range .-65oC 150oC Maximum Lead Temperature (Soldering 10s) 300oC (Lead Tips Only)
Operating Conditions
Operating Temperature Range -40oC 85oC Supply Voltage Ground Potential Inputs Only -0.5V 7.0V Supply Voltage Ground Potential Outputs Only. -0.5V 7.0V
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTE: measured with component mounted evaluation board free air.
Electrical Specifications
PARAMETER SYMBOL (NOTE TEST CONDITIONS (NOTE UNITS
ELECTRICAL SPECIFICATIONS Over Operating Range, -40oC 85oC, 5.0V Output HIGH Voltage Output Voltage Input HIGH Voltage Input Voltage Input HIGH Current Input Current High Impedance Output Current Clamp Diode Voltage Short Circuit Current Power Down Disable Input Hysteresis IOZH IOZL IOFF COUT VOUT Min, -18mA (Note VOUT GND, VOUT 4.5V Min, Min, Guaranteed Logic HIGH Level Guaranteed Logic Level VOUT 2.7V VOUT 0.5V -15.0mA 48mA -0.7 -120 0.50 -1.2
CAPACITANCE 25oC, 1MHz Input Capacitance (Note Output Capacitance (Note
POWER SUPPLY SPECIFICATIONS Quiescent Power Supply Current Supply Current Input HIGH Supply Current Input (Note Total Power Supply Current (Note ICCD Max, Outputs Open Input Toggling Duty Cycle Max, Outputs Open 10MHz, Duty Cycle Toggling 5MHz, Duty Cycle Max, Outputs Open 10MHz, Duty Cycle Eight Bits Toggling 5MHz, Duty Cycle 3.4V (Note 0.15 0.25
3.4V 3.4V
(Note (Note (Note 16.3 (Note
4-15
CD29FCT520T
Switching Specifications Over Operating Range
(NOTE TEST CONDITIONS (NOTE 14.0 13.0 12.0 15.0 (NOTE UNITS
PARAMETER Propagation Delay Propagation Delay Setup Time HIGH Hold Time HIGH Setup Time HIGH Hold Time HIGH Output Enable Time Output Disable Time (Note Clock Pulse Width HIGH (Note NOTES:
SYMBOL tPLH, tPHL tPLH, tPHL tPZH, tPZL tPHZ, tPLZ
conditions shown Min, appropriate value specified under Electrical Specifications applicable device type. Typical values 5.0V, 25oC ambient maximum loading. more than output should shorted time. Duration test should exceed second. This parameter determined device characterization production tested. driven input (VIN 3.4V, control inputs only); other inputs GND. This parameter directly testable, derived Total Power Supply Calculations. Values these conditions examples formula. These limits guaranteed tested. IQUIESCENT IINPUTS IDYNAMIC DHNT ICCD (fCP/2 fINI) Quiescent Current Power Supply Current High Input (VIN 3.4V) Duty Cycle Inputs High Number Inputs ICCD Dynamic Current Caused Input Transition Pair (HLH LHL) Clock Frequency Register Devices (Zero Non-Register Devices) Input Frequency Number Inputs currents milliamps frequencies megahertz. test circuit wave forms. Minimum limits guaranteed tested Propagation Delays. This parameter guaranteed production tested.
4-16
CD29FCT520T Test Circuits Waveforms
7.0V PULSE GENERATOR 50pF VOUT
SWITCH POSITION TEST tPLZ, tPZL tPHZ, tPZH, tPLH, tPHL SWITCH Closed Open
DEFINITIONS: Load capacitance, includes probe capacitance. Termination resistance, should equal ZOUT Pulse Generator.
NOTE: Pulse Generator Pulses: Rate 1.0MHz; ZOUT 2.5ns. FIGURE TEST CIRCUIT
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET, CLEAR, ETC. SYNCHRONOUS CONTROL PRESET, CLEAR, CLOCK ENABLE, ETC. tREM
1.5V 1.5V 1.5V 1.5V LOW-HIGH-LOW PULSE HIGH-LOW-HIGH PULSE 1.5V
1.5V
FIGURE SETUP, HOLD, RELEASE TIMING
FIGURE PULSE WIDTH
ENABLE CONTROL INPUT tPZL 3.5V OUTPUT NORMALLY SWITCH CLOSED tPZH OUTPUT NORMALLY HIGH SWITCH OPEN 1.5V 1.5V
DISABLE 1.5V tPLZ 3.5V 0.3V tPHZ 0.3V OUTPUT OPPOSITE PHASE INPUT TRANSITION tPLH tPHL 1.5V SAME PHASE INPUT TRANSITION tPLH tPHL 1.5V 1.5V
FIGURE ENABLE DISABLE TIMING
FIGURE PROPAGATION DELAY
4-17

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