The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.    


Datasheet Search Engine   
 
Part # or Description: • 5V RS232 Driver • 2SC5066* • "Real Time Clock" • "USB connector" • "blue led" 5mm • 10 watt zener diode • 2N3055* motorola
 
Search Tip: Try entering the part number only. Include a wildcard (eg. lm317* or 1n4148*)

 

 

HSP45116 Daughter Board HSP45116-DB daughter board designed mate


Datasheet Thumbnail

  

Download PDF



Top Searches for this datasheet



HSP45116-DB
HSP45116 Daughter Board
HSP45116-DB daughter board designed mate with HSP-EVAL rapid evaluation prototyping HSP45116 Numerically Controlled Oscillator Modulator. Together, board provides mechanism evaluate HSP45116 operation using PCbased control. shown Figure HSP45116-DB maps input, output, control signals HSP45116 three headers. These headers mate with connectors board HSPEVAL interface HSP45116's various control signals with HSPEVAL's data busses. This interface establishes path PCbased control HSP45116-DB HSP-EVAL. PCbased software package supplied which controls operation HSP45116-DB/HSP-EVAL board set. software package provides user with command line interface graphical user interface daughter board control. Since software supports data acquisition from HSP45116, software based signal analysis used quantify part performance. degree control exerted software varies depending upon clock supplied HSP45116-DB. high speed clock supplied HSP-EVAL's board oscillator external clock pin, software used exert real time control. software controlled clock provided, HSP45116-DB driven with user defined data while storing results back later analysis. HSP45116-DB layer printed circuit board which comes populated with HSP45116GC-25. based software required control daughter board HSP-EVAL also provided
USER'S MANUAL
September 1994
Features
Designed with HSP-EVAL Access HSP45116s input, output, control signals through three Headers HSP45116 control signal states through hardware configuration software. separate software packages daughter board control High speed supported
Applications
Based performance analysis HSP45116 when used with HSP-EVAL Rapid prototyping
HSP45116 Daughter Board
CAUTION: These devices sensitive electrostatic discharge. Users should follow proper I.C. Handling Procedures. Copyright Harris Corporation 1993 PCis Registered Trademark
File Number
3367.2
HSP45116-DB Getting Started
This section describes initial evaluation system set-up HSP45116-DB HSP-EVAL board set. system set-up consists mother/daughter board assembly, software installation, system test verify proper operation board set. Assembly evaluation board assembled mating HSP45116-DB daughter board with HSP-EVAL motherboard. This accomplished inserting header pins sticking through bottom (solder side) daughter board into three 2x25 connectors motherboard. Proper alignment requires that headers HSP45116-DB mate with connectors HSP-EVAL. moderate amount force required seat header pins motherboard connectors.
HSP45116-DB CONFIGURATION JUMPER FIELD CONTROL HEADER (J2) CONFIGURATION JUMPER FIELD OUTPUT HEADER (J3) INPUT HEADER (J1) EXT_CLK OSC_CLK CTL0 OE_BUS1 OE_BUS2 OE_BUS3 OECTLLO OECTLHI ADDR0 ADDR1 ADDR2 ADDR3 BOARD ADDRESS JUMPERS OUTPUT ENABLE JUMPERS CLOCK SELECT JUMPERS
System Requirements Evaluation Board Software system targeted HSP45116-DB software (NCOM-SOFT) interface with evaluation board must meet following requirements: -IBM PC/XT/AT, PS/2, 100% compatible with minimum 640K random access memory (RAM) (NCOM-SOFT does require extended memory) least 200kB free disk space your hard disk -DOS Version higher -One parallel port with D-Sub connector
Software Installation
distribution diskette contains program called INSTALL.EXE which installs NCOM-SOFT software onto target hard disk. Note: steps this section assume installing NCOM-SOFT from diskette drive onto hard drive different configuration used, sub-
CONTROL
RIN0-15
RO0-15
IMIN0-15
HSP45116
IO0-15
FIGURE HSP45116-DB BLOCK DIAGRAM
ADDR4 ADDR5 ADDR6 ADDR7 STAT0 STAT1 STAT2 STAT3 PCRD0 PCRD1 SR_RD N.C. N.C. DEFAULT JUMPER PLACEMENT INDICATOR OUPUT SELECT JUMPERS
part initial assembly, HSP-EVAL HSP45116-DB must provided with default jumper configuration insure proper operation with system test software. Each board leaving factory supplied with default configuration, respective configurations examined here completeness. motherboard's default configuration realized inserting jumpers into HSPEVAL's jumper field shown Figure (see HSPEVAL User's Manual more detailed information). default configuration HSP45116-DB requires jumper placement across Configuration Jumper Fields Control Header shown Table Before using board with supplied software, power must supplied boards, HSP-EVAL must connected parallel port target Power provided boards connecting pins header HSP-EVAL standard supply. alternative, power supplied through HSP-EVAL's 96-Pin connectors. HSP-EVAL connected target connecting HSP-EVAL's 26PIN shrouded header PC's parallel port using supplied ribbon cable.
FIGURE CONFIGURATION JUMPER FIELD
HSP45116-DB
stitute letter drive where diskette located drive Substitute letter hard drive drive start installation program: Make sure computer prompt displayed. Type: C:<Enter> Modifications AUTOEXEC.BAT NCOM-SOFT programs, must able find executable files.To ensure that always find NCOM-SOFT executables, modify search path include location NCOM-SOFT directory. example, NCOM-SOFT programs installed drive subdirectory called \NCOMSOFT, following line existing Path command AUTOEXEC.BAT file: ;C:\NCOMSOFT your AUTOEXEC.BAT file does contain PATH command, following command file: PATH=C:\NCOMSOFT Reboot that search path changes will take effect. System Test Test software provided verify operation HSPEVAL HSP45116-DB board set. Prior performing system test, assumed that evaluation board been assembled configured described above, power
Create subdirectory contain NCOM-SOFT Programs typing: \NCOMSOFT <Enter> Change current directory NCOMSOFT directory \NCOMSOFT <Enter> Start installation process typing: A:INSTALL <Enter> INSTALL program down loads NCOM-SOFT programs, NCOMCTRL NCOM_CMD, NCOMSOFT subdirectory target hard drive. addition, subdirectory called NCOM_CHK created into which files used perform functional verification downloaded.
TABLE OVERLAY DEFAULT JUMPER CONFIGURATION ONTO SIGNAL MAPPING CONTROL HEADER CONFIGURATION JUMPER FIELDS NUMBER SIGNAL MNEMONIC CLKOUT BUF_OUT SIGNAL MNEMONIC BUF_IN CLK_IN PULL PULL N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. PULL ENTIREG# ENI# CLROFR# LOAD# PMSEL MUX0 MUX1 PACI# PEAK# RBYTILD# MODPI/2PI# SIGNAL MNEMONIC N.C. N.C. CTL1 CTL3 CTL5 CTL7 CTL8 CTL10 CTL12 CTL14 SIGNAL MNEMONIC N.C. CTL4 CTL6 CTL9 CTL11 CTL13 CTL15 N.C. N.C. N.C. N.C. N.C. N.C. SIGNAL MNEMONIC N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. ENPHREG# ENOFREG# N.C. ENCFREG# BINFMT# N.C. N.C. N.C. MOD0 MOD1 SIGNAL MNEMONIC NUMBER
JUMPER CONFIGURATION FIELD
CONTROL HEADER
JUMPER CONFIGURATION FIELD
HSP45116-DB
been applied board set, 26-Pin shrouded header board HSP-EVAL been connected parallel port target supplied cable. system test initiated following: Change current directory that which contains software required system test typing C:\NCOMSOFT\NCOM_CHK <Enter> system test software typing NCOM_CHK <Enter> NCOM_CHK.BAT batch file makes Command Line Interface (See Command Line Interface Section) initialize evaluation board set, clock data vector through HSP45116-DB, store output file. output file then compared, using command COMP, file containing vectors generated properly functioning board set. files match, assembled board passes operational verification. NOTE: user should answer COMP command prompt compare additional files. NCOM_CHK system test assumes that LPT1 printer port being used communication with HSP-EVAL. another printer port used, Command Line Interface, NCOM_CMD, must used configure software using other port (see NCOM_CMD's command). control panel, shown Figure supports loading HSP45116's frequency, phase, timer accumulator configuration registers, well setting state various control inputs. addition, control panel used specify files which serve data source HSP45116's RIN0-15 IMIN0-15 inputs data sink RO0-15 IO0-15 outputs. Operation control panel software dependent clock source provided HSP45116-DB specified clock select portion control panel. HSP45116-DB Control Panel invoked typing: NCOMCTRL <Enter> Port Configuration Communication between Control Panel software evaluation board requires that software knows which PC's parallel ports being used communication with HSP-EVAL which board address HSPEVAL been configured for. default configuration assumes that LPT1 being used that HSP-EVAL been configured board address Port Configuration inspected opening port configuration window using function key. shown Figure window displays available parallel ports their addresses. Also displayed current port HSP-EVAL board address being used Control Panel software. current port HSP-EVAL address changed opening Port Configuration Window, using up/down arrow keys select desired parameter, toggling space change selection. Proper operation control panel software requires that HSP-EVAL board
HSP45116-DB Control Panel Software
HSP45116-DB Control Panel graphical user interface controlling operation HSP-EVAL/ HSP45116-DB board compatible.
HSP45116-DB CONTROL PANEL CLOCK SELECT MANUAL PORT OSC. EXTERNAL CLKA FILE SELECT INPUT FILE: INPUT.DAT OUTPUT FILE: OUTPUT.DAT
CONTROL SIGNALS ENPHREG# CLROFR# LOAD BINFMT# PMSEL
(RINO-15) (IMINO-15)
7FFF 0000
HSP45116 NCOM
0000 0000
(RO0-15) (IO0-15)
CLOCK NUMBER
CENTER FREQUENCY REGISTER OFFSET FREQUENCY REGISTER
40000000 00000000
PHASE OFFSET REGISTER TIME ACCUMULATOR REGISTER
0000 00000000
HELP
START CLOCK
PORT CONFIG
QUIT
FIGURE CONTROL PANEL SCREEN DISPLAYED
HSP45116-DB
address specified port configuration window matches address jumpered Address Selection section HSP-EVAL's jumper field (see HSP-EVAL users manual). Clock Select Clock Select portion control panel used tell Control Panel software which four different clock sources being supplied HSP45116-DB. choices include different software generated clocks (Manual Port CLK), oscillator clock provided HSP-EVAL (OSC. CLK), externally supplied clock (External CLK). clock mode selected must consistent with Clock Select jumper position HSP-EVAL's jumper field. either Manual Port specified Control Panel, clock select jumper must inserted CTL0 position. either OSC. External specified, jumper must inserted OSC_CLK EXT_CLK position respectively. Manual mode, single clock pulses sent HSP45116 depressing function key. clock pulse software generated setting clearing CTL0 Control Register HSP-EVAL. After each clock HSP45116-DB's RO0-15 IO0-15 outputs serialized read into display Control Panel. this mode, file input output supported (See File Select section). Port mode, free running clock sent HSP45116 depressing function key. clock pulses software generated continually setting clearing CTL0 CTL0-15 register HSPEVAL. After each clock HSP45116-DB's RO0-15 IO0-15 outputs serialized read into display Control Panel. this mode, file input output supported (See File Select section). OSC. mode, HSP45116 supplied with clock oscillator on-board HSP-EVAL. this mode, Control Panel used modifying various control signal states, configuration registers, complex inputs NCOM. However, software unable provide file based evaluation board since data rate required oscillator clock orders magnitude greater than that possible through parallel port result, Control Panel disables file based display NCOM output this mode. External mode, HSP45116 supplied with clock through 96-Pin connector HSPEVAL. this mode, Control Panel used modifying control signal states, various configuration registers, complex inputs NCOM. However, software does support file based evaluation board since data rate required much greater than that capable through parallel port this mode, Control Panel disables file based display NCOM output. clocking mode used control panel indicated position "check mark" symbol within Clock Select portion Control Panel. different clocking mode selected positioning "check mark" symbol front desired clocking mode. position "check mark" changed using cursor keys move active window desired position then toggling space move "check mark".
HSP45116-DB CONTROL PANEL CLOCK SELECT MANUAL PORT OSC. EXTERNAL CLKA FILE SELECT PORT CONFIGURATION INPUT FILE: 1MHZCMP OUTPUT FILE: UPCNVRTI ADDRESS (HEX) AVAILABLE PRINTER PORTS LPT1 CONTROL SIGNALS ENPHREG# CLROFR# LOAD BINFMT# PMSEL LPT2 LPT3 CURRENT PORT SELECTION CURRENT HSP-EVAL ADDRESS LPT1 0x3BC 0x378 0x3BC 0-15) 0-15)
CENTER OFFSET FREQ
00000000
HELP
RETURN
QUIT
FIGURE PORT CONFIGURATION WINDOW DISPLAYED
HSP45116-DB
File Select File Select portion Control Panel allows user specify files which used input data source output data sink HSP45116-DB. file based input selected, Control Panel software down loads data from specified file registers HSP-EVAL clocks data into RIN0-15 IMIN0-15 inputs HSP45116. file based output specified, software reads data RO0-15 IO0-15 outputs HSP45116 HSP-EVAL's output shift register stores data specified file. input data loaded input busses prior software generated clock output data read from output busses following software generated clock. File based activated using space toggle "check mark" symbol window proceeding Input Output File identifier Control Panel's File section. either file input output activated, respective file name must entered window right file identifier. File input output disabled time toggling respective "check mark". Note: file only valid when either `Manual CLK' `Port CLK' clocking modes selected disabled other clocking modes specified. input output data files ASCII based have format described Appendix There limitation input output file size, care must taken file output specified since data collected file until file output deactivated NCOMCTRL program exited. HSP45116 Complex Data Inputs data windows left HSP45116 icon used specify hexadecimal values which drive part's complex inputs, RIN0-15 IMIN0-15. Data entered into these windows down loaded registers HSP-EVAL which drive HSP45116-DB's complex input busses. Note: jumpers must inserted into OE_BUS1 OE_BUS2 positions HSP-EVAL's jumper field enable register outputs containing complex data. complex inputs changed entering hexadecimal values into data windows. contents particular data window edited depressing <Enter> using arrow keys position cursor hexadecimal character modified. file input selected, complex inputs driven with data from specified file. each clock data windows updated with complex sample down loaded from file. this mode complex input data windows manually updated. Control Signals Control Signal portion control panel used define state various control signal inputs HSP45116. logical state control signal using Space toggle signal state window preceding specified control signal. control signal states displayed Control Panel active HSP45116, respective control signals must jumpered HSP-EVAL's CTL0-15 HSP45116-DB's jumper field shown default jumper configuration displayed Table (See Jumper Configuration Section). Control Signal descriptions contained HSP45116 datasheet. Configuration Registers bottom control panel displays four data windows which contain hexadecimal values loaded into HSP45116's Center Frequency, Offset Frequency, Phase Offset, Time Accumulator registers. contents particular configuration register updated entering hexadecimal value into data window. current value window also edited depressing <Enter> using arrow keys position cursor hexadecimal character modified. value entered into data window down loaded HSP45116 after leaving window arrow keys terminating edit <Enter> key. data window associated with Phase Offset Register, 16-Bit hexadecimal value down loaded into HSP45116's Phase Input Register. data window three 32-bit windows associated with Center Frequency, Offset Frequency, Timer Accumulator registers, 32-bit value loaded into HSP45116's Input Registers either ENCFREG#, ENOFREG#, ENTIREG# asserted respectively. Then, enable signal de-asserted registered chip another software generated clock. either Manual Port Clock modes, generated clock issued insure that corresponding enable signal registered chip (see HSP45116 datasheet). either other clock modes, assumed that clock rate high enough register enable signal before another configuration register updated. proper operation, register enables, WR#, A0-1 inputs must jumpered HSP-EVAL's control inputs Control Header shown Default Jumper Configuration (Table Help Help windows provided source information control panel usage. help window activated function key, contains information based current active data window.
Command Line Interface
alternative control panel, command line interface provided which allows user control HSP45116-DB issuing commands from prompt. commands perform basic configuration functions down loading data HSP45116 through HSP-EVAL. Command Line program following usage: NCOM_CMD [Command] [ARG [ARG
HSP45116-DB
Command specifies actions taken, Arguments (ARG1,ARG2) represent additional data required command. example, HSP45116's Center Frequency Register would loaded with value 40000000(HEX) typing: NCOM_CMD 40000000 <Enter> summary command contained Table Proper operation Command Line software insured default jumper configurations HSP45116-DB HSP-EVAL shown Table Figure used. However, modifications this configuration required depending clock source mode operation. Command Line Interface gives user ability control evaluation board batch files system calls from programming language. NCOM_CHK.-
TABLE COMMAND LIST COMMAND LINE INTERFACE SOFTWARE COMMAND ARGUMENT 32-BIT HEXADECIMAL VALUE 32-BIT HEXADECIMAL VALUE 32-BIT HEXADECIMAL VALUE 16-BIT HEXADECIMAL VALUE 16-BIT HEXADECIMAL VALUE 16-BIT HEXADECIMAL VALUE 16-BIT HEXADECIMAL VALUE INPUT FILE OUTPUT FILE ARGUMENT COMMAND DESCRIPTION Loads HSP45116's Center Frequency Register with hexadecimal value specified Argument Notes Loads HSP45116's Offset Frequency Register with hexadecimal value specified Argument Notes Loads HSP45116's Time Accumulator Register with hexadecimal value specified Argument Notes Loads HSP45116's Phase Input Register with hexadecimal value specified Argument Note Loads HSP-EVAL's Control Register with 16-bit value specified Argument Loads specified value into HSP-EVAL register (Input Register driving Real Input (RIN0-15) HSP45116-DB. Note Loads Specified Value Into HSP-EVAL Register (Input Register Driving Imaginary Input (IMIN0-15) HSP45116-DB. Note Down loads complex samples stored file specified Argument into HSP-EVAL registers driving Real Imaginary Input Buses HSP45116-DB, clocks data into part, stores complex output file specified Argument Input Output file formats specified Appendix Notes 3,4&5. Issues software generated clock pulse HSP45116-DB toggling CTL0 HSP-EVAL's CTL0-15 register. Note Reads data HSP45116-DB's RO0-15 IO0-15 outputs prints data screen. Note 4&5. Display signal mapping between Control Register HSP45116 control inputs (Assumes Default Jumper Configuration shown Table Display current state Control Register. Display printer port HSP-EVAL board address that NCOM_CMD program using communication between HSP-EVAL. HSPEVAL board address inserting jumper ADDR0-7 Positions it's Jumper Field. PORT NUMBER (1-3) BOARD ADDRESS (0-7) Change Printer Port HSP-EVAL Board Address That NCOM_CMD Program Using Communication Between HSP-EVAL Those Specified Arguments 1&2. HSP-EVAL Board Address Inserting Jumper ADDR0-7 Positions It's Jumper Field. List available commands together with brief description
commands load specified 32-bit value into HSP45116's input registers. After configuration data been loaded into registers, corresponding enable, ENCFREG#, ENOFREG#, ENTIREG# asserted. enable signal then registered chip single software generated clock provided jumper inserted CTL0 position jumper field HSP-EVAL. Otherwise, assumed that selected clock source fast enough register enable signal prior subsequent load another 32-bit configuration register. register enables, ENCFREG#, ENOFREG#, ENTIREG# must jumpered Control default configuration shown Table When commands issued load registers internal HSP45116, assumed that microprocessor interface signals, A0-1 jumpered CTL0-15 default configuration shown Table complex input buses HSP45116-DB driven HSP-EVAL's Input Registers 1&2, their outputs must enabled placing jumpers OE_BUS1 OE_BUS2 positions jumper field HSP-EVAL. This command only valid software generated clock source been selected inserting jumper CTL0 position HSPEVAL's jumper field. Commands required read data HSP45116-DB's complex outputs only function properly output shift register selected reading inserting jumper SR_RD position HSP-EVAL's jumper field.
HSP45116-DB
file discussed System Test section example Command Line program might used batch file. connector HSP-EVAL, HSP45116's real imaginary outputs HSP-EVAL's Output OUT2_0-15 OUT1_0-15, respectively.
TABLE SIGNAL ASSIGNMENTS POSITION OUTPUT CONNECTOR NUMBER SIGNAL MNEMONIC RO11 RO13 RO15 IO10 IO12 IO14 SIGNAL MNEMONIC RO10 RO12 RO14 IO11 IO13 IO15 CLKOUT TICO# PACO# N.C. N.C. N.C.
Signal Headers
HSP45116-DB maps NCOM's inputs outputs three 50-pin signal headers, J1-J3. signal headers used connect NCOM's control pins HSP-EVAL's control busses through three position connectors. Control Panel Command Line interface software control operation HSP45116-DB down loading data registers on-board HSPEVAL which drive monitor control busses. Input Header maps 16-bit busses real imaginary inputs HSP45116, RIN0-15 IMIN0-15. addition, bi-directional clock line routed this header shown signal Table When mated with connector HSP-EVAL, HSP45116's real imaginary inputs HSP-EVAL's Input IN2_0-15 IN1_0-15, respectively.
TABLE SIGNAL ASSIGNMENTS POSITION INPUT CONNECTOR NUMBER SIGNAL MNEMONIC N.C. RIN0 RIN2 RIN4 RIN6 RIN9 RIN11 RIN13 RIN15 N.C. IMIN1 IMIN3 IMIN5 IMIN7 IMIN8 IMIN10 IMIN12 IMIN14 SIGNAL MNEMONIC RIN1 RIN3 RIN5 RIN7 RIN8 RIN10 RIN12 RIN14 IMIN0 IMIN2 IMIN4 IMIN6 IMIN9 IMIN11 IMIN13 IMIN15 CLKIN N.C.
Control Header maps 16-bit HSP45116's control input, C0-15, provides jumper positions Configuration Jumper Fields that flank header. When mated with HSP-EVAL's Control Connector HSP45116's Control Inputs, C0-15, mapped HSP-EVAL's Input IN3_0-15, jumper positions mapped HSP-EVAL's Control Bus, CTL015. signal Control Header shown Table
Configuration Jumper Field
Configuration Jumper Fields flank either side Control Header shown Table Positions within Jumper Field's signal rows various HSP45116 control inputs. control inputs jumpered ground HSP-EVAL's CTL4-15 Control Header. control signal mapped jumpered CTL4-15, signal pulled high. Configuration Jumper Field also used select whether HSP45116's clock source provided through Input Header Output Header. jumpers inserted shown Figure clock signal supplied through CLK_IN Input Header drives
Output Header maps 16-bit busses real imaginary outputs HSP45116, RO0-15 IO015. addition, HSP45116 status outputs, PACO# TICO#, HSP45116 output enables, OER# OEI#, bi-directional clock line routed this header shown signal Table When mated with
HSP45116-DB
buffer whose output clocks HSP45116. jumper inserted between feeds buffered clock signal CLK_OUT Output Header. jumpers inserted shown Figure CLK_OUT Output Connector drives clock buffer which turn drives clock input HSP45116. jumper inserted between allows Input Header's CLK_IN driven buffer output. NOTE: jumper placement shown Figure standard configuration.
Appendix
Data File Structures Input/Output data files used HSP45116-DB Control Panel Command Line Interface software contain complex data samples. data files consist seven line header followed data itself. header section must follow this format: Line Line Line Line Line Line Comment Comment Comment Comment Comment line header should replaced number complex samples file. Following header, complex samples listed with real part listed first followed complex part. real imaginary components complex data sample represented two's complement values. result, real imaginary parts data sample integer values bounded 32767 -32768. CMPRFILE installed NCOM_CHK sub-directory example input data file structure.
FIGURE JUMPER CONFIGURATION CLOCK SUPPLIED THROUGH INPUT HEADER
(Real Component) (Imaginary Component)
FIGURE JUMPER CONFIGURATION CLOCK SUPPLIED THROUGH OUTPUT HEADER
HSP45116-DB shipped from factory with default jumper configuration shown overlay heavy lines onto signal Table Control Panel Command Line Interface software properly control operation HSP45116, assumed that HSP45116 control inputs jumpered specified default configuration. Also, system test software, NCOM_CHK, must using default configuration.
TICO
PACO
RIN0 RIN2 RIN4 RIN6
RIN9 RIN11 RIN13 RIN15 RO11 RO13 RO15 0.01µF 0.01µF 0.01µF 0.01µF IO11 IO13 IO15 CKOUT IMIN0 IMIN2 IMIN4 IMIN6 IMIN9 IMIN11 IMIN13 IMIN15 CKIN IO10 IO12 IO14
RIN1 RIN3 RIN5 RIN7 RIN8 RIN10 RIN12 RIN14 RO10 RO12 RO14
0.01µF RIN[0.15] IMIN[0.15]
IMIN1 IMIN3 IMIN5 IMIN7 IMIN8 IMIN10 IMIN12 IMIN14
IO[0.15]
RO[0.15]
CKOUT CKIN
C[0.15] NCOMCK
HSP45116-DB
CTL0 CTL2 CTL4 CTL6 CTL1 CTL3 CTL5 CTL7 CTL8 CTL10 CTL12 CTL14 74AC86
74AC86
74AC86
ENTIREG
74AC86
ENPHREG ENOFREG CTL9 CTL11 CTL13 CTL15 ENCFREG BINFMT
CLROFR LOAD PMSEL MUX0 MUX1 PACI PEAK RBYTILD MODPI/2PI
MOD0 MOD1
RIN8 RIN9 RIN10 RIN11 RIN12 RIN13 RIN14 RIN15
RIN0 RIN1 RIN2 RIN3 RIN4 RIN5 RIN6 RIN7
RIN[0.15]
RIN0 RIN1 RIN2 RIN3 RIN4 RIN5 RIN6 RIN7 RIN8 RIN9 RIN10 RIN11 RIN12 RIN13 RIN14 RIN15 HSP45116 RO10 RO11 RO12 RO13 RO14 RO15 RO16 RO17 RO18 RO19 RO[0.15] RIN0 RIN1 RIN2 RIN3 RIN4 RIN5 RIN6 RIN7 RIN8 RIN9 RIN10 RIN11 RIN12 RIN13 RIN14 RIN15 RIN16 RIN17 RIN18 RO10 RO11 RO12 RO13 RO14 RO15
IMIN0 IMIN1 IMIN2 IMIN3 IMIN4 IMIN5 IMIN6 IMIN7
IMIN8 IMIN9 IMIN10 IMIN11 IMIN12 IMIN13 IMIN14 IMIN15
IMIN[0.15]
CIN0 CIN1 CIN2 CIN3 CIN4 CIN5 CIN6 CIN7
CIN8 CIN9 CIN10 CIN11 CIN12 CIN13 CIN14 CIN15
IMIN0 IMIN1 IMIN2 IMIN3 IMIN4 IMIN5 IMIN6 IMIN7 IMIN8 IMIN9 IMIN10 IMIN11 IMIN12 IMIN13 IMIN14 IMIN15
IO10 IO11 IO12 IO13 IO14 IO15 IO[0.15]
HSP45116-DB
ADR0 ADR1 MOD0 MOD1 OUTMUX0 OUTMUX1
IO10 IO11 IO12 IO13 IO14 IO15 IO16 IO17 IO18 IO19 PACO TICO DET0 DET1
IMIN0 IMIN1 IMIN2 IMIN3 IMIN4 IMIN5 IMIN6 IMIN7 IMIN8 IMIN9 IMIN10 IMIN11 IMIN12 IMIN13 IMIN14 IMIN15 IMIN16 IMIN17 IMIN18
C[0.15]
PACO
NCOMCK
MOD0
TICO
MOD1
MUX0
MUX1
ENPHREG
ENOFREG
ENCFREG ENTIREG
MODPI/2PI
CLROFR
LOAD
PMSEL
RBYTILD
PACI
BINFMT
PEAK
HSP45116-DB HSP-EVAL Limited Warranty
Harris warrants HSP-EVAL free defects material workmanship under normal period ninety (90) days. Harris also warrants that HSP-EVAL User's Manual substantially complete contains information which Harris considers necessary HSPEVAL, that HSP-EVAL functions substantially described HSP-EVAL User's Manual. Harris will replace HSP-EVAL Harris' sole duty under this warranty only ship postage prepaid, Harris within days such acquisition provide proof date acquisition. This limited warranty does extend products which have been damaged result accident, misuse, abuse, result service modification anyone other than Harris Harris' authorized representatives. Harris makes other express implied warranty with respect HSP-EVAL other than limited warranty forth above. Harris disclaims implied warranties merchantability and/or fitness particular purpose. event, implied warranties shall limited duration this warranty. liability Harris, any, shall under tort, contract other legal theory limited actual price paid such product shall event include incidental, consequential, special indirect damages kind, even Harris aware possibility such damages. Harris reserves right revise make changes this manual HSP-EVAL from time time without obligation notify person provide person with, such revisions changes.
HSP45116-DB Software License Agreement
return purchase price HSP45116-DB product, Purchaser receives from Harris Corporation ("Harris") non-exclusive non-transferrable (except below) license under Harris copyrights software subject following terms conditions: Software protected both United States Copyright International Treaty provisions. Therefore, must treat Software like other copyrighted material (e.g. book) copy, distribute make derivatives part thereof except that either make copy Software solely archival purposes, transfer Software single hard disk provided keep original solely backup archival purposes. Software transferred third party permanent basis provided retain copies recipient agrees, writing Harris, terms this Agreement. software package contains both 3.5" 5.25" disks, then only disks appropriate your single-user computer. other disks another computer loan, rent, lease, transfer them another user except part permanent transfer provided above) Software.
Harris Semiconductor products sold description only. Harris Semiconductor reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Harris believed accurate reliable. However, responsibility assumed Harris subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Harris subsidiaries.
Sales Office Headquarters
general information regarding Harris Semiconductor products, call 1-800-4-HARRIS UNITED STATES Harris Semiconductor 883, Mail Stop 53-210 Melbourne, 32902 TEL: 1-800-442-7747 (407) 729-4984 FAX: (407) 729-5321 EUROPE Harris Semiconductor Mercure Center 100, Fusee 1130 Brussels, Belgium TEL: (32) 2-724-2111 SOUTH ASIA Harris Semiconductor H.K. Ltd. 13/F Fourseas Building 208-212 Nathan Road Tsimshatsui, Kowloon Hong Kong TEL: (852) 723-6339 NORTH ASIA Harris K.K. Kojimachi-Nakata Bldg. 5-3-5 Kojimachi Chiyoda-ku, Tokyo Japan TEL: (81) 3-3265-7571 TEL: (81) 3-3265-7572 (Sales)

Other recent searches


VSBU-120-T305A - VSBU-120-T305A   VSBU-120-T305A Datasheet
VRS51x550 - VRS51x550   VRS51x550 Datasheet
USPN-4 - USPN-4   USPN-4 Datasheet
SCHS153 - SCHS153   SCHS153 Datasheet
RB400D - RB400D   RB400D Datasheet
M27V201 - M27V201   M27V201 Datasheet
FSDL0365RN - FSDL0365RN   FSDL0365RN Datasheet
FSDM0365RN - FSDM0365RN   FSDM0365RN Datasheet
CVCO33BE-1950-2400 - CVCO33BE-1950-2400   CVCO33BE-1950-2400 Datasheet
AD7896 - AD7896   AD7896 Datasheet

 

Privacy Policy | Disclaimer
© 2012 Datasheet Archive