Radiation Hardened Noise Quad Operational Amplifier HS-5104ARH ra
|
|
|
Top Searches for this datasheet
HS-5104ARH
Radiation Hardened Noise Quad Operational Amplifier
HS-5104ARH radiation hardened, dielectrically isolated bipolar monolithic quad operational amplifier that provides noise operation radiation hardened design. predominant feature HS-5104ARH excellent noise characteristics, typically only 0.6nV/Hz 4.3pA/Hz 1kHz. This general purpose amplifier also offers array dynamic specifications ranging from typical 3.0V/µs slew rate 8.0MHz unity gain bandwidth minimum output drive current 10mA. HS-5104ARH shows almost change offset voltage after exposure 100K RAD(Si) gamma radiation, with only minor increase current. Complementing these specifications post radiation open loop gain excess 40K. This impressive combination features makes this amplifier ideally suited variety applications such active filter design, signal conditioning, instrumentation circuits. Designed meet exposure radiation environments, this amplifier necessity satellite spacecraft systems where unique properties will prolong useful life system. This quad operational amplifier available industry standard pinout allowing immediate interchangeability with most other quad operational amplifiers.
July 1995
Features
Radiation Environment Gamma Dose (Si) Noise 1kHz 4.3nV/Hz (Typ) 1kHz 0.6pA/Hz (Typ) Offset Voltage 3.0mV High Slew Rate 3.0V/µs (Typ) Gain Bandwidth Product 8.0MHz (Typ) Dielectrically Isolated Bipolar Technology
Applications
High Active Filters Audio Amplifiers Voltage Regulators Integrators Signal Generators Voltage References Space Environments
Ordering Information
PART NUMBER HS1-5104ARH-Q HS1-5104ARH/Proto HS1-5104ARH/Sample TEMPERATURE RANGE -55oC +125oC -55oC +125oC +25oC PACKAGE Lead SBDIP Lead SBDIP Lead SBDIP
Pinout
HS1-5104ARH LEAD CERAMIC DUAL-IN-LINE METAL SEAL (SBDIP), MIL-STD-1835, CDIP2-T14 VIEW
-IN1 +IN1 +IN2 -IN2 -IN4 +IN4
Functional Block Diagram
-IN1 +IN1 -IN3 +IN3
-IN4 +IN4
V+IN3 -IN3
-IN2 +IN2
CAUTION: These devices sensitive electrostatic discharge. Users should follow proper Handling Procedures. Copyright
Harris Corporation 1995
Spec Number File Number
518880 3025.1
Specifications HS-5104ARH
Absolute Maximum Ratings
Voltage Between Terminals Differential Input Voltage Voltage Either Input Terminal VPeak Output Current (Note Indefinite (One Amplifier Shorted GND) Junction Temperature (TJ) +175oC Storage Temperature Range -65oC +150oC Rating. <2000V Lead Temperature (Soldering 10s) +275oC
Reliability Information
Thermal Resistance SBDIP Package. 75oC/W 24oC/W Maximum Package Power Dissipation +125oC SBDIP Package 0.67W Maximum Device Power Dissipation (Note 0.23W Derating Requirements: SBDIP Package Derating Required NOTE: power dissipation total power dissipated amplifier with amplifier biased into normal operating range without output load. Power dissipation VCCIC VEEIE +125oC.
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
Operating Conditions
Operating Temperature Range -55oC +125oC Operating Supply Voltage ±15V Input Voltage +0.8V VINcm
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested Supply Voltage ±15V, RSOURCE 100, RLOAD 100k, VOUT Unless Otherwise Specified GROUP SUBGROUP Input Bias Current 10k, 100, 10k, -27V -CMR 27V, Large Signal Voltage Gain +AVOL VOUT +10V, -AVOL VOUT -10V, Common Mode Rejection Ratio +CMRR +12V, +3V, -27V, VOUT -12V -12V, +27V, -3V, VOUT +12V LIMITS TEMPERATURE
PARAMETERS Input Offset Voltage
SYMBOL
CONDITIONS
-3.0 -15.0 -300 -550 -300 -550 -300 -400
15.0
UNITS kV/V kV/V kV/V kV/V kV/V kV/V
+125oC, -55oC +25oC +125oC, -55oC +125
-55oC
Input Offset Current
+125
-55oC
Common Mode Range
+CMR
+125
-55oC
+125
-55oC
+125
+125
-55oC +25oC +125oC, -55oC +25oC +125
-CMRR
-55oC
Spec Number
518880
Specifications HS-5104ARH
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested Supply Voltage ±15V, RSOURCE 100, RLOAD 100k, VOUT Unless Otherwise Specified GROUP SUBGROUP +VOUT2 -VOUT1 -VOUT2 Output Current +IOUT VOUT -IOUT VOUT Quiescent Power Supply Current +ICC IOUT -ICC IOUT Power Supply Rejection Ratio +PSRR VSUP 10V, +10V, -15V, +20V, -15V VSUP 10V, +15V, -10V, +15V, -20V LIMITS TEMPERATURE +25oC +125oC, -55oC +125
PARAMETERS Output Voltage Swing
SYMBOL +VOUT1
CONDITIONS
-6.5 -7.5
UNITS
-55oC
+125
-55oC
+125
-55oC
+125
-55oC
+125
-55oC
+125
-55oC
+125oC, -55oC +25oC +125oC, -55oC +25oC +125
-PSRR
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested Supply Voltage ±15V, RSOURCE RLOAD CLOAD 50pF, AVCL +1V/V, Unless Otherwise Specified LIMITS PARAMETERS Slew Rate SYMBOL Rise Fall Time CONDITIONS VOUT VOUT VOUT +200mV VOUT -200mV VOUT +200mV VOUT -200mV GROUP SUBGROUPS TEMPERATURE +25oC +25oC +25oC UNITS V/µs V/µs
+25oC
Overshoot
+25oC +25oC
Spec Number
518880
Specifications HS-5104ARH
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS Device Characterized Supply Voltage ±15V, RLOAD CLOAD 50pF, AVCL +1V/V, Unless Otherwise Specified LIMITS PARAMETERS Differential Input Resistance Input Noise Voltage Density Input Noise Current Density Full Power Bandwidth Minimum Closed Loop Stab Gain Output Resistance Quiescent Power Consumption Channel Separation SYMBOL FPBW CLSG ROUT CONDITIONS 1000Hz 20M, 1000Hz VPEAK 50pF Open Loop VOUT IOUT AVCL 100V/V, 100mVRMS 10kHz, Referred Input AVCL NOTES TEMPERATURE +25oC +25oC +25oC -55oC +125oC +25oC -55oC +125oC +25oC
UNITS nV/Hz pA/Hz
Settling Time
+25oC
NOTES: Parameters listed Table controlled design process parameters directly tested final production. These parameters characterized upon initial design release, upon design changes. These parameters guaranteed characterization based upon data from multiple production runs which reflect within variation. Full Power Bandwidth guarantee based Slew Rate measurement using FPBW Slew Rate/(2VPEAK). Power Consumption based upon Quiescent Supply Current test maximum. load outputs.) Settling time measured from point input pulse within 10mV settled value. Caution: Continuous long-duration short-circuit operation degrade operating life device. TABLE POST ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested Supply Voltage ±15V LIMITS PARAMETERS Open Loop Voltage Gain Input Offset Voltage Input Offset Current Input Bias Current SYMBOL AVOL IBIAS CONDITIONS 10k, TEMPERATURE +25oC +25oC +25oC +25oC UNITS kV/V
TABLE HS-5104ARH BURN-IN DELTA PARAMETERS (+25oC) PARAMETERS IBIAS DELTA LIMITS ±2.0mV ±75nA ±75nA TABLE APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test Interim Test Final Test Group (Note Subgroup Subgroup Group Group Subgroup NOTE: Table parameters only. Alternate Group testing exercised accordance with MIL-STD-883, Method 5005. MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP SUBGROUPS TESTED (Note RECORDED (Note (Note
Spec Number
518880
HS-5104ARH Harris Space Level Product Flow
Wafer Acceptance (All Lots) Method 5007 (Includes SEM) (Note GAMMA Radiation Verification (Each Wafer) Method 1019, Samples/Wafer, Rejects 100% Attach 100% Nondestructive Bond Pull, Method 2023 Sample Wire Bond Pull Monitor, Method 2011 Sample Shear Monitor, Method 2019 2027 100% Internal Visual Inspection, Method 2010, Condition and/or Pre-Cap (Note 100% Temperature Cycle, Method 1010, Condition Cycles 100% Constant Acceleration, Method 2001, Condition Method 5004 100% PIND, Method 2020, Condition 100% External Visual 100% Serialization
NOTES: Modified Inspection, compliant MIL-STD-883, Method 2018. This device does meet Class minimum metal step coverage 50%. metal does meet current density requirement A/cm2. Data provided upon request. Failures from subgroup deltas used calculating PDA. maximum allowable Radiographic (X-Ray) inspection performed point after serialization allowed Method 5004. Method 5004, view only supplied flat packages leadless chip carriers, views supplied other cases. Alternate Group testing performed allowed MIL-STD-883, Method 5005. Group inspections optional will performed unless required P.O. When required, P.O. should include separate line items Group test, Group samples, Group test Group samples. Group Generic Data, defined MIL-I-38535, optional will supplied unless required P.O. When required, P.O. should include separate line item Group generic data. Generic data guaranteed available therefore available cases. and/or inspections optional will performed unless required P.O. When required, P.O. should include separate line items PreCap inspection, Final Inspection, PreCap inspection, and/or Final Inspection. Data Package Contents: Cover Sheet (Harris Name and/or Logo, P.O. Number, Customer Part Number, Date Code, Harris Part Number, Number, Quantity). Wafer Acceptance Report (Method 5007). Includes reproductions photos with percent step coverage. GAMMA Radiation Report. Contains Cover page, disposition, Dose, Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read Record data file Harris. X-Ray report film. Includes penetrometer measurements. Screening, Electrical, Group attributes (Screening attributes begin after package seal). Serial Number Sheet (Good units serial number number). Variables Data (All Delta operations). Data identified serial number. Data header includes number date test. Group attributes and/or Generic data included when required P.O. Certificate Conformance part shipping invoice part Data Book. Certificate Conformance signed authorized Quality Representative.
100% Initial Electrical Test (T0) 100% Static Burn-In, Condition Hours, +125oC Equivalent, Method 1015 100% Interim Electrical Test (T1) 100% Delta Calculation (T0-T1) 100% PDA, Method 5004 (Note 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% Radiographic (X-Ray), Method 2012 (Note 100% External Visual, Method 2009 Sample Group Method 5005 (Note Sample Group Method 5005 (Note Sample Group Method 5005 (Notes 100% Data Package Generation (Note and/or Final (Note
Spec Number
518880
HS-5104ARH Test Circuits (Applies Table Table
ACOUT +VCC OPEN 100K OPEN 500K 50pF (Note LOOP STABILITY, VALUE CAPACITOR PREVENT OSCILLATION
100K OPEN EOUT RESISTORS CAPACITORS ±10% (µF) HS-5104ARH
-VEE
NOTE: Includes stray capacitances
FIGURE FOUR TEST LOOPS HS-5104ARH
Test Circuits Waveforms
50pF
FIGURE SIMPLIFIED TEST CIRCUIT (Applies Table Table
+3.0V INPUT -3.0V
+3.0V
+3.0V +2.5 -2.5 OUTPUT
+3.0V
-3.0V -3.0V
-3.0V
FIGURE SLEW RATE WAVEFORMS
VFINAL +200mV +200mV INPUT -200mV VPEAK OUTPUT -200mV VPEAK
FIGURE OVERSHOOT, RISE/FALL TIME WAVEFORMS
Spec Number
518880
HS-5104ARH Test Circuits Waveforms (Continued)
VOUT VOUT 20ns (VIN) -4.99V -5.00V -5.01V +5.01V +4.99V 20ns (VIN)
VOUT 50pF
FIGURE SETTLING TIME TEST CIRCUIT WAVEFORM
Typical Performance Curves
PHASE NOISE VOLTAGE NOISE CURRENT AVOL AVOL (dB) LOAD (NOTE) +15V -15V PHASE (DEGREES)
FREQUENCY (Hz)
100K FREQUENCY (Hz)
NOTE: Derate
FIGURE TYPICAL NOISE VOLTAGE CURRENT FREQUENCY
FIGURE OPEN LOOP GAIN PHASE FREQUENCY
IBIAS (nA) (mV) -10V (oC) -10V (oC)
FIGURE INPUT OFFSET VOLTAGE COMMON VOLTAGE TEMPERATURE
FIGURE BIAS CURRENT COMMON MODE VOLTAGE TEMPERATURE
Spec Number
518880
HS-5104ARH Typical Performance Curves (Continued)
BANDWIDTH PHASE MARGIN (oC) 100pF 0.001 0.01 LOAD CAPACITANCE (µF) BANDWIDTH (MHz) SLEW RATE (V/µs)
IOFFSET (nA) -10V
FIGURE OFFSET CURRENT COMMON MODE VOLTAGE TEMPERATURE
FIGURE BANDWIDTH PHASE MARGIN LOAD CAPACITANCE
BANDWIDTH LOAD) (NOTE) BANDWIDTH (MHz)
PHASE MARGIN (DEGREES)
BANDWIDTH LOAD) (NOTE) SLEW RATE (V/µs) BANDWIDTH (MHz)
SLEW RATE 50pF)
SLEW RATE 50pF) (oC) +125
TOTAL SUPPLY VOLTAGE
NOTE: Derate 0.5MHz FIGURE SLEW RATE BANDWIDTH SUPPLY VOLTAGE
NOTE: Derate 0.5MHz FIGURE SLEW RATE BANDWIDTH TEMPERATURE
PSSR, CMRR (dB) -PSRR +PSRR CMRR
FREQUENCY (Hz)
100K
FIGURE COMMON MODE REJECTION RATIO POWER SUPPLY REJECTION RATIO FREQUENCY
Spec Number
518880
HS-5104ARH Typical Performance Curves (Continued)
100K CHANNEL SEPARATION (dB)
100K
20LOG 100V01
FREQUENCY (Hz)
100K
1MHz
FIGURE CHANNEL SEPARATION FREQUENCY
Burn-In Circuit
NOTES: 1/4W (Min) 0.01µF/Socket (Min) 0.1µF/Row (Min) IN4002 Equivalent/Board |(V+) (V-)|
Irradiation Circuit
+15V
-15V (ONE FOUR)
NOTES: -15V Group Sample Size Wafer
Spec Number
518880
QP11 QP26 QN29 QP10 QN50 QN19 8.4pF QN40 QN38 QN56 QN13 QP14 QP57 QN47 QN41 QN45 8.4pF QP46 QN55 QN32 2.5pF QP49 QN33 QP47 QP39 QP18 OUTPUT QN46 QP48 QN51 QN17 QP27 QP28 QP43 1.5K
Schematic (1/4 HS-5104ARH)
CHANNELS QP26
HS-5104ARH
QN31 QN30 2.4pF -INPUT +INPUT
QN44
QN42
QN24
QN22
QN23
QN20
QN21
1.5K
1.5K
Spec Number
AMPLIFIERS
518880
HS-5104ARH Metallization Topology
DIMENSIONS: mils mils mils mils (2420µm 2530µm 483µm ±25.4µm) METALLIZATION: Type: Thickness: WORST CASE CURRENT DENSITY: <2.0 A/cm2 SUBSTRATE POTENTIAL (Powered Up): Unbiased GLASSIVATION: Type: Nitride (SI3N4) over Silox (SIO2, Phos.) Silox Thickness: Nitride Thickness: TRANSISTOR COUNT: PROCESS: Bipolar Dielectric Isolation
Metallization Mask Layout
HS-5104ARH
+IN2 +IN1
-IN2
-IN1
OUT2 OUT3
OUT1 OUT4
-IN3
-IN4
+IN3
+IN4
Spec Number
518880
HS-5104ARH Ceramic Dual-In-Line Metal Seal Packages (SBDIP)
-A-DBASE METAL SECTION LEAD FINISH
D14.3 MIL-STD-1835 CDIP2-T14 (D-1, CONFIGURATION
LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE INCHES SYMBOL 0.014 0.014 0.045 0.023 0.008 0.008 0.220 0.200 0.026 0.023 0.065 0.045 0.018 0.015 0.785 0.310 MILLIMETERS 0.36 0.36 1.14 0.58 0.20 0.20 5.59 5.08 0.66 0.58 1.65 1.14 0.46 0.38 19.94 7.87 NOTES Rev. 4/94 Braze fillets shall concave. Dimensioning tolerancing ANSI Y14.5M 1982. Controlling dimension: INCH.
-Bbbb BASE PLANE SEATING PLANE
eA/2
eA/2
0.100 0.300 0.150 0.125 0.015 0.005 0.005 0.200 0.060 105o 0.015 0.030 0.010 0.0015
2.54 7.62 3.81 3.18 0.38 0.13 0.13 5.08 1.52 105o 0.38 0.76 0.25 0.038
NOTES: Index area: notch identification mark shall located adjacent shall located within shaded area shown. manufacturer's identification shall used identification mark. maximum limits lead dimensions shall measured centroid finished lead surfaces, when solder plate lead finish applied. Dimensions apply lead base metal only. Dimension applies lead plating finish thickness. Corner leads N/2, N/2+1) configured with partial lead paddle. this configuration dimension replaces dimension Dimension shall measured from seating plane base plane. Measure dimension four corners. Measure dimension from ceramic body nearest metallization lead. maximum number terminal positions.
Harris Semiconductor products manufactured, assembled tested under ISO9000 quality systems certification.
Harris Semiconductor products sold description only. Harris Semiconductor reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Harris believed accurate reliable. However, responsibility assumed Harris subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Harris subsidiaries.
Sales Office Headquarters
general information regarding Harris Semiconductor products, call 1-800-4-HARRIS UNITED STATES Harris Semiconductor 883, Mail Stop 53-210 Melbourne, 32902 TEL: 1-800-442-7747 (407) 729-4984 FAX: (407) 729-5321 EUROPE Harris Semiconductor Mercure Center 100, Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Harris Semiconductor Ltd. Tannery Road Cencon #09-01 Singapore 1334 TEL: (65) 748-4200 FAX: (65) 748-0400
Spec Number
518880
Other recent searches
TPCA8014-H - TPCA8014-H TPCA8014-H Datasheet
TL3016 - TL3016 TL3016 Datasheet
TL3016Y - TL3016Y TL3016Y Datasheet
LT1016 - LT1016 LT1016 Datasheet
SUD50N03-11 - SUD50N03-11 SUD50N03-11 Datasheet
MC68HC705J2 - MC68HC705J2 MC68HC705J2 Datasheet
ELSD-506SYGWA - ELSD-506SYGWA ELSD-506SYGWA Datasheet
S530-E2 - S530-E2 S530-E2 Datasheet
CLC405 - CLC405 CLC405 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
