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MM54HC73 MM74HC73 Dual Flip-Flops with Clear These Flip-Flops uti
Top Searches for this datasheetMM54HC73 MM74HC73 Dual Flip-Flops with Clear MM54HC73 MM74HC73 Dual Flip-Flops with Clear These Flip-Flops utilize advanced silicon-gate CMOS technology They possess high noise immunity power dissipation standard CMOS integrated circuits These devices drive LS-TTL loads These flip-flops edge sensitive clock input change state negative going transition clock pulse Each independent CLOCK CLEAR inputs outputs CLEAR independent clock accomplished level input 54HC 74HC logic family functionally well pinout compatible with standard 54LS 74LS logic family inputs protected from damage static discharge internal diode clamps ground Features Typical propagation delay Wide operating voltage range input current maximum quiescent current (74HC Series) High output drive LS-TTL loads Connection Logic Diagrams Dual-In-Line Package Truth Table Inputs Outputs TOGGLE View 5072-1 Order Number MM54HC73 MM74HC73 5072 5072 C1995 National Semiconductor Corporation 5072 RRD-B30M115 Printed Absolute Maximum Ratings (Notes Operating Conditions Supply Voltage (VCC) Input Output Voltage (VIN VOUT) Operating Temp Range (TA) MM74HC MM54HC Input Rise Fall Times Units Military Aerospace specified devices required please contact National Semiconductor Sales Office Distributors availability specifications Supply Voltage (VCC) Input Voltage (VIN) Output Voltage (VOUT) Clamp Diode Current (IIK IOK) Output Current (IOUT) Current (ICC) Storage Temperature Range (TSTG) Power Dissipation (PD) (Note Package only Lead Temperature (TL) (Soldering seconds) 1000 Electrical Characteristics (Note Symbol Parameter Conditions lIOUTl Minimum High Level Input Voltage Maximum Level Input Voltage Minimum High Level Output Voltage 74HC eb40 54HC eb55 Units Guaranteed Limits lIOUTl lIOUTl Maximum Level Output Voltage lIOUTl lIOUTl lIOUTl Maximum Input Current Maximum Quiescent Supply Current IOUT Note Absolute Maximum Ratings those values beyond which damage device occur Note Unless otherwise specified voltages referenced ground Note Power Dissipation temperature derating plastic ``N'' package from ceramic ``J'' package from Note power supply worst case output voltages (VOH VOL) occur Thus values should used when designing with this supply Worst case occur respectively (The value worst case leakage current (IIN IOZ) occur CMOS higher voltage values should used limits currently tested above specification (30% VCC) will implemented later than CY'89 Electrical Characteristics Symbol fMAX tPHL tPLH tPHL tPLH tREM Parameter Maximum Operating Frequency Maximum Propagation Delay Clock Maximum Propagation Delay Clear Minimum Removal Time Clear Clock Minimum Setup Time Clock Minimum Hold Time Clock Minimum Pulse Width Clock Clear Conditions Guaranteed Limit Units Electrical Characteristics Symbol fMAX Parameter Maximum Operating Frequency Maximum Propagation Delay Clock Maximum Propagation Delay Clear Minimum Removal Time Clear Clock Minimum Setup Time Clock Minimum Hold Time from Clock Minimum Pulse Width Clock Clear Maximum Output Rise Fall Time Maximum Input Rise Fall Time Power Dissipation Capacitance (Note Maximum Input Capacitance (per flip-flop) Conditions (unless otherwise specified) 74HC eb40 1000 54HC eb55 1000 Units Guaranteed Limits 1000 tPHL tPLH tPHL tPLH tREM tTLH tTHL Note determines load dynamic power consumption VCC2 load dynamic current consumption Typical Applications Binary Ripple Counter with Enable Reset 5072 Shift Register with Clear 5072 MM54HC73 MM74HC73 Dual Flip-Flops with Clear Physical Dimensions inches (millimeters) Dual-In Line Package Order Number MM54HC73J MM74HC73J Package J14A Dual-In Line Package Order Number MM74HC73N Package N14A NATIONAL'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT NATIONAL SEMICONDUCTOR CORPORATION used herein LIFE SUPPORT POLICY Life support devices systems devices systems which intended surgical implant into body support sustain life whose failure perform when properly used accordance with instructions provided labeling reasonably expected result significant injury user National Semiconductor Corporation 1111 West Bardin Road Arlington 76017 1(800) 272-9959 1(800) 737-7018 critical component component life support device system whose failure perform reasonably expected cause failure life support device system affect safety effectiveness National Semiconductor Europe (a49) 0-180-530 Email cnjwge tevm2 Deutsch (a49) 0-180-530 English (a49) 0-180-532 Fran (a49) 0-180-532 Italiano (a49) 0-180-534 National Semiconductor Hong Kong 13th Floor Straight Block Ocean Centre Canton Tsimshatsui Kowloon Hong Kong (852) 2737-1600 (852) 2736-9960 National Semiconductor Japan 81-043-299-2309 81-043-299-2408 National does assume responsibility circuitry described circuit patent licenses implied National reserves right time without notice change said circuitry specifications Other recent searchesXT49ML - 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