IRS254(0,1)(S)PbF BUCK REGULATOR CONTROL IRS254(0,1) high vo
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Data Sheet PD60293
IRS254(0,1)(S)PbF
BUCK REGULATOR CONTROL
IRS254(0,1) high voltage, high frequency buck control constant current regulation. They incorporate continuous mode time-delayed hysteretic buck regulator directly control average load current, using accurate on-chip bandgap voltage reference. application inherently protected against short circuit conditions, with ability easily opencircuit protection. external high-side bootstrap circuit drives buck switching element high frequencies. low-side driver also provided synchronous rectifier designs. functions realized within simple SOIC package.
Features
(IRS2540) (IRS2541) half bridge driver Micropower startup (<500 voltage reference deadtime 15.6 zener clamp Frequency Auto restart, non-latched shutdown dimmable Small 8-Lead DIP/8-Lead SOIC packages
Packages
8-Lead PDIP IRS254(0,1)PbF
8-LeadSOIC IRS254(0,1)SPbF
Typical Application Diagram
VBUS VOUT DBOOT
CVCC1 ROV1 CBUS2 CBUS1 ROV2
IRS254(0,1)
CBOOT
DCLAMP
CVCC2
COUT VOUT
ROUT DEN1
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IRS254(0,1)(S)PbF
Alternate application circuit using single MOSFET
IRS254(0,1)
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IRS254(0,1)(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage device occur. voltage parameters absolute voltages referenced COM, currents defined positive into lead. thermal resistance power dissipation ratings measured under board mounted still conditions.
Symbol
VIFB VENN dV/dt RTHJA
Definition
High-side floating supply voltage High-side floating supply offset voltage High-side floating output voltage Low-side output voltage Feedback voltage Enable voltage Supply current (Note Allowable offset voltage slew rate Package power dissipation (TJMAX-TA)/RTHJA Thermal resistance, junction ambient Junction temperature Storage temperature Lead temperature (soldering, seconds) (8-Pin DIP) (8-Pin SOIC) (8-Pin DIP) (8-Pin SOIC) IRS2540 IRS2541
Min.
-0.3 -0.3 -0.3 -0.3 -0.3
Max.
0.625
Units
V/ns
Note This contains zener clamp structure between chip COM, with nominal breakdown voltage 15.6 Please note that this supply should driven impedance power source greater than VCLAMP specified electrical characteristics section.
Recommended Operating Conditions
proper operation device should used within recommended conditions.
Symbol
Definition
High side floating supply voltage IRS2540 Steady state high-side floating supply offset voltage Supply voltage Supply current Junction temperature IRS2541
Min.
VCCUV+ Note
Max.
VCLAMP VCLAMP
Units
Note Sufficient current should supplied keep internal 15.6 zener regulating VCLAMP.
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IRS254(0,1)(S)PbF
Electrical Characteristics
VBIAS 0.25 CLO=CHO=1000 CVCC=CVBS=0.1 TA=25 unless otherwise specified.
Symbol
Definition
supply undervoltage positive going threshold supply undervoltage negative going threshold supply undervoltage lockout hysteresis UVLO mode quiescent current Diesabled mode quiescent current Quiescent supply current supply current, zener clamp voltage
Units Test Conditions
Supply Characteristics
VCCUV+ VCCUVVUVHYS IQCCUV IQCCENN IQCC ICC50k VCLAMP -14.6 15.6 10.0 16.6 VCC=6 EN>VENTH+ Duty Cycle rising from falling from
Floating Supply Characteristics
IQBS0 IQBS1 VBSUV+ VBSUVILK Quiescent supply current Quiescent supply current supply undervoltage positive going threshold supply undervoltage negative going threshold Offset supply leakage current -6.5 -1.0 IRS2540:VB=VS=200 IRS2541:VB=VS=600
Current Control Operation
VENNTH+ VENNTHV0.5 VIFBTH positive threshold negative threshold voltage reference (die level test) threshold Maximum frequency -2.7 -kHz
Gate Driver Output Characteristics
IO+/DT tLO,ON tLO,OFF tHO,ON tHO,OFF level output voltage High level output voltage Turn-on rise time Turn-off fall time Output source/sink short circuit pulsed current Deadtime Delay between VIFB>VIFBTH turn-on Delay between VIFB<VIFBTH turn-off Delay between VIFB<VIFBTH turn-on Delay between VIFB>VIFBTH turn-off -COM 0.5/0.7 -120 square wave, pk-pk offset Duty Cycle
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IRS254(0,1)(S)PbF
Electrical Characteristics
VBIAS 0.25 CLO=CHO=1000 CVCC=CVBS=0.1 TA=25 unless otherwise specified.
Symbol Watchdog timer
PWWD
Definition
Watchdog timer period pulse width
Units Test Conditions
Functional Block Diagram
DELAY LEVEL SHIFT PULSE FILTER LATCH
UVLO DELAY
15.6
BANDGAP REFERENCE
Watchdog Timer20
Pulse Generator
Values block diagram typical values
Lead Assignment
Assignments
Symbol
Supply voltage power signal ground Current feedback Disable outputs (LO=High, HO=Low) Low-side gate driver output High-side floating return High-side gate driver output High-side gate driver floating supply
IRS254(0,1)
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IRS254(0,1)(S)PbF
STATE DIAGRAM
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IRS254(0,1)(S)PbF
Functional Operating Mode IRS254(0,1) operates time-delayed hysteritic buck controller. During normal operating conditions output current regulated voltage (nominal value mV). This feedback compared internal high precision bandgap voltage reference. on-board dV/dt filter also been used ignore erroneous transitioning. Once supply reaches VCCUV+, output held high output predetermined period time. This initiates charging bootstrap capacitor, establishing floating supply high-side output. then begins toggling outputs needed regulate current.
large enough maintain ripple IFB, Iout,avg calculated:
Iout (avg VIFBTH
Fig.2 Storing Energy Inductor Releasing Inductor Stored Energy
t_HO_off
t_HO_on
Iout
IFBTH
t_LO_on
t_LO_off
Fig.1 IRS254(0,1) Control Signals, Iavg=1.2
Fig.3 IRS254(0,1) Time Delayed Hysterisis
long VIFB below VIFBTH, modulated watchdog timer described below, load receiving current from VBUS, which simultaneously stores energy inductor, VIFB increases, unless load open. Once VIFB crosses VIFBTH, control loop switches after delay tHO,OFF. Once off, will turn after deadtime (DT), inductor releases stored energy into load VIFB starts decreasing. When VIFB crosses VIFBTH again, control loop switches after delay tHO,ON after delay tHO,ON switching continues regulate current average value determined follows. When inductance value
control method based upon free running frequency, constrast more widely used fixed frequency regulation. This reduces part count since there need frequency setting components also provides inherently stable sytem, which acts current source. deadtime approximately between gate drive signals necessary prevent "shoot-through" condition. higher frequencies, switching losses become very large absence this deadtime. deadtime been adjusted maintain precise current regulation, while still preventing shoot-through.
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IRS254(0,1)(S)PbF
Watchdog Timer During open circuit condition, without watchdog timer, output would remain high times charge stored bootstrap capacitor CBOOT would gradually discharge floating power supply high-side driver, which would then unable fully switch upper MOSFET causing high losses. maintain sufficient charge bootstrap capacitor, watchdog timer been implemented. condition where VIFB remains below VIFBTH, output will forced after output forced high. This toggling outputs will last approximately maintain replenish sufficient charge CBOOT. Design 98-2), "Bootstrap Component Selection Control ICs" www.irf.com under Design Support Disable (ENN) disable used dimming opencircuit protection. When held low, chip remains fully functional state with alterations operating environment. disable control feedback regulation, voltage greater than VENTH (approximately needs applied pin. With chip disabled state, output will remain low, whereas output will remain high prevent from floating, addition maintaining charge bootstrap capacitor. threshold disabling IRS254(0,1) been enhance immunity externally generated noise, application ground noise. This threshold also makes ideal receive drive signal from local microcontroller. Dimming Mode achieve dimming, signal with constant frequency duty cycle into pin. There direct linear relationship between average load current duty cycle. ratio 50%, maximum light output will realized. Likewise ratio 30%, maximum light output will realized. sufficiently high frequency dimming signal must chosen avoid flashing "strobe light" effect. signal order should sufficient. minimum amount dimming achievable (light output approaches will determined "on" time output, when fully functional regulating state. maintain reliable dimming, recommended keep "off" time enable signal least times that "on" time. example, application running with input voltage output voltage "on" time will (one-fourth period calculations below) according standard buck topology theory. This will minimum "off" time enable signal
Fig.4 Illustration Watchdog Timer
Bootstrap Capacitor Diode bootstrap capacitor value needs chosen that maintains sufficient charge least approximately interval until watchdog timer allows capacitor recharge. capacitor value small, charge will dissipate less than typical bootstrap capacitor approximately bootstrap diode should fast recovery ultrafast recovery component maintain good efficiency. Since cathode bootstrap diode will switching between zero high voltage bus, reverse recovery time this diode critical importance. additional information concerning bootstrap components, refer
Duty Cycle
*100 100V 75kHz 3.3µs
HOon time
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IRS254(0,1)(S)PbF
form voltage clamp. repetition spikes reduced simply increasing capacitor size. resistors form voltage divider output, which then into cathode zener diode. diode will only conduct, flooding enable pin, when nominal voltage exceeded. chip will enter disabled state once divider network produces voltage least greater than zener rating. capacitor serves only filter slow transients/switching positive output terminal. clamped output voltage determined following analysis. choice capacitor designer's discretion.
Vout
Enable Duty Cycle Relationship Light Output
Enable Duty Cycle
Percentage Light Output
Fig.5 Light Output Enable Duty Cycle
(2.5V )(R1
Zener Diode Nominal Rated Voltage
Fig.6 IRS254(0,1) Dimming Signals
Open Circuit Protection Mode using suggested Vout voltage divider, capacitor, zener diode, output voltage clamped desired value. open-circuit condition without output clamp, positive output terminal will float Fig.7 Open Circuit high-side input voltage. Protection Scheme Switching will still occur between outputs, whether output voltage clamp watchdog timer. Transients switching will observed positive output terminal seen Fig. difference signal shape, between output voltage IFB, capacitor used
IRS2540/1
Fig.8 Open Circuit Fault Signals, with Clamp
Under-voltage Lock-out Mode under-voltage lock-out mode (UVLO) defined state IRS254(0,1) when below turn-on threshold During startup conditions, supply remains below VCCUV+, IRS254(0,1) will enter UVLO mode. This state very similar when been disabled control signals, except that also held low. When supply increased VCCUV+, enters normal operation mode. already normal
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IRS254(0,1)(S)PbF
operation, does enter UVLO unless supply voltage falls below VCCUV-. Inductance Selection maintain tight hysteretic current regulation inductor output capacitor COUT parallel with LEDs) need large enough maintain supply load during tHO,ON avoid significant undershooting load current, which turn causes average current fall below desired value. First, going look effect inductor when there output capacitor clearly demonstrate impact inductor. this case, load current identical inductor current. Fig. shows inductor value impacts frequency over range input voltages. seen, input voltage great impact frequency inductor value greatest impact reducing frequency smaller input voltages.
capacitance longer significant effect operating frequency current regulation, seen Figs.
Iout (mA) 470uH 680uH 1.5mH
Fig.10 Current Regulation Chosen Inductances Iout Vout 16.8
Frequency (kHz)
470uH 680uH 1.5mH
Frequency (kHz)
470uH 680uH 1.5mH
Vout
Fig.9 Frequency Response Chosen Inductances Iout Vout 16.8
Fig.11 Frequency Response Chosen Inductances Iout
Iout (mA)
Fig. shows variation load current increases over span input voltages, inductance decreased. Fig. shows variation frequency over different output voltages different inductance values. Finally Fig. shows load current variation increases with lower inductance over range output voltages. output capacitor used simultaneously achieve target frequency current control accuracy. Fig. shows capacitance reduces frequency over range input voltage. small capacitance large effect reducing frequency. Fig. shows current regulation also improved with output capacitance. There point which continuing
Vout 470uH 680uH 1.5mH
Fig.12 Current Regulation Chosen Inductances Iout
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IRS254(0,1)(S)PbF
1000 4.7uF 10uF 22uF Frequency (kHz) 33uF 47uF
from output needs implemented, seen Fig.
Fig. Iout Vout 16.8
Frequency (kHz) Capacitance (uF)
Fig. Iout Vout 16.85
100V 160V
Fig. Vout 16.8
addition COUT increases amount energy that stored output stage, which also means supply current increased period time. Therefore slowing down di/dt transients load, frequency effectively decreased. With COUT capacitor, inductor current longer identical that seen load. inductor current will still have perfectly triangular shape, where load will same basic trend current, sharp corners will rounded with peaks significantly reduced, seen Fig. Supply Since IRS245(0,1) rated VBUS reach values this magnitude. only supply resistor VBUS used, will experience extremely high power losses. higher voltage applications alternate supply scheme utilizing micro-power start-up resistor feed-back
resistance between VBUS supply should large enough minimize current sourced directly from input voltage line; value should order hundreds Through supply resistor, current will flow charge capacitor. Once capacitor charged VCCUV+ threshold, IRS254(0,1) enters micro start-up regime begins operate, activating outputs. After first cycles switching, resistor connected between output will take over source necessary current resistor connecting output supply should carefully designed according power rating.
Vout 15.6V 10mA Rated
(10mA) 10mA
VBUS
IRS254(0,
Fig. Alternate Supply Diagram
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IRS254(0,1)(S)PbF
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IRS254(0,1)(S)PbF
8-Lead SOIC Tape Reel
LOADED TAPE FEED DIRECTION
NOTE CONTROLLING ENSION
CARRIER TAPE DIMENSION Metric Code 7.90 8.10 3.90 4.10 11.70 12.30 5.45 5.55 6.30 6.50 5.10 5.30 1.50 1.50 1.60
8SOICN Imperial 0.311 0.318 0.153 0.161 0.46 0.484 0.214 0.218 0.248 0.255 0.200 0.208 0.059 0.059 0.062
REEL DIMENSIONS 8SOICN Metric Code 329.60 330.25 20.95 21.45 12.80 13.20 1.95 2.45 98.00 102.00 18.40 14.50 17.10 12.40 14.40
Imperial 12.976 13.001 0.824 0.844 0.503 0.519 0.767 0.096 3.858 4.015 0.724 0.570 0.673 0.488 0.566
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IRS254(0,1)(S)PbF
ORDER INFORMATION
8-Lead PDIP IRS2540PbF 8-Lead PDIP IRS2541PbF 8-Lead SOIC IRS2540SPbF 8-Lead SOIC IRS2541SPbF 8-Lead SOIC Tape Reel IRS2540STRPbF 8-Lead SOIC Tape Reel IRS2541STRPbF
SOIC-8 MSL2 qualified. This product been designed qualified industrial level. Qualification standards found www.irf.com <http://www.irf.com> WORLD HEADQUARTERS: Kansas St., Segundo, California 90245, Tel: (310) 252-7105 Data specifications subject change without notice 2/2/2007
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