IRS21091(S)PbF Floating channel designed bootstrap operation Full

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IRS21091(S)PbF Floating channel designed bootstrap operation Full

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Data Sheet PD60311
IRS21091(S)PbF
Floating channel designed bootstrap operation Fully operational +600 Tolerant negative transient voltage, dV/dt immune Gate drive supply range from Undervoltage lockout both channels input logic compatible Cross-conduction prevention logic Matched propagation delay both channels High-side output phase with input Logic power ground offset Internal deadtime, programmable with external resistor Lower di/dt gate driver better noise immunity dual function DT/SD input turns both channels RoHS compliant
HALF-BRIDGE DRIVER
Product Summary
VOFFSET IO+/VOUT ton/off (typ.) Deadtime max.
Packages
Description
IRS21091 high voltage, high speed power MOSFET IGBT driver with dependent high- low-side referenced output channels. Proprietary HVIC latch immune CMOS technologies enable ruggedized monolithic construction. logic input Lead PDIP Lead SOIC compatible with standard CMOS LSTTL output, IRS21091 IRS21091S down logic. output drivers features high pulse current buffer stage designed minimum driver cross-conduction. floating channel used drive N-channel power MOSFET IGBT high-side configuration which operates
Typical Connection
DT/SD
LOAD
DT/SD
(Refer Lead Assignments correct configuration). These diagrams show electrical connections only. Please refer Application Notes DesignTips proper circuit board layout.
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IRS21091(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage device occur. voltage parameters absolute voltages referenced COM. thermal resistance power dissipation ratings measured under board mounted still conditions.
Symbol
DT/SD dVS/dt RthJA
Definition
High-side floating absolute voltage High-side floating supply offset voltage High-side floating output voltage Low-side logic fixed supply voltage Low-side output voltage Programmable deadtime shutdown voltage Logic input voltage Allowable offset supply voltage transient Package power dissipation Thermal resistance, junction ambient Junction temperature Storage temperature Lead temperature (soldering, seconds) Lead PDIP) Lead SOIC) Lead PDIP) Lead SOIC)
Min.
-0.3 -0.3 -0.3
Max.
0.625
Units
V/ns °C/W
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IRS21091(S)PbF
Recommended Operating Conditions
input/output logic timing diagram shown Fig.1. proper operation device should used within recommended conditions. offset rating tested with supply biased differential.
Symbol
DT/SD
Definition
High-side floating supply absolute voltage High-side floating supply offset voltage High-side floating output voltage Low-side logic fixed supply voltage Low-side output voltage Logic input voltage Programmable deadtime shutdown voltage Ambient temperature
Min.
(Note
Max.
Units
Note Logic operational +600 Logic state held -VBS. (Please refer Design DT97-3 more details).
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) 1000 unless otherwise specified.
Symbol
toff
Definition
Turn-on propagation delay Turn-off propagation delay Shutdown propagation delay Delay matching, turn-on/off Turn-on rise time Turn-off fall time Deadtime: turn-off turn-on(DTLO-HO) turn-off turn-on (DTHO-LO)
Min.
Typ.
Max. Units Test Conditions
RDT= RDT=
Deadtime matching DTLO DTHO-LO
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IRS21091(S)PbF
Static Electrical Characteristics
VBIAS (VCC VBS) unless otherwise specified. VIL, VIH, parameters referenced applicable respective input leads: DT/SD. parameters referenced applicable respective output leads:
Symbol
VSD,TH IQBS IQCC IIN+ IINVCCUV+ VBSUV+ VCCUVVBSUVVCCUVH VBSUVH
Definition
Logic input voltage logic Logic input voltage logic DT/SD input threshold High level output voltage, VBIAS level output voltage, Offset supply leakage current Quiescent supply current Quiescent supply current Logic input bias current Logic input bias current supply undervoltage positive going threshold supply undervoltage negative going threshold Hysteresis Output high short circuit pulsed current Output short circuit pulsed current
Min. Typ. Max. Units Test Conditions
11.5 0.05 0.02 14.5 V,PW DT/SD DT/SD
Lead Assignments
DT/SD
DT/SD
Lead PDIP
Lead SOIC
IRS21091PbF
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IRS21091SPbF
IRS21091(S)PbF
Functional Block Diagrams
DETECT LEVEL SHIFTER PULSE GENERATOR PULSE FILTER
VSS/COM LEVEL SHIFT
DT/SD
DEADTIME DETECT
VSS/COM LEVEL SHIFT
DELAY
Lead Definitions
Symbol Description
DT/SD Logic input high-side low-side gate driver outputs LO), phase with Programmable deadtime lead,disables input/output logic when tied High-side floating supply High-side gate drive output High-side floating supply return Low-side logic fixed supply Low-side gate drive output Low-side return
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IRS21091(S)PbF
IN(LO)
IN(HO)
toff
Figure Input/Output Timing Diagram
Figure Switching Time Waveform Definitions
LO-HO
HO-LO
MDT= LO-HO HO-LO
Figure Shutdown Waveform Definitions
Figure Deadtime Waveform Definitions
(LO)
(HO)
Figure Delay Matching Waveform Definitions
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IRS21091(S)PbF
1300
1300
Turn-On Propagation Delay (ns)
Turn-On Propagation Delay (ns)
1100
1100
Typ.
Typ.
Temperature (oC)
Figure Turn-On Propagation Delay Temperature
VBIAS Supply Voltage
Figure Turn-On Propagation Delay Supply Voltage
Turn-Off Propagation Delay (ns)
Turn-Off Propagation Delay (ns)
Typ.
Typ.
Temperature
Figure Turn-Off Propagation Delay Temperature
BIAS Supply Voltage
Figure Turn-Off Propagation Delay Supply Volta
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IRS21091(S)PbF
Propagation Delay (ns)
Propagation Delay (ns)
Typ.
Typ.
Temperature
Figure Propagation Delay Temperature
BIAS Supply Voltage
Figure Propagation Delay Supply Voltage
urn-O Rise Turn-On TTime (ns)
Max.
Turn-Onn Rise urn-O Time (ns)
Max.
Typ.
Typ.
Temperature(oC)
Figure Turn-On Rise Time Temperature
BIAS Supply Voltage
Figure Turn-On Rise Time Supply Volta
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IRS21091(S)PbF
Turn-Off Fall Time (ns)
Fall Time Turn-Off T(ns)
Max.
Max.
Typ.
Typ.
Temperature
Figure 10A. Turn-Off Fall Time Temperature
Input Voltage
Figure 10B. Turn-Off Fall Time Supply Voltage
1000
1000
Deadtime (ns)
Deadtime (ns)
Typ.
Typ.
Temperature
BIAS Supply Voltage
Figure 11B. Deadtime Supply Voltage
Figure 11A. Deadtime Temperature
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IRS21091(S)PbF
Input Voltage
Deadtime Deadtime (µs)s)
Typ.
Min.
Figure 11C. Deadtime
Temperature (°C)
Figure 12A. Logic Input Voltage Temperat
Logic Input Bias Current (µA)
Input Voltage
Min.
BIAS Supply Voltage
Figure 12B. Logic Input Voltage Supply Voltage
Temperature (°C)
Figure 13A. Logic Input Bias Current Temperature
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IRS21091(S)PbF
Logic Input Bias Current (µA)
Input threshold Supply Voltage
Figure 13B. Logic Input Bias Current Voltage
Max.
Temperature
Figure 14A. Input Positive Going Threshold Temperature
High Level Output Voltage
Input threshold
Max.
Max.
Typ.
-1050
Supply Voltage
Figure 14B. Input Positive Going Threshold Supply Voltage
Temperature
Temperature
Figure 15A. High Level Output Voltage Temperature
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IRS21091(S)PbF
High Level Output Voltage
Typ.
Level Output Voltage
Max. Typ.
Max.
VBIAS Supply Voltage
Figure 15B. High Level Output Voltage Supply Voltage
Temperature
Figure 16A. Level Output Voltage Temperature
Max.
Offset Supply Leakage Current (µA) Offset Supply Leakage Current
Level Output Voltage
Typ.
VBIAS Supply Voltage
Figure 16B. Level Output Voltage Supply Voltage
Temperature
Figure 17A. Offset Supply Leakage Current Temperature
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IRS21091(S)PbF
Offset Supply Leakage Current Offset Supply Leakage Current (µA)
Supply Current (µA) Supply Current
Typ.
Max.
Boost Voltage
Temperature
igure 17B. Offset Supply Leakage Current Boost Voltage
Figure 18A. Supply Current Temperature
Supply
Supply Current (µA) Supply Current
Typ.
Max. Typ. Min.
Supply Voltage
Temperature
Figure 19A. Supply Current Temperature
Figure 19B.
Figure 18B. Supply Current Supply Voltage
Supply Current
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IRS21091(S)PbF
Supply Current (mA)
Logic Input Current Logic Input Current (mA)
Typ.
Typ.
Supply Voltage
Figure 20B.
Supply Current
Temperature
Figure 19B. Supply Current Supply Voltage
Figure 20A. Logic Input Current Temperature
Logic Input Current (mA) Logic Input Current
Logic Input Current (µA) Logic Input Current
Typ.
Supply Voltage
Temperature
Figure 21A. Logic Input Current Temperature
Figure 21B. Logic Input Current
Figure 20B. Logic Input Current Supply Voltage
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IRS21091(S)PbF
UVLO Threshold
Logic Input Current ((µA) Logic Current
Typ.
Supply Voltage
Figure 21B. Logic Input Currentt Supply Voltage
Temperature
Figure Undervoltage Threshold Temperature
UVLO Threshold
UVLO Threshold
Typ.
Typ.
Temperature
Figure Undervoltage Threshold Temperature
Temperature
Figure Undervoltage Threshold Temperature
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IRS21091(S)PbF
Output Source Current
Min.
UVLO Threshold
Typ.
Typ.
Temperature
Figure Undervoltage Threshold Temperature
Temperature
Figure 26A. Output Source Current Temperature
Output Source Current Output SourceCurrent (µA) Output Sink Current Output Sink Current (µA)
1000
Min. Typ.
Typ.
Min.
BIAS Supply Voltage
Figure 26B. Output Source Current Supply Voltage
Temperature (oC)
Figure 27A. Output Sink Current Temperature
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IRS21091(S)PbF
1000 Output SinkCurrent (µA) Output Sink Current
Typ.
Offset Supply Voltage
Typ.
Min.
VBIAS Supply Voltage
Figure 27B. Output Sink Currentt Supply Voltage
Floating Supply Voltage
Figure Maximum Negative Offset Supply Voltage
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IRS21091(S)PbF
Case Outlines
Lead PDIP
01-6014 01-3003 (MS-001AB)
FOOTPRINT 0.72 [.028]
INCHES .0532 .013 .0075 .189 .1497 .0688 .0098 .020 .0098 .1968 .1574
MILLIMETERS 1.35 0.10 0.33 0.19 4.80 3.80 1.75 0.25 0.51 0.25 5.00 4.00
.0040
0.25 [.010]
6.46 [.255]
1.78 [.070]
.050 BASIC .025 BASIC .2284 .0099 .016 .2440 .0196 .050
1.27 BASIC 0.635 BASIC 5.80 0.25 0.40 6.20 0.50 1.27
1.27 [.050]
0.10 [.004]
0.25 [.010]
NOTES:
DIMENSIONING TOLERANCING ASME Y14.5M-1994. CONTROLLING DIMENSION: MILLIMETER DIMENSIONS SHOWN MILLIMETERS [INC HES]. OUTLINE CONFORMS JEDEC OUTLINE MS-012AA.
DIMENSION DOES INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS EXCEED 0.15 [.006]. DIMENSION DOES INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS EXCEED 0.25 [.010]. DIMENSION LENG LEAD SOLDERING SUBSTRATE.
Lead SOIC
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01-6027 01-0021 (MS-012AA)
IRS21091(S)PbF
Tape Reel 8-lead SOIC
LOAD FEED DIRECTION
NTROLLING IMENSION
2.30
1.45 3.20 8.40 7.10 4.40
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IRS21091(S)PbF
LEADFREE PART MARKING INFORMATION
Part number
IRxxxxxx YWW? ?XXXX
Code (Prod mode digit code) logo
Date code
Identifier MARKING CODE Lead Free Released Non-Lead Free Released
Assembly site code SCOP 200-002
ORDER INFORMATION
8-Lead PDIP IRS21091PbF 8-Lead SOIC IRS21091SPbF 8-Lead SOIC Tape Reel IRS21091STRPbF
SOIC-8 MSL2 qualified. This product been designed qualified industrial level. Qualification standards found www.irf.com WORLD HEADQUARTERS: Kansas St., Segundo, California 90245, Tel: (310) 252-7105 Data specifications subject change without notice. 1/16/2007
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IRS21091(S)PbF Floating channel designed bootstrap operation Full

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