IRS2003(S)PbF HALF-BRIDGE DRIVER Floating channel designed b

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IRS2003(S)PbF HALF-BRIDGE DRIVER Floating channel designed b

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Data Sheet PD60269
IRS2003(S)PbF
HALF-BRIDGE DRIVER
Floating channel designed bootstrap operation Fully operational +200 Tolerant negative transient voltage, dV/dt Gate drive supply range from Undervoltage lockout logic compatible Cross-conduction prevention logic Matched propagation delay both channels Internal deadtime High-side output phase with input Low-side output phase with input RoHS compliant
immune
Product Summary
VOFFSET IO+/VOUT ton/off (typ.) Deadtime (typ.) max. mA/270 ns/150
Packages
Description
IRS2003 high voltage, high speed power MOSFET IGBT drivers with dependent high- low-side referenced output channels. Proprietary HVIC 8-Lead SOIC 8-Lead PDIP latch immune CMOS technologies enable ruggeIRS2003S IRS2003 dized monolithic construction. logic input compatible with standard CMOS LSTTL output, down logic. output drivers feature high pulse current buffer stage designed minimum driver crossconduction. floating channel used drive N-channel power MOSFET IGBT high-side configuration which operates
Typical Connection
LOAD
(Refer Lead Assignments correct configuration). This diagram shows electrical connections only. Please refer Application Notes DesignTips proper circuit board layout.
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IRS2003(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage device occur. voltage parameters absolute voltages referenced COM. thermal resistance power dissipation ratings measured under board mounted still conditions.
Symbol
dVs/dt RthJA
Definition
High-side floating absolute voltage High-side floating supply offset voltage High-side floating output voltage Low-side logic fixed supply voltage Low-side output voltage Logic input voltage (HIN Allowable offset supply voltage transient Package power dissipation Thermal resistance, junction ambient Junction temperature Storage temperature Lead temperature (soldering, seconds) Lead PDIP) Lead SOIC) Lead PDIP) Lead SOIC)
Min.
-0.3 -0.3 -0.3 -0.3
Max.
0.625
Units
V/ns
°C/W
Recommended Operating Conditions
input/output logic timing diagram shown Fig. proper operation device should used within recommended conditions. offset rating tested with supplies biased differential.
Symbol
Definition
High-side floating supply absolute voltage High-side floating supply offset voltage High-side floating output voltage Low-side logic fixed supply voltage Low-side output voltage Logic input voltage (HIN Ambient temperature
Min.
Note
Max.
Units
Note Logic operational +200 Logic state held -VBS. (Please refer Design DT97-3 more details).
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IRS2003(S)PbF
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) 1000 unless otherwise specified.
Symbol
toff
Definition
Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time Deadtime, turn-off turn-on turn-on turn-off Delay matching, turn-on/off
Min. Typ. Max. Units Test Conditions
Static Electrical Characteristics
VBIAS (VCC, VBS) unless otherwise specified. VIN, VTH, parameters referenced COM. parameters referenced applicable respective output leads:
Symbol
IQBS IQCC IIN+ IINVCCUV+ VCCUVIO+
Definition
Logic (HIN) Logic input voltage Logic (HIN) Logic input voltage High level output voltage, VBIAS level output voltage, Offset supply leakage current Quiescent supply current Quiescent supply current Logic input bias current Logic input bias current supply undervoltage positive going threshold supply undervoltage negative going threshold Output high short circuit pulsed current Output short circuit pulsed current
Min. Typ. Max. Units Test Conditions
0.05 0.02
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IRS2003(S)PbF
Functional Block Diagram
LEVEL SHIFT PULSE FILTER
PULSE
DEAD TIME SHOOT-THROUGH PREVENTION
DETECT
Lead Definitions
Symbol Description
Logic input high-side gate driver output (HO), phase Logic input low-side gate driver output (LO), phase High-side floating supply High-side gate drive output High-side floating supply return Low-side logic fixed supply Low-side gate drive output Low-side return
Lead Assignments
Lead PDIP
Lead SOIC
IRS2003PbF
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IRS2003SPbF
IRS2003(S)PbF
toff
Figure Input/Output Timing Diagram
toff
Figure Switching Time Waveform Definitions
Figure Deadtime Waveform Definitions
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IRS2003(S)PbF
1400
1400
Turn-On Delay Time (ns)
Turn-On Delay Time (ns)
1200 1000
Temperature (oC)
1200 1000 Typ. Max.
VBIAS Supply Voltage
Figure Turn-On Time Temperature
Figure Turn-On Time Supply Voltage
1000 Max. Turn-On Delay Time (ns) Typ.
Turn-Off Delay Time (ns)
Typ.
Temperature (oC)
Input Voltage
Figure Turn-On Time Input Voltage
Figure Turn-Off Time Temperature
1000
Turn-Off Delay Time (ns) Turn-Off Delay Time (ns)
Turn-Off Delay Time (ns)
Typ.
VBIAS Supply Voltage
Input Voltage
Figure Turn-Off Time Supply Voltage www.irf.com
Figure Turn-Off Time Input Voltage
IRS2003(S)PbF
Turn-On Rise Time (ns)
Turn-On Rise Time (ns)
Typ.
Typ.
Max.
Max.
Temperature
VBIAS Supply Voltage
Figure Turn-On Rise Time Temperature
Turn-Off Fall Time (ns)
Figure Turn-On Rise Time Voltage
Turn-Off Fall Time (ns)
Max.
Max.
Typ.
Typ.
Temperature
Input Voltage
Figure Turn-Off Fall Time Temperature
1400 1200
Figure Turn-Off Fall Time Voltage
1400 1200
Deadtime (ns)
Deadtime (ns)
1000
1000
Max.
Temperature
VBIAS Supply Voltage
Figure Deadtime Temperature
Figure Deadtime Voltage
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IRS2003(S)PbF
Input Voltage Input Voltage
Input Voltage
Temperature
VBIAS Supply Voltage
Figure Logic Input Voltage Temperature
Max.
Figure Logic Input Voltage Supply Voltage
Max.
Input Voltage
Input Voltage
Temperature (oC)
Supply Voltage
Figure 10A. Logic "0"(HIN) Logic (LIN Input Voltage Temperature
Figure 10B. Logic "0"(HIN) Logic Input Voltage Voltage
VBIAS Supply Voltage
Typ.
High Level Output Voltage
High Level Output Voltage
Max.
Max.
Typ.
Temperature
Figure 11A. High Level Output Voltage Temperature www.irf.com
Figure 11B. High Level Output Voltage Supply Voltage
IRS2003(S)PbF
Level Output Voltage Level Output Voltage
Max.
Temperature
Max. Typ.
Typ.
BIAS Supply Voltage
Figure 12A. Level Output Voltage Temperature
Offset Supply Leakge Current (µA) Offset Supply Leakge Current (µA)
Figure 12B. Level Output Voltage Supply Voltage
Boost Voltage
Max.
Temperature (oC)
Figure 13A. Offset Supply Current Temperature
Supply Current (µA)
Typ.
Figure 13B. Offset Supply Current Voltage
Supply Current (µA)
Max.
Temperature (oC)
Floating Supply Voltage
Figure 14A. Supply Current Temperature www.irf.com
Figure 14B. Supply Current Voltage
IRS2003(S)PbF
Supply Current (µA) Typ. Temperature (oC) Max. Supply Current (µA) Supply Voltage Typ. Max.
Figure 15A. Supply Current Temperature
Max.
Figure 15B. Supply Current Voltage
Logic Input Current (µA)
Logic Input Current (µA)
Max. Typ.
Typ.
Temperature (oC)
Supply Voltage
Figure 16A. Logic Input Current Temperature
Logic Input Bias Current (µA)
Figure 16B. Logic Input Current Voltage
Supply oltage
Logic Input Bias Current (µA)
Temperatur Bias Currentt Figure 17A. Logic Input
Temperature www.irf.com
Figure 17B. Logic Input Bias Current Voltage
IRS2003(S)PbF
UVLO Threshold -(V)
Max.
UVLO Threshold +(V)
Typ. Min.
Max. Typ. Typ. Min.
Temperature (oC)
Temperature (oC)
Figure 18A. Undervoltage Threshold(+) Temperature
Output Source Current (mA)
Figure 18B. UndervoltageThreshold Temperature
Output Source Current (mA)
Temperature
Min. Typ.
Typ.
Min.
BIAS Supply Voltage
Figure 19A. Output Source Current Temperature
1000
Output Sink Current (mA) Output Sink Current (mA)
Figure 19B. Output Source Current Supply Voltage
1000
Typ.
Typ.
Min.
Min.
Temperature (oC)
VBIAS Supply Voltage (V)(
Figure 20A. Output Sink Current Temperature www.irf.com
Figure 20B. Output Sink Current Supply Voltage
IRS2003(S)PbF
Case Outlines
8-Lead PDIP
01-6014 01-3003 (MS-001AB)
FOOTPRINT 0.72 [.028]
INCHES .0532 .013 .0075 .189 .1497 .0688 .0098 .020 .0098 .1968 .1574
MILLIMETERS 1.35 0.10 0.33 0.19 4.80 3.80 1.75 0.25 0.51 0.25 5.00 4.00
.0040
0.25 [.010]
6.46 [.255]
1.78 [.070]
.050 BASIC .025 BASIC .2284 .0099 .016 .2440 .0196 .050
1.27 BASIC 0.635 BASIC 5.80 0.25 0.40 6.20 0.50 1.27
1.27 [.050]
0.10 [.004]
0.25 [.010]
NOTES: DIMENSIONING TOLERANCING ASME Y14.5M-1994. CONTROLLING DIMENSION: MILLIMETER DIMENSIONS SHOWN MILLIMETERS [INCHES]. OUTLINE ONFORMS JEDEC OUTLINE MS-012AA.
DIMENSION DOES INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS EXCEED 0.15 [.006]. DIMENSION DOES INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS EXCEED 0.25 [.010]. DIMENSION LENGTH LEAD SOLDERING SUBSTRATE.
8-Lead SOIC
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01-6027 01-0021 (MS-012AA)
IRS2003(S)PbF
Tape Reel 8-lead SOIC
LOADED TAPE FEED DIRECTION
NTROLLING ENSION
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IRS2003(S)PbF
LEADFREE PART MARKING INFORMATION
Part number
IRSxxxxx YWW? ?XXXX
Code (Prod mode digit code) logo
Date code
Identifier MARKING CODE Lead Free Released Non-Lead Free Released
Assembly site code SCOP 200-002
ORDER INFORMATION
8-Lead PDIP IRS2003PbF 8-Lead SOIC IRS2003SPbF 8-Lead SOIC Tape Reel IRS2003STRPbF
SOIC-8 MSL2 qualified. This product been designed qualified industrial level. Qualification standards found www.irf.com WORLD HEADQUARTERS: Kansas St., Segundo, California 90245 Tel: (310) 252-7105 Data specifications subject change without notice. 11/27/2006
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IRS2003(S)PbF HALF-BRIDGE DRIVER Floating channel designed b

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