Logic Selection Guide Second Half 2000 Minds Always Logic Pr
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Logic Selection Guide
Second Half 2000
Minds Always Logic Products, Yours Doesn't Have
LOGIC OVERVIEW
FOCUS CBTLV PRODUCTS
FUNCTIONAL INDEX
FUNCTIONAL CROSS REFERENCE
DEVICE SELECTION GUIDE
PACKAGING SYMBOLIZATION INFORMATION
LOGIC PURCHASING TOOL/ALTERNATE SOURCES
LOGIC SELECTION GUIDE
SECOND HALF 2000
IMPORTANT NOTICE Texas Instruments subsidiaries (TI) reserve right make changes their products discontinue product service without notice, advise customers obtain latest version relevant information verify, before placing orders, that information being relied current complete. products sold subject terms conditions sale supplied time order acknowledgment, including those pertaining warranty, patent infringement, limitation liability. warrants performance semiconductor products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. Customers responsible their applications using components. order minimize risks associated with customer's applications, adequate design operating safeguards must provided customer minimize inherent procedural hazards. assumes liability applications assistance customer product design. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used. TI's publication information regarding third party's products services does constitute TI's approval, warranty endorsement thereof.
Copyright 2000, Texas Instruments Incorporated
INTRODUCTION
CONTACTS/INFORMATION
Texas Instruments (TITM) offers full spectrum logic functions technologies from mature advanced, including bipolar, BiCMOS, CMOS. TI's process technologies offer logic performance features required modern logic designs, while maintaining support more traditional logic products. TI's offerings include products following process technologies device families:
HOME PAGE
ACT, AHC, AHCT, ALVC, AVC, FCT, HCT, LVC, ABT, ABTE, ALB, ALVT, BCT, HSTL, LVT, SSTL, SSTV BTA, CBT, CBTLV, FIFO, GTL, GTLP, JTAG, ALS,
http://www.ti.com
LOGIC HOME PAGE
http://www.ti.com/sc/logic
offers specialized, advanced logic products that improve overall system performance address design issues, including testability, skew requirements, termination, memory drivers, low-impedance drivers. offers wide variety packaging options, including advanced surface-mount packaging fine-pitch small-outline ball-grid-array (BGA) packages. newest package logic MicroStar Juniorultra-thin, fine-pitch BGA. MicroStar Junior complements MicroStar BGApackage deliver high performance allows designer double input/output density same circuit-board area reduce board area one-half, compared standard packaging technology. further information logic families, refer list current logic technical documentation provided this preface. overview logic, Section Section this issue, Focus CBTLV Products, brief overview CBTLV technology products. Sections contain functional index, functional cross-reference, device selection guide, respectively. These sections list functions offered, package availability, applicable literature numbers data sheets. Appendix includes additional information about packaging symbolization. Appendix provides cross-reference match other manufacturers' products those Data sheets downloaded from internet http://www.ti.com ordered through your local sales office authorized distributor. Please back cover this selection guide additional information.
MILITARY SEMICONDUCTOR HOME PAGE
PRODUCT INFORMATION CENTER
http://www.ti.com/ cgi-bin/sc/support.cgi
DATA SHEETS
http://www.ti.com/sc/logic
DOC, MicroStar BGA, MicroStar Junior, OEC, SCOPE, Shrink Widebus, TI-OPC, UBT, Widebus, Widebus+ trademarks Texas Instruments.
CURRENT LOGIC TECHNICAL DOCUMENTATION
Listed below current collection logic technical documentation. These documents ordered through representative authorized distributor referencing appropriate literature number.
Document
Literature Number
Logic Advanced BiCMOS Technology Data Book (1997) SCBD002C AC/ACT CMOS Logic Data Book (1997) SCAD001D AHC/AHCT Logic Advanced High-Speed CMOS Data Book (April 2000) SCLD003B AHC/AHCT Designer's Guide (February 2000) SCLA013D ALS/AS Logic Data Book (1995) SDAD001C ALVC Advanced Low-Voltage CMOS Data Book (June 1999) SCED006A Advanced Very-Low-Voltage CMOS Data Book (March 2000) SCED008B BiCMOS Bus-Interface Logic Data Book (1994) SCBD001B Boundary-Scan Logic IEEE 1149.1 (JTAG) Data Book (1997) SCTD002A IEEE 1149.1 (JTAG) Testability Primer (1997) SSYA002C (5-V) CBTLV (3.3-V) Switches Including Analog Switches Data Book (September 2000) SCDD001C Design Considerations Logic Products Application Book (1997) SDYA002 Design Considerations Logic Products Application Book, Volume (September 1999) SDYA018 Logic Data Book (1994) SDFD001B GTL, BTL, Logic Data Book (1997) SCED004 GTL/GTLP Product Information (January 2000) SCED009 HC/HCT Logic High-Speed CMOS Data Book (1997) SCLD001D Low-Voltage CMOS Logic Data Book (1998) SCBD152A Logic Low-Voltage Technology Data Book (1998) SCBD154 Mobile Computing Logic Solutions Data Book (July 1999) SCPD002 Workstation, Server, High-Speed Memory Interface Logic Solutions Data Book (July 1999) SCPD003 Semiconductor Group Package Outlines Reference Guide (1999) SSYU001E www.ti.com/sc/logic most current data sheets.
TABLE CONTENTS
SECTION LOGIC OVERVIEW
Welcome World Logic Selecting Logic Family Product Life Cycle Family Performance Positioning Logic Vendor Partnerships Complete Low-Voltage Market Coverage Standardization 1-10 CMOS Specifications 1-11 Interfacing Mixed Voltages 1-12 Special "Dual-Supply" Level Shifters 1-13 Bus-Hold Input Characteristics 1-14 Partial-Power-Down Applications 1-15 Power-Up 3-State/Hot Insertion 1-16 Live Insertion 1-17 Precharge Function Avoids Data Corruption 1-18 Damping Resistors 1-19 DOCCircuitry Provides Best-Possible Signal Integrity Without Compromising Speed 1-20 Dynamic Output Control (DOCTM) Available With 1-21 Advanced-Logic Feature List 1-22 Little Logic (Single Gate Dual Gates) 1-23 Little-Logic Features 1-24 TI's GTLP Family Consolidates Best Features Existing Backplane Logic 1-25 GTLP Specially Designed High-Performance Backplanes 1-26 Advanced Very-Low-Voltage CMOS 1-27 CBTLV 1-28 CBT/CBTLV Product Family 1-29 Packaging Options 1-30 Device Names Package Designators 1-31 DSPS-Related FIFO Products 1-32 FIFO Product-and-Technology Roadmap 1-33 FIFOs Optimize System Performance 1-34
SECTION FOCUS CBTLV PRODUCTS
What Talking About? What CBTLV Switches? When CBTLV Switches Used? Let's Technical Other Types Specialized Switches Want More Information? 2-10
SECTION FUNCTIONAL INDEX
Backplane Logic (GTL, GTLP, FB+/BTL, ABTE/ETL) Drivers Transceivers Boundary-Scan IEEE 1149.1 (JTAG) Logic Boundary-Scan (JTAG) Devices Boundary-Scan (JTAG) Support Devices Buffers Drivers Inverting Buffers Drivers Noninverting Buffers Drivers Switches 3-11 Exchange/Multiplexing Switches 3-11 Standard Switches 3-11 Counters 3-13 Binary Counters 3-13 Decade Counters 3-14 Decoders, Encoders, Multiplexers Decoders Multiplexers Priority Encoders 3-15 3-15 3-16 3-17
FIFOs (First-In, First-Out Memories) 3-18 Asynchronous FIFO Memories 3-18 Synchronous FIFO Memories 3-19 Flip-Flops D-Type Flip-Flops (3-state) D-Type Flip-Flops (non 3-state) Other Flip-Flops Gates Inverters Gates NAND Gates AND-OR-Invert Gates Gates Gates Exclusive-OR Gates Exclusive-NOR Gates Gate Delay Elements Inverters 3-20 3-20 3-21 3-21 3-22 3-22 3-23 3-24 3-24 3-25 3-25 3-25 3-26 3-26
Latches 3-27 D-Type Latches (3-state) 3-27 Other Latches 3-28
viii
TABLE CONTENTS (continued)
SECTION (continued)
Little Logic Gates NAND Gates Gates Gates Exclusive-OR Gates D-Type Flip-Flops Inverters Inverting Buffers Drivers Noninverting Buffers Drivers Standard Switches
3-28 3-28 3-28 3-29 3-29 3-29 3-29 3-29 3-29 3-30 3-30
Memory Drivers Transceivers (HSTL, SSTL, SSTV) 3-30 Buffers, Drivers, Latches 3-30 Registers 3-31 Registers 3-31 Specialty Logic Adders Arithmetic Logic Units Bus-Termination Arrays Networks Comparators (identity) Comparators (magnitude) Digital Phase-Locked Loops (PLLs) Drivers/Multipliers ECL/TTL Functions Frequency Dividers/Timers Monostable Multivibrators Oscillators Parity Generators Checkers Translation Voltage Clamps Voltage-Level Shifters Transceivers Parity Transceivers Registered Transceivers Standard Transceivers Universal Functions Universal Transceivers Universal Drivers Universal Exchangers 3-32 3-32 3-32 3-32 3-33 3-33 3-33 3-33 3-34 3-34 3-34 3-35 3-35 3-35 3-35 3-36 3-36 3-36 3-37 3-40 3-40 3-41 3-41
SECTION FUNCTIONAL CROSS REFERENCE
SECTION DEVICE SELECTION GUIDE
Advanced BiCMOS Technology Logic ABTE/ETL Advanced BiCMOS Technology/Enhanced Transceiver Logic 5-11 AC/ACT Advanced CMOS Logic 5-13 AHC/AHCT Advanced High-Speed CMOS Logic 5-21 Advanced Low-Voltage BiCMOS Logic 5-27 Advanced Low-Power Schottky Logic 5-29 ALVC Advanced Low-Voltage CMOS Technology Logic 5-35 ALVT Advanced Low-Voltage BiCMOS Technology Logic 5-39 Advanced Schottky Logic 5-41 Advanced Very-Low-Voltage CMOS Logic 5-45 BiCMOS Technology Logic 5-47 64BCT 64-Series BiCMOS Technology Logic 5-47 Bus-Termination Arrays 5-51 Crossbar Technology Logic 5-53 CBTLV Low-Voltage Crossbar Technology Logic 5-57 CD4000 CMOS B-Series Integrated Circuits 5-59 Fast Logic 5-63 FB+/BTL FutureBus+/Backplane Transceiver Logic 5-67 Fast CMOS Logic 5-69 FIFO First-In, First-Out Memories 5-77 Gunning Transceiver Logic 5-81 GTLP Gunning Transceiver Logic Plus 5-83 HC/HCT High-Speed CMOS Logic 5-87 IEEE 1149.1 (JTAG) Boundary-Scan Logic 5-97 Little Logic 5-101 Low-Power Schottky Logic 5-105 Low-Voltage CMOS Technology Logic 5-111 Low-Voltage CMOS Technology Logic 5-115 Low-Voltage BiCMOS Technology Logic 5-119 Inter-Integrated Circuit Applications 5-123 Schottky Logic 5-125 SSTL/SSTV Stub Series-Terminated Logic 5-129 HSTL High-Speed Transceiver Logic 5-129 Transistor-Transistor Logic 5-131 Translation Voltage Clamp Logic 5-135
APPENDIX PACKAGING SYMBOLIZATION INFORMATION.
Device Names Package Designators Logic Products Device Names Package Designators Logic Products Formerly Offered Cypress Semiconductor Device Names Package Designators Logic Products Formerly Offered Harris Semiconductor Logic Symbolization Guidelines Moisture Sensitivity Package A-15 Packaging Cross-Reference A-17
APPENDIX LOGIC PURCHASING TOOL/ALTERNATE SOURCES.
LOGIC OVERVIEW
FOCUS CBTLV PRODUCTS
FUNCTIONAL INDEX
FUNCTIONAL CROSS REFERENCE
DEVICE SELECTION GUIDE
PACKAGING SYMBOLIZATION INFORMATION
LOGIC PURCHASING TOOL/ALTERNATE SOURCES
LOGIC OVERVIEW
SECTION LOGIC OVERVIEW
CONTENTS
Welcome World Logic Selecting Logic Family Product Life Cycle Family Performance Positioning Logic Vendor Partnerships Complete Low-Voltage Market Coverage Standardization 1-10 CMOS Specifications 1-11 Interfacing Mixed Voltages 1-12 Special "Dual-Supply" Level Shifters 1-13 Bus-Hold Input Characteristics 1-14 Partial-Power-Down Applications 1-15 Power-Up 3-State/Hot Insertion 1-16 Live Insertion 1-17 Precharge Function Avoids Data Corruption 1-18 Damping Resistors 1-19 DOCCircuitry Provides Best-Possible Signal Integrity Without Compromising Speed 1-20 Dynamic Output Control (DOCTM) Available With 1-21 Advanced-Logic Feature List 1-22 Little Logic (Single Gate Dual Gates) 1-23 Little-Logic Features 1-24 TI's GTLP Family Consolidates Best Features Existing Backplane Logic 1-25 GTLP Specially Designed High-Performance Backplanes 1-26 Advanced Very-Low-Voltage CMOS 1-27 CBTLV 1-28 CBT/CBTLV Product Family 1-29 Packaging Options 1-30 Device Names Package Designators 1-31 DSPS-Related FIFO Products 1-32 FIFO Product-and-Technology Roadmap 1-33 FIFOs Optimize System Performance 1-34
Welcome World Logic
Specialty
GTLP SSTL From Harris
Logic
CD4000 AC/ACT
From Cypress
3.3-V Logic
ALVT ALVC CBTLV
HSTL
HC/HCT
AHC/ AHCT
2.5-V Logic
ALVT CBTLV ALVC
1.8-V Logic
ALVC
Selecting Logic Family.
Designer Careabouts. Offers.
Best first High Speed CBT, CBTLV, AVC, ALB, ALVT, ALVC, ABT, LVT, Critical Requirements: Slew Rate Propagation Delay High Drive Incident Wave Switching ALVT, LVT, ABT, ALB, ALVC, LVC,
highest interest first
Power Migrate Lower-Voltage Families
CBT, CBTLV, LVC, AHC, ALVC, AVC, ALVT, LVT.
Ease LVC, ALVT, LVT, AHC, AVC, ABT, CBT, CBTLV. Hold, Tolerance, IOFF, Insertion
trademark Texas Instruments.
products with DOCincrease dynamic drive during switching
Product Life Cycle
ALVC CBTLV GTLP ALVT Little Logic CD4000 Bipolar CMOS BiCMOS
Introduction
Growth
Maturity
Decline
Obsolescence
Investment levels products all-time high. End-equipment requirements accelerating product introduction. remains committed last supplier older families.
Drive (mA)
Family Performance Positioning
GTLP ALVT GTLP
AC/T HC/T AHC/T CBTLV ALVC ALVT GTLP
BiCMOS Technology Advanced BiCMOS Technology Bipolar Technology Advanced CMOS High-Speed CMOS Advanced High-Speed CMOS Crossbar Technology Low-Voltage Low-Voltage HCMOS Low-Voltage CMOS Advanced Low-Voltage CMOS Low-Voltage BiCMOS Technology Advanced Low-Voltage BiCMOS Technology Advanced Low-Voltage BiCMOS Gunning-Transceiver Logic Plus Advanced Very-Low-Voltage CMOS
ALVC ALVT
much higher dynamic drive during switching stage specified
AC/ACT
ALVC AHC/ AHCT ALVC CBTLV CBTLV Performance (ns)
HC/HCT
Logic Vendor Partnerships
Performance Range
high performance performance high performance medium performance performance 2.5-V high performance
ALVT ALVC
Philips Hitachi
ALVT ALVC
Toshiba
ABT-C
ALVC
ALVC
Complete Low-Voltage Market Coverage Standardization
Performance
AHC, ACT, AHC, ALS,
Philips
1-10
ALVC ALVC ALVC
Hitachi
ALVT ALVT
ALVC ALVT 6.5-ns speed 8.5-ns speed 4-ns speed 3-ns speed 2.4-ns speed <2-ns speed 13.5-ns speed (3.3 24/24-mA drive 32/64-mA drive 24/24-mA drive 32/64-mA drive 12/12-mA drive -8/8-mA drive Ultra-low Ultra-low Ultra-low standby power standby power standby power standby power 4/4-mA drive (3.3 standby power sources sources sources sources sources 3.3-V hold hold hold hold hold input tolerant tolerant tolerant tolerant 3.3-V tolerant sources Gate functions insertion insertion Partial power down Partial power down Auto3-state
CMOS Specifications
Levels
CMOS Levels Low-Voltage Levels
VCC= 2.7-3.6
3.85
1.35
1-11 1-11
1-12
Interfacing Mixed Voltages
Open-Drain Outputs 05/06/07 Functions
Functions Available (AHC, (LVC) Also Possible
Wired-Function Technique
VCC1
VCC2 RPULLUP
RPULLUP
Required input level depends VCC1 Output level depends VCC2
Phantom links output side reduce component count.
LVC07 function
Supply voltage VCC1 LVC07 understands 1.8-V Levels 2.5-V Levels 3.3-V Levels Levels Pullup resistor connected Level conversion range
Special `Dual-Supply' Level Shifters
'LVC4245, 'LVCC3245, 'LVCC4245, 'ALVC164245
V3CC VCC1 2DIR
'4245 pinning VCCA
'245 pinning VCCB VCCB
ALVC164245 LVC4245 have pins 3.3-V pins. LVCC3245 LVCC4245 have adjustable output voltages. LVCC3245 have side from while other side between LVCC4245 fixed while other side connected between this way, full mixed-mode system designed.
'4245
LVCC3245 LVCC4245 devices This
'164245
This solution compatible with 3.3-V-only systems. Devices replaced later with 3.3-V parts without redesign
1-13 1-13
VCC2 VCC2
1-14
Bus-Hold Input Characteristics
Device Bus-Hold Cell
Local
backplane
Typically 100.200
Hold current
flow when 3-state
Holds last known state inputs Provides holding current hold current does load driving output valid logic level Negligible input/output capacitance impact (0.5 Eliminates need external resistor unused floating pins Reduces number passive components board Bus-hold nomenclature SN74xxxHxxx; e.g., SN74LVCH245
Partial-Power-Down Applications
Active System Part
Clamping Diodes `High' ~3.3
Parasitic Clamping Diode
Inactive System Part
~3.0
Circuit Implementation/ Modification IOFF Circuit
IOFF Feature
Blocking Diode
Logic Family IOFF Specification GTL, ABT, LVT, ALVT ±100 GTLP LVC,
When IPIN VPIN max.
Unexpected device behavior during partial powering cause system failure. Input signals source current input clamping diodes powered-down circuits.
1-15
1-16
Power-Up 3-State/Hot Insertion
ABT: LVT: ALVT:
ABT: LVT: ALVT:
Output external resistor from line
follows VCC, ensuring device remains 3-state during power up/power down
IOFF IOZ(PU/PD) data sheet
Devices tested ramp rates µs/V-20 µs/V
Live Insertion
System Function/Capability Circuit Implementation/ Circuit Implementation/ Modification Modification Precharge Circuit Precharge Circuit
BIAS
Precharge Circuit
Output Stage
Supporting Device Specifications
IOFF IOZPU IOZPD BIAS
Card Socket BIAS
1-17
1-18
Precharge Function Avoids Data Corruption
(BIAS Vcc)
Live-Insertion Situation
Line Operation
Volts
Possible Scenarios
High Data Data
Peak With Precharge Peak With Precharge
High
Possible Peak Without Precharge
Card Insertion During Operation
Threshold
Precharge Level
time
Possible Peak Without Precharge
Point Live Insertion During High
Point Live Insertion During
Equals Insertion Additional Capacitance
VBIAS charges capacitance threshold voltage
Damping Resistors
Output Voltage
-0.5 -1.0 -1.5
ALVCH16827 (Advanced Low-Voltage CMOS Logic without series resistors) ALVCH162827 (Advanced Low-Voltage CMOS Logic with series resistors)
Switching Time
Examples:
Limits current reduce noise from undershoot overshoot Aids line termination (reducing ringing line reflection improve signal quality) Series resistor output stage Short propagation delays power consumption Supports highest system performance and/or slower memories Reduces component count, board space, mounting costs
'ALVCH2245 'ALVCH162245 `ALVCHR16245
Extra device name indicates damping resistor outputs only; indicates both ports
1-19
Output Voltage
1-20
DOCCircuitry Provides Best-Possible Signal Integrity Without Compromising Speed
uses high drive only when needed (during transition)
2.32 2.01 1.81 1.55 1.29 1.03 0.77 0.52 0.25 20.7 21.4 22.1 22.8 23.5 24.2 24.9 25.6 26.3
Region drive during steady state signal
Region Region
Region Output impedance dynamically lowered during signal transition drive line Region Output impedance dynamically raised reduce noisy signal overshoots undershoots
Region
Switching Time
Dynamic Output Control (DOCTM) Available With
uses high drive only when needed (during transition)
Output Voltage
-0.5 -1.0 -1.5
ALVCH16827 (Advanced Low-Voltage CMOS Logic without series resistors) ALVCH162827 (Advanced Low-Voltage CMOS Logic with series resistors) AVC16827 (Advanced Very-Low-Voltage CMOS Logic with circuitry)
Switching Time
Circuit Delivers high drive current achieve maximum speed Reduces overshoot undershoot normally associated with fast edges Eliminates need damping resistors
Output waveforms taken driving PC100 Network Load Single Switching
1-21 1-21
1-22
Advanced-Logic Feature List
Mixed-voltage tolerant I/Os level shifting LVC, ALVC, LVT, ALVT, AVC, GTL, GTLP Systems mixed supply voltages CMOS levels many designs. Most advanced-logic families allow mixed-signal interfacing provide level-shifting functions certain mixed-voltage applications. Hold CBT, ABT, LVC, ALVC, LVT, ALVT, AVC, GTL, GTLP Bus-hold circuitry selected logic families helps solve problem floating inputs eliminates need pullup pulldown resistors holding last known state input. II(HOLD) data sheet. Partial power down IOFF ABT, LVC, LVT, ALVT, AVC, GTL, GTLP IOFF circuitry prevents device from being damaged during insertion. IOZPU, IOZPD, IOFF specifications data sheet. Power-up 3-state ABT, LVT, ALVT, LVC, GTLP Power-up 3-state ensures valid output levels during power valid outputs during power down. Bias GTLP, ABTE, CBT, CBTLV, (1655 only) VBIAS precharges capacitance threshold voltage, preventing glitching active data. Series damping resistors ABT, LVC, ALVC, LVT, ALVT Series damping resistors limit signal overshoot undershoot providing better impedance matching line termination without need external resistors. circuit revolutionary Dynamic Output Control (DOC) circuitry automatically lowers circuit output impedance during signal transition later raises after signal transition reduce noise. JTAG ACT, BCT, ABT, (selected functions)
(Single Gate Dual Gates)
Principle Example
SN74AHC1G00DBVR SN74AHCT1G00DBVR
Little Logic
Application
Y=A.B
Input NAND Gate
SN74AHC2G00DCTR SN74AHCT2G00DCUR
Benefits
Small SOP-5 package Optimized layout: Reduced noise Enhances ASIC functionality
Y=A.B
Dual Input NAND Gate
Less board space needed Simplified routing Better routing possibilities Quick fixes
1-23
1-24
Little-Logic Features
Family Operating 2.0-5.5 1.8-5.5 1.5-3.6 IOFF Tol. IOH/IOL (mA)
(ns,
AHC1G AHCT1G LVC1G LVC2G ALVC1G ALVC2G
Competition
TC7SH (VHC) TC7SZ (LCX) TC7SA (VCX) 1.5-3.6 1.8-5.5 1.8-3.6
symbol indicates
TI's GTLP Family Consolidates Best Features Existing Backplane Logic
System Clock Frequency (MHz)
Backplane $200M/year (10% logic TAM)
Higher quency ECL/PECL othe live h-dr rtio More package options evic 3.3-V ilit tchi tolerance insertion
GTLP
ALVT
3.3-V
Heavily Loaded Backplane
Internal Estimate
1-25
GTLP Specially Designed High-Performance Backplanes
Mass Storage
GTLP Transceiver ASIC
1-26
Remote Access Internet Routers ASwitches SONET/SDH Add-Drop
Termination Backplane Trace Connector GTLP Transceiver
Multiplexers Wireless Base Stations Compact
multi-slot high-performance parallel backplane
GTLP allows higher-frequency operation (60-110-MHz clock) GTLP allows significantly increased data transfer rates
0.96 1.76 using 16-bit Widebusdevice bits 110-MHz clock
GTLP backward compatible with existing logic, allowing easy migration
higher speeds using existing backplane daughter-card layouts
Advanced Very-Low-Voltage CMOS
Fastest Logic Family Available
FAMILY
Features Specified 3.3-V Tolerance Hold IOFF Partial Power Down Dynamic Drive Through DOCCircuit
Device SN74AVC16244 SN74AVC16244 SN74AVC16244
1-27
Drive -12/12 (Static) (Static) (Static)
TPD(MAX)
1-28
CBTLV
Circuit Diagram
N-Channel
VIN/VOUT Graph
VOUT
N-Channel
Features Level shifting SN74CBTDxxx Precharged outputs SN74CBT6800
CBTLV Circuit Diagram
CBTLV VIN/VOUT Graph
VOUT
P-Channel
N-Channel
P-Channel
N-Channel
CBTLV Features level shifting Precharged outputs SN74CBTLV16800
CBT/CBTLV Product Family
Extremely propagation delays make crossbar switches effective replacement drivers receivers high-speed systems which signal buffering required.
CBT/CBTLV3384 Switch
Channels
What Switches (CBT/CBTLV)? Simple switches specified (CBT) (CBTLV) support easy communication between devices, i.e., memory ASIC Near-zero propagation delay enables highest system speed tpd(MAX) 0.25 both CBTLV Very power consumption makes them ideal portable systems ICC(MAX) ICC(MAX) CBTLV Where Switches Used? Wide application: PCs, workstations, hard disk drives, boards, translators, hot-card insertion, telecommunication equipment
CBT/CBTLV3383 Exchanger
Channels
CBTxxxx Functionally equivalent QSxxxx CBTLVxxxx Functionally equivalent PI3Bxxxx Which Package Choose Industry standard pinouts ('244, '245) Fine-pitch packaging (SOIC, SSOP,TSSOP,TVSOP, WidebusTM, Shrink WidebusSingle switch SN74CBT/CBTLV1G125. AVAILABLE!!! CBT6800 CBTLV16800 switch with precharged outputs available Literature CBT/CBTLV Selection Guide (literature number SCDB002) CBT/CBTLV Data book (literature number SCDD001C)
1-29 *Widebus Shrink Widebus trademarks Texas Instruments.
(Magnified 2.5X detail) 5-Pin Area 8.12 0.95 5-Pin Area 0.65 96-Ball LFBGA Area 74.25
Widebus
SOIC
TSSOP
QSOP
114-Ball LFBGA Area
Widebus+
Shrink Widebus
SSOP
TVSOP
package designators)
32-Bit
Widebus Shrink Widebus trademarks Texas Instruments.
LFBGA
1-30
Packaging Options
Bits Bits Bits 16/18 Bits WidebusDL
48-Pin SSOP Area 2.74 0.635
16/18 Bits Shrink WidebusDGG
48-Pin TSSOP Area
16/18 Bits WidebusDGV
48-Pin TVSOP Area
20-Pin SOIC Area 2.65 1.27
20-Pin SSOP Area 0.65
20-Pin TSSOP Area 0.65
Single Gate
32-Bit Ball Grid Array
LFBGA offers space savings over TSSOP over TVSOP
Family ABT/E AC/ACT AHC/AHCT Standard Prefix Military (54) Commercial (74) ALVC ALVT Special Feature Blank special features Configurable CBT/LV Level Shifting Diode CD4000 Hold Damping Resistor Inputs/Outputs Schottky Clamping Diodes Power-Up 3-State GTLP HC/HCT Width HSTL Blank Gates, MSI, Octals Single Gate Dual Gate Octal IEEE 1149 (JTAG) Widebus(16,18, bit) SSTL Widebus IEEE 1149.1 (JTAG) Widebus+(32 bit)
1-31
Device Names Package Designators SN74
Tape Reel Package Type SOIC SSOP DBB, TVSOP DCT, TSSOP DGG, TSSOP LCCC PLCC CPGA GKE, LFBGA HFP, CQFP CDIP PDIP PAG, PAH, PCA, PCB, TQFP Device Revision Blank Revision Letter Designator
Function
Options Blank Options Series Damping Resistor Outputs Level Shifter port high Level Shifter port high Line Driver
1-32
DSPS-Related FIFO Products
FIFOs Offer Glueless Interface
Leading- Edge DSPs FIFO Performance
Technology Leadership Creates World-Class Manufacturing Excellence Ensures Lowest
Total Cost Ownership
FIFO Product-and-Technology Roadmap
Configuration:
Performance Clock MHz)
32Kx36 65Kx18 512x18 4Kx18 512x36 2Kx36 64x18 2Kx36
ALVC78xx ACT36xx ABT36xx ACT78xx
ALVC36xx (Now)
SN74V2xx 0.35 (3Q00)
DSPS FIFOs 0.15 (1H01)
(Now)
Availability
1-33
FIFOs Optimize System Performance
ANALOG FRONT BOARD
MEMORY
1-34
ANALOG BACK
100100.
FIFO 011001.
Converter
FIFO
TMS320
FIFO
Converter
Smoothing Filter
Host Interface
Low-Pass Filter Sample Hold
Host
LOGIC OVERVIEW
FOCUS CBTLV PRODUCTS
FUNCTIONAL INDEX
FUNCTIONAL CROSS REFERENCE
DEVICE SELECTION GUIDE
PACKAGING SYMBOLIZATION INFORMATION
LOGIC PURCHASING TOOL/ALTERNATE SOURCES
FOCUS CBTLV PRODUCTS
SECTION FOCUS CBTLV PRODUCTS
CONTENTS
What Talking About? What CBTLV Switches? When CBTLV Switches Used? Let's Technical Other Types Specialized Switches Want More Information? 2-10
FOCUS CBTLV PRODUCTS
What Talking About?
Crossbar technology (CBT) TI's product-technology name switches. Some companies refer this device type "switches," others generic term "bus switches," Quality Semiconductor (now IDT) calls devices QuickSwitchtechnology. case, devices described this section used digital switches. mechanical switch conditions, off. CBTLV products have conditions, impedance (on) high impedance (off). When they (low impedance), they like piece wire with resistance. When they (high impedance), they like open circuit.
What CBTLV Switches?
logic family composed n-channel transistor that operates switch. When transistor conducting, voltage port passed through port vice versa. With CBTD products, diode added reduce power supply level then additional drop across gate source (VGS yields 3.3-V signal, making devices useful voltage-translation applications. Figure shows transistor-level diagram typical device.
Figure Typical Device (One Channel Shown)
CBTLV switch additional p-channel transistor parallel with n-channel transistor, allowing switch operate 3.3-V VCC. Figure shows additional circuitry needed low-voltage operation.
Figure Typical CBTLV Device (One Channel Shown)
devices include additional circuitry enhanced functionality CBTD, CBTK, CBTR, CBTS products. little logic (single gates) also available.
QuickSwitch trademark IDT.
FOCUS CBTLV PRODUCTS
When CBTLV Switches Used?
switches used applications which there need connect disconnect signals demand. They used where application does need drive current over above applied amount. They used where propagation delays must kept minimum where voltage translation isolation needed. multiprocessor systems, CBT/CBTLV switches used extremely fast connections, multiplexing, memory interleaving, byte swapping, variety other switching functions. Extremely propagation delays (250 make CBT/CBTLV switches effective replacement drivers receivers high-speed systems where signal buffering required. addition, power consumption helps prolong battery life between charges portable systems. Small-footprint packages save board space applications such cards. applications include:
Hot-card insertion Notebook docking Memory interface Data multiplexing/demultiplexing Voltage translation
FOCUS CBTLV PRODUCTS
Let's echnical
Crossbar switches high-speed bus-connect devices. Each switch consists n-channel transistor driven CMOS gate. When enabled, n-channel transistor gate pulled VCC, switch These devices have on-state resistance approximately propagation delay They capable conducting current each. transistor clamps output less than gate potential, regardless level input pin. This n-channel transistor characteristics (see Figures Note difference between gate (VCC) source (VO) point graph.
Output Voltage Supply Voltage
Figure Output Voltage Supply Voltage
FOCUS CBTLV PRODUCTS
Output Voltage
Input Voltage
Figure Output Voltage Input Voltage
on-state resistance (ron) increases gradually with until approaches where rapidly increases, clamping (see Figure Also, nature n-channel transistor design, input output terminals fully isolated when transistor off. Leakage capacitance ground between input output, which minimizes feedthrough when transistor off.
On-State Resistance Input Voltage
Figure State Resistance Input Voltage
FOCUS CBTLV PRODUCTS
Other Types Specialized Switches
CBTD Switches
Applications requiring inputs outputs operating mixed 3.3-V systems which 3.3-V systems have tolerant I/Os might CBTD devices. series diode paralleling resistor incorporated into line CBTD device, reducing output voltage approximate maximum value less than This value enough tolerated 3.3-V system high enough seen valid high level system.
CBTS Switches
Often, high-speed buses with improper termination have excessive undershoot overshoot voltages. undershoot event does affect performance switch when But, undershoots occur when switch off, biased into conduction pass unwanted data causing data error. prevent this, CBTS devices contain Schottky diodes connected from source drain ground. When buses negative voltage exceeding forward turn-on voltage Schottky diode, diode turns clamping source drain voltage NMOS switch, keeping buses isolated.
CBTK Switches
CBTK devices integrate active-clamp undershoot-protection circuit both ports. active-clamp circuit, bias generator sets voltage slightly above ground, allowing active-clamp pullup voltage turn during undershoot event. This clamp counteracts undershoot voltage limits possibility data corruption.
Analog Bilateral Switches
Although technically products, these switches often considered similar applications. They designed handle both analog digital signals with amplitudes 5.5-V peak (higher CD4000 series) transmitted either direction. Applications include signal gating, chopping, modems, signal multiplexing analog-to-digital digital-to-analog conversion systems. Analog switches available CD4000, HCT, technology families.
FOCUS CBTLV PRODUCTS
Want More Information?
additional information data sheets CBTLV products, please websites: Detailed information about available packages Appendix list most recent data books logic products preface this publication. following documents also useful:
Title
Texas Instruments Solution Undershoot Protection Switches Migration from 3.3-V 2.5-V Power Supplies Logic Devices Flexible Voltage-Level Translation With Family Devices Understanding Advanced Bus-Interface Products Implications Slow Floating CMOS Inputs 3.3-V Translation With SN74CBTD3384 Texas Instruments Crossbar Switches
Literature Number
SCDA007 SCEA005 SCDA006 SCAA029 SCBA004C SCDA003B SCDA001A
Publication Date
April 2000 December 1997 July 1999 1996 February 1998 March 1997 July 1995
2-10
LOGIC OVERVIEW
FOCUS CBTLV PRODUCTS
FUNCTIONAL INDEX
FUNCTIONAL CROSS REFERENCE
DEVICE SELECTION GUIDE
PACKAGING SYMBOLIZATION INFORMATION
LOGIC PURCHASING TOOL/ALTERNATE SOURCES
FUNCTIONAL INDEX
SECTION FUNCTIONAL INDEX
CONTENTS
Backplane Logic (GTL, GTLP, FB+/BTL, ABTE/ETL) Drivers Transceivers Boundary-Scan IEEE 1149.1 (JTAG) Logic Boundary-Scan (JTAG) Devices Boundary-Scan (JTAG) Support Devices Buffers Drivers Inverting Buffers Drivers Noninverting Buffers Drivers Switches 3-11 Exchange/Multiplexing Switches 3-11 Standard Switches 3-11 Counters 3-13 Binary Counters 3-13 Decade Counters 3-14 Decoders, Encoders, Multiplexers Decoders Multiplexers Priority Encoders 3-15 3-15 3-16 3-17
FIFOs (First-In, First-Out Memories) 3-18 Asynchronous FIFO Memories 3-18 Synchronous FIFO Memories 3-19 Flip-Flops D-Type Flip-Flops (3-state) D-Type Flip-Flops (non 3-state) Other Flip-Flops Gates Inverters Gates NAND Gates AND-OR-Invert Gates Gates Gates Exclusive-OR Gates Exclusive-NOR Gates Gate Delay Elements Inverters 3-20 3-20 3-21 3-21 3-22 3-22 3-23 3-24 3-24 3-25 3-25 3-25 3-26 3-26
CONTENTS (continued)
Latches 3-27 D-Type Latches (3-state) 3-27 Other Latches 3-28 Little Logic Gates NAND Gates Gates Gates Exclusive-OR Gates D-Type Flip-Flops Inverters Inverting Buffers Drivers Noninverting Buffers Drivers Standard Switches 3-28 3-28 3-28 3-29 3-29 3-29 3-29 3-29 3-29 3-30 3-30
Memory Drivers Transceivers (HSTL, SSTL, SSTV) 3-30 Buffers, Drivers, Latches 3-30 Registers 3-31 Registers 3-31 Specialty Logic Adders Arithmetic Logic Units Bus-Termination Arrays Networks Comparators (identity) Comparators (magnitude) Digital Phase-Locked Loops (PLLs) Drivers/Multipliers ECL/TTL Functions Frequency Dividers/Timers Monostable Multivibrators Oscillators Parity Generators Checkers Translation Voltage Clamps Voltage-Level Shifters Transceivers Parity Transceivers Registered Transceivers Standard Transceivers Universal Functions Universal Transceivers Universal Drivers Universal Exchangers 3-32 3-32 3-32 3-32 3-33 3-33 3-33 3-33 3-34 3-34 3-34 3-35 3-35 3-35 3-35 3-36 3-36 3-36 3-37 3-40 3-40 3-41 3-41
Product available technology indicated Product available reduced-noise advanced CMOS (11000 series) product planned technology indicated center open collector open drain 3-state
BACKPLANE LOGIC (GTL, GTLP, FB+/BTL, ABTE/ETL)
Drivers Transceivers
DESCRIPTION 1:6/1:2 GTLP-to-LVTTL Fanout Drivers 2-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Transceivers with Selectable Parity 7-Bit TTL/BTL Transceivers (IEEE 1194.1) 8-Bit LVTTL-to-GTLP Transceivers 8-Bit TTL/BTL Registered Transceivers (IEEE 1194.1) 8-Bit TTL/BTL Transceivers (IEEE 1194.1) 9-Bit TTL/BTL Address/Data Transceivers (IEEE 1194.1) 9-Bit TTL/BTL Competition Transceivers (IEEE 1194.1) 11-Bit Incident Wave Switching Transceivers with 3-State Open-Collector Outputs 16-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Transceivers LVTTL-to-GTL/GTL+ Universal Transceivers with Live Insertion LVTTL-to-GTLP Adjustable-Edge-Rate Universal Transceivers 16-Bit Incident Wave Switching Transceivers with 3-State Outputs 16-Bit LVTTL-to-GTLP Transceivers 17-Bit LVTTL-to-GTL/GTL+ Universal Transceivers with Buffered Clock Outputs 17-Bit LVTTL-to-GTLP Universal Transceivers with Buffered Clock 17-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Universal Transceivers with Buffered Clock 17-Bit TTL/BTL Universal Storage Transceivers with Buffered Clock Lines (IEEE 1194.1) 17-Bit LVTTL/BTL Universal Storage Transceivers with Buffered Clock Lines (IEEE 1194.1) 18-Bit TTL/BTL Universal Storage Transceivers (IEEE 1194.1) 18-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Universal Transceivers 18-Bit LVTTL-to-GTL/GTL+ Universal Transceivers 18-Bit LVTTL-to-GTLP Universal Transceivers 18-Bit LVTTL-to-GTL/GTL+ Transceivers 18-Bit LVTTL-to-GTLP Universal Transceivers 32-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Transceivers 32-Bit LVTTL-to-GTLP Transceivers
TYPE 1394 2041 2033 2040 2031 2032 16246 1645 1655 1655 16245 16945 16616 16916 1616 1651 1653 1650 1612 16612 16612 16622 16923 16912 3245 32945
TECHNOLOGY ABTE GTLP
FUNCTIONAL INDEX
BOUNDARY SCAN IEEE 1149.1 (JTAG) LOGIC
Boundary Scan (JTAG) Devices
DESCRIPTION Scan-Test Devices with Octal Transceivers Scan-Test Devices with 18-Bit Transceivers Scan-Test Devices with 18-Bit Inverting Transceivers
OUTPUT
TYPE 8245 18245 18640 18646 182646 18652 182652 18502 182502 18512 182512 18504
TECHNOLOGY
Scan-Test Devices with 18-Bit Transceivers Registers
Scan-Test Devices with 18-Bit Universal Transceivers
Scan-Test Devices with 20-Bit Universal Transceivers
182504 18514 8240 8244 8646 8652 8373 8374 8543 8952
Scan-Test Devices with Octal Buffers Scan-Test Devices with Octal Transceivers Registers Scan-Test Devices with Octal D-Type Latches Scan-Test Devices with Octal D-Type Edge-Triggered Flip-Flops Scan-Test Devices with Octal Registered Transceivers
Boundary Scan (JTAG) Support Devices
DESCRIPTION Embedded Test-Bus Controllers with 8-Bit Generic Host Interfaces Test-Bus Controllers IEEE 1149.1 (JTAG) Masters with 16-Bit Generic Host Interfaces 10-Bit Addressable Scan Ports Multidrop-Addressable IEEE 1149.1 (JTAG) Transceivers Scan-Path Linkers with 4-Bit Identification Buses Scan-Controlled IEEE 1149.1 (JTAG) Concatenators
OUTPUT
TYPE 8980 8990 8996 8997
TECHNOLOGY
BUFFERS DRIVERS
Inverting Buffers Drivers
DESCRIPTION Single OUTPUT Buffers/Converters Drivers Schmitt Triggers Strobed Inverters/Buffers TYPE 1G06 1G240 1005 4009 4049 1004 40106 4502 Octal 11240 1244 Octal with Input Pullup Resistors Octal Buffers Line/MOS Drivers with Series Damping Resistors 11-Bit Line/Memory Drivers 12-Bit Line/Memory Drivers TECHNOLOGY
AHCT ALVC ALVT 64BCT CD4K GTLP
FUNCTIONAL INDEX
2240
29828 5401 5403
BUFFERS DRIVERS
Inverting Buffers Drivers (continued)
DESCRIPTION with Series Damping Resistors GTLP-to-LVTTL 1-to-6 Fanout Drivers
OUTPUT
TYPE 16240 16540 162240
TECHNOLOGY
AHCT ALVC ALVT 64BCT CD4K GTLP
Noninverting Buffers Drivers
DESCRIPTION
OUTPUT
TYPE 1G07 1G125 1G126 1035 4503 4010 4050 1034
TECHNOLOGY
AHCT ALVC ALVT 64BCT CD4K
Single Buffers
Quad Buffers Buffers Buffers/Converters
Buffers/ Line Drivers Drivers Gate Line Drivers
Noninverting Buffers Drivers (continued)
DESCRIPTION
OUTPUT
TYPE
TECHNOLOGY
AHCT ALVC ALVT 64BCT CD4K
Octal CP/3S Octal with Series Damping Resistors Octal Buffers Octal Buffers Line/MOS Drivers with Series Damping Resistors Octal Line Drivers/ Drivers with Series Damping Resistors 11-Bit Line/Memory Drivers 12-Bit Line/Memory Drivers
1244 11244 2244
25244
2241
2541 29827 2827
5400 5402 16241
with Series Damping Resistors with Balanced Drive Series Damping Resistors
16244 16541
FUNCTIONAL INDEX
162244
163244
16825
BUFFERS DRIVERS
3-10
Noninverting Buffers Drivers (continued)
DESCRIPTION with Series Damping Resistors with Series Damping Resistors with Balanced Drive Series Damping Resistors 1-Bit 2-Bit Address Drivers 1-Bit 4-Bit Address Drivers 1-to-4 Address Registers/Drivers 4-Segment Liquid Crystal Display Drivers
OUTPUT
TYPE
TECHNOLOGY
AHCT ALVC ALVT 64BCT CD4K
162825 16827 162827
162827 163837 162830 16344 162344 16831 16832 32244 4054
SWITCHES
Exchange/Multiplexing Switches
DESCRIPTION 1-of-8 Multiplexers/Demultiplexers Dual 1-of-4 Multiplexers/Demultiplexers 4-Bit 1-of-2 Multiplexers/Demultiplexers 10-Bit Bus-Exchange Switches 12-Bit 1-of-2 Multiplexers/Demultiplexers with Internal Pulldown Resistors 12-Bit 1-of-3 Multiplexers/Demultiplexers Synchronous 16-Bit 1-of-2 Multiplexers/Demultiplexers 16-Bit 1-of-2 Multiplexers/Demultiplexers 16-Bit 32-Bit Multiplexer/Demultiplexer Switches 18-Bit Bus-Exchange Switches 24-Bit Bus-Exchange Switches 24-Bit Bus-Exchange Switches with Schottky Diode Clamping
TYPE 3251 3253 3257 3383 16292 162292 16214 16232 16233 16390 16209 16212 16213 16212 16213
TECHNOLOGY CBTLV
Standard Switches
DESCRIPTION
TYPE 1G66
TECHNOLOGY CBTLV CD4K
Single Switches Single Switches with Level Shifting Dual Switches Dual Switches with Level Shifting Dual Switches with Schottky Diode Clamping Quad Bilateral Switches Quad Switches 3-11
1G125 1G384
FUNCTIONAL INDEX
1G125 3306 3306 3306 4016 4066 3125 3126
SWITCHES
3-12
Standard Switches (continued)
DESCRIPTION 4-Bit Analog Switches with Level Translation Octal Switches
TYPE 4316 3244 3245 3345 3384 3861 3857 3861 6800 6800 3384 16244 16245 16245 16210 16861 16861 16210 16861 16800 19861 16211 16211 16211 16211 32245
TECHNOLOGY CBTLV CD4K
10-Bit Switches 10-Bit Switches with Internal Pulldown Resistors 10-Bit Switches with Level Shifting 10-Bit Switches with Precharged Outputs Diode Clamping 10-Bit Switches with Precharged Outputs Live Insertion 10-Bit Switches with Schottky Diode Clamping 16-Bit Switches 16-Bit Switches with Active Clamp Undershoot Protection 20-Bit Switches 20-Bit Switches with Active Clamp Undershoot Protection 20-Bit Switches with Level Shifting 20-Bit Switches with Precharged Outputs 20-Bit Switches with Series Damping Resistors 24-Bit Switches 24-Bit Switches with Hold 24-Bit Switches with Level Shifting 24-Bit Switches with Schottky Diode Clamping 32-Bit Switches with Active Clamp Undershoot Protection
COUNTERS
Binary Counters
DESCRIPTION Divide Ripple Dual Dual Presettable Up/Down Presettable Up/Down with Dual Clock Reset Presettable Synchronous Up/Down Programmable with Asynchronous Clear Synchronous Synchronous Up/Down Synchronous with Preset Asynchronous Clear Synchronous with Preset Synchronous Clear 8-Bit Counters/Dividers with 1-of-8 Decoded Outputs with 3-State Output Registers with Input Registers with Input Registers Parallel Counter Outputs Synchronous Up/Down Presettable Synchronous Down 7-Stage Ripple-Carry Counters/Dividers 12-Stage Ripple-Carry Counters/Dividers 14-Stage Ripple-Carry Counters/Dividers with Oscillators Stage Divide Programmable Divide Presettable Up/Down Decade 3-13 TYPE 4520 4516 40193 40161 4022 40103 4024 4040 4020 4060 4045 4018 4059 4029 TECHNOLOGY CD4K
FUNCTIONAL INDEX
COUNTERS
Decade Counters
DESCRIPTION Divide Divide Dual Divide Divide Synchronous Presettable Up/Down Counters/Dividers with 1-of-10 Decoded Outputs Counters/Drivers with Decoded 7-Segment Display Outputs BCD-to-Decimal Decoders Presettable Up/Down Dual Programmable Divide Decade Synchronous Presettable Down Up-Down Counters/Latches/7-Segment Display Drivers Presettable BCD-Type Up/Down with Dual Clock Reset TYPE 4017 4026 4033 4028 4510 4518 4522 40102 40110 40192 TECHNOLOGY CD4K
3-14
DECODERS, ENCODERS, MULTIPLEXERS
Decoders
DESCRIPTION
OUTPUT
TYPE
TECHNOLOGY AHCT CD4K
Dual Line Decoders/Demultiplexers 2-to-4
11139 2414 4555 4556
Dual 2-Line 4-Line Memory Decoders with On-Chip Supply-Voltage Monitors Dual Binary 1-of-4 Decoders/Demultiplexers 3-to-8 Line Decoders/Demultiplexers 3-to-8 Line Inverting Decoders/Demultiplexers 3-to-8 Line Decoders/Demultiplexers with Address Latches Line Decimal 4-Bit Latch/4 Line 4-to-16 Line Decoders/Demultiplexers BCD-to-Decimal Decoders/Drivers 7-Segment Decoders/Drivers 7-Segment Latches/Decoders/Drivers 7-Segment Decoders/Drivers with Display-Frequency Outputs 7-Segment Decoders/Drivers with Strobed Latch Function 7-Segment Latches/Decoders/Drivers LCDs
11138 4514 4515
4511
FUNCTIONAL INDEX
4055 4056 4543
3-15
DECODERS, ENCODERS, MULTIPLEXERS
3-16
Multiplexers
DESCRIPTION 1-of-8 Analog Multiplexers/Demultiplexers 1-of-8 Analog Multiplexers/Demultiplexers with Logic Level Conversion 1-of-8 Analog Multiplexers/Demultiplexers with Latches 1-of-8 Data Selectors 1-of-8 Data Selectors/Multiplexers 1-of-8 Data 1-of-8 Differential Analog Multiplexers/Demultiplexers 1-of-16 Analog Multiplexers/Demultiplexers 1-of-16 Data Selectors/Multiplexers 1-of-16 Data Generators/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Dual 1-of-4 Analog Multiplexers/Demultiplexers Dual 1-of-4 Analog Multiplexers/Demultiplexers with Logic Level Conversion Dual 1-of-4 Analog Multiplexers/Demultiplexers with Latches Triple 1-of-2 Analog Multiplexers/Demultiplexers Triple 1-of-2 Analog Multiplexers/Demultiplexers with Logic Level Conversion
OUTPUT
TYPE 4051 4051 4351
TECHNOLOGY AHCT CD4K
4512 4097 4067
4052 4052 4352 4053 4053
Quad 1-of-2 Data Selectors/Multiplexers CP/3S Quad 1-of-2 Data Selectors/Multiplexers with Series Damping Resistors Quad 2-to-1 Data Selectors/Multiplexers
11257 2257
40257
Multiplexers (continued)
DESCRIPTION Quad 2-to-1 Data Selectors/Multiplexers with Storage Quad 2-to-4 Data Selectors/Multiplexers 2-to-1 Universal Multiplexers 4-to-1 Multiplexers/Demultiplexers Nonvolatile 5-Bit Registers with Interface
OUTPUT
TYPE
TECHNOLOGY AHCT CD4K
16460 8550
Priority Encoders
DESCRIPTION
OUTPUT
TYPE
TECHNOLOGY CD4K
Line Line Line
4532 40147
FUNCTIONAL INDEX
3-17
FIFOs (FIRST FIRST MEMORIES)
3-18
Asynchronous FIFO Memories
DESCRIPTION
OUTPUT
TYPE 40105 7814 7814 7806 7806 7804 7804 7820 2235 7802 7808
TECHNOLOGY ALVC CD4K
Bidirectional 1024 Bidirectional 1024 2048
Synchronous FIFO Memories
DESCRIPTION Independent Bidirectional Independent Bidirectional Bidirectional Bidirectional 1024 1024 1024 2048 2048 2048 2048 OUTPUT TYPE 2226 2227 7813 7813 3611 3613 3612 3614 2228 2229 7805 7805 3622 7803 7803 7819 3631 3631 3632 3638 7811 7881 3641 3641 TECHNOLOGY ALVC
FUNCTIONAL INDEX
7807 7882 3651 3651
3-19
FLIP FLOPS
3-20
Type Flip Flops state)
DESCRIPTION Dual Edge Triggered Quad Octal Interface
OUTPUT 3S/CP
TYPE 29825 11374
TECHNOLOGY
AHCT ALVC ALVT
Octal Edge Triggered
Octal Edge Triggered Dual Rank Octal Edge Triggered with Series Damping Resistors Octal Inverting
4374 2374
2574 29823 29821 16820 162820 16374 162374 163374 16823 162823
Interface
Interface with Dual Outputs
Edge Triggered
Type Flip Flops state) (continued)
DESCRIPTION
OUTPUT
TYPE 16721
TECHNOLOGY
AHCT ALVC ALVT
162721 16722 16821 32374
Edge Triggered
Type Flip Flops (non state)
DESCRIPTION Single Edge Triggered
OUTPUT
TYPE 1G79 1G80 4013
TECHNOLOGY
AHCT ALVC ALVT CD4K
Dual Quad
11074 11175 40175 40174
with Enable Octal Octal with Enable
Other Flip Flops
FUNCTIONAL INDEX
DESCRIPTION Dual Edge-Triggered Master-Slave Dual Edge-Triggered with Reset Dual Edge-Triggered with Reset Dual Positive-Edge-Triggered with Reset Quad Edge-Triggered 3-21
TYPE 4027
TECHNOLOGY CD4K
GATES INVERTERS
Gates
DESCRIPTION Single Input OUTPUT TYPE 1G08 Quad Input 11008 4081 Quad 2-Input Buffers/Drivers Quad Input with Schmitt-Trigger Inputs Dual Input 1008 7001 4082 Triple Input 11011 4073 TECHNOLOGY AHCT ALVC CD4K
3-22
NAND Gates
DESCRIPTION Single Input Dual 2-Input Buffers/Drivers Quad Input Quad 2-Input Buffers/Drivers Quad Input Unbuffered Quad Input with Schmitt-Trigger Inputs 2-Input Drivers Triple Input Dual Input Dual 4-Input Positive Line Drivers Input Input AND/NAND Input OUTPUT TYPE 1G00 40107 11000 4011 1000 4011 4093 1804 4023 4012 11030 4068 TECHNOLOGY AHCT ALVC CD4K
FUNCTIONAL INDEX
3-23
GATES INVERTERS
Invert Gates
DESCRIPTION Dual Wide Input Dual Wide Input, Wide Input Expandable Wide Input Expandable Input TYPE 4085 4086 4048 TECHNOLOGY CD4K
3-24
Gates
DESCRIPTION Single Input Quad Input Quad 2-Input Buffers/Drivers Quad Input with Schmitt-Trigger Inputs 2-Input Drivers Dual Input Triple Input OUTPUT TYPE 1G32 11032 4071 1032 7032 4072 4075 TECHNOLOGY AHCT ALVC CD4K
Gates
DESCRIPTION Single Input Quad Input Quad Input with Schmitt-Trigger Inputs Quad Input Unbuffered 2-Input Drivers Triple Input Dual Input Dual Input with Strobe Dual Input Input NOR/OR OUTPUT TYPE 1G02 4001 7002 4001 4025 4002 4078 TECHNOLOGY AHCT CD4K
Exclusive Gates
DESCRIPTION Single Input OUTPUT TYPE 1G86 4030 4070 Quad Input 11086 TECHNOLOGY AHCT CD4K
FUNCTIONAL INDEX
Exclusive Gates
DESCRIPTION OUTPUT Quad Input 3-25 TYPE 4077 7266 TECHNOLOGY CD4K
GATES INVERTERS
Gate Delay Elements
DESCRIPTION Dual Unbuffered Complementary Pairs Plus Inverters Quad AND/OR Select Gates Quad True/Complement Buffers Quad Complementary-Output Elements Delay Elements Generating Delay Lines Gates Inverters, 2-Input NOR, 2-Input NAND) TYPE 4007 4019 4041 4572 TECHNOLOGY CD4K
3-26
Inverters
DESCRIPTION Single Unbuffered Single Single Schmitt Trigger Unbuffered Schmitt Trigger OUTPUT TYPE 1G04 1GU04 1G14 11004 4069 TECHNOLOGY AHCT ALVC CD4K
LATCHES
Type Latches state)
DESCRIPTION Dual Octal Inverting Transparent
TYPE 11373
TECHNOLOGY
AHCT ALVC ALVT
Octal Transparent
2373
Octal Transparent Read Back Octal Transparent with Series Damping Resistors
Transparent Transparent Read Back Transparent Multiplexed Multiplexed with Series Damping Resistors Transparent Transparent Transparent Transparent
29843 29841 16260 162260 16373
FUNCTIONAL INDEX
162373 16843 16841 162841 32373
3-27
LATCHES
Other Latches
DESCRIPTION Dual Bistable Transparent Dual with Strobe Bistable Quad Clocked Quad NAND Quad Quad Addressable D-Type Transparent Read-Back Edge-Triggered Read-Back D-Type Transparent Read-Back OUTPUT TYPE 4508 4042 4044 4043 4099 4724 TECHNOLOGY CD4K
3-28
LITTLE LOGIC
Gates
DESCRIPTION Single Input TYPE 1G08 TECHNOLOGY AHCT
NAND Gates
DESCRIPTION Single Input TYPE 1G00 TECHNOLOGY AHCT
Gates
DESCRIPTION Single Input TYPE 1G32 TECHNOLOGY AHCT
Gates
DESCRIPTION Single Input TYPE 1G02 TECHNOLOGY AHCT
Exclusive Gates
DESCRIPTION Single Input TYPE 1G86 TECHNOLOGY AHCT
Type Flip Flops
DESCRIPTION Single Edge Triggered TYPE 1G79 1G80 TECHNOLOGY
Inverters
DESCRIPTION Single Single Schmitt Trigger TYPE 1G04 1GU04 1G14 TECHNOLOGY AHCT
FUNCTIONAL INDEX
Inverting Buffers Drivers
DESCRIPTION Single 3-29 OUTPUT TYPE 1G06 1G240 TECHNOLOGY
LITTLE LOGIC
3-30
Noninverting Buffers Drivers
DESCRIPTION Single Single Buffers
OUTPUT
TYPE 1G07 1G125 1G126
TECHNOLOGY AHCT
Standard Switches
DESCRIPTION Single Bilaterial (Analog Digital) Single Single with Level Shifting
TYPE 1G66 1G66 1G125 1G384 1G125
TECHNOLOGY
MEMORY DRIVERS TRANSCEIVERS (HSTL, SSTL, SSTV)
Buffers, Drivers, Latches
DESCRIPTION 9-Bit 18-Bit HSTL-to-LVTTL Memory Address Latches 13-Bit 26-Bit Registered Buffers with SSTL_2 Inputs Outputs 14-Bit Registered Buffers with SSTL_2 Inputs Outputs 14-Bit 28-Bit HSTL-to-LVTTL Memory Address Latches 20-Bit SSTL_3 Interface Buffers 20-Bit SSTL_3 Interface Universal Drivers
OUTPUT
TYPE 16918 16859 16857 162822 16847 16837
TECHNOLOGY HSTL SSTL SSTV
REGISTERS
Registers
DESCRIPTION 1-Bit Address Registers/Drivers 4-Bit OUTPUT TYPE 162831 162832 Bidirectional Universal Shift Cascadable Shift D-Type Stage Parallel-In/Parallel-Out Shift Dual Stage Static Shift 4-by-4 Register Files Dual 16-by-4 Register Files Shift Serial Parallel Shift Parallel Serial Shift with Gated Clock Parallel Serial Serial Shift Shift with Output Registers Shift with 3-State Output Registers Shift with 3-State Output Latches Shift with Input Latches Shift with Input Latches 3-State Input/Output Ports Universal Shift/Storage Stage Static Shift 8-Stage Shift-and-Store 8-Stage Static Bidirectional Parallel-/Serial-Input/Output Serial In/Out with 16-Bit Parallel-Out Storage Stage Static Shift 3-31 40194 4076 4035 4015 4014 4021 4094 4034 4031 TECHNOLOGY AHCT ALVC CD4K
FUNCTIONAL INDEX
REGISTERS
3-32
Registers (continued)
DESCRIPTION Dual Stage Static Shift
OUTPUT
TYPE 4517
TECHNOLOGY AHCT ALVC CD4K
SPECIALTY LOGIC
Adders
DESCRIPTION Binary Full with Fast Carry
TYPE
TECHNOLOGY
Arithmetic Logic Units
DESCRIPTION Arithmetic Logic Units/Function Generators Look-Ahead Carry Generators
TYPE
TECHNOLOGY
Termination Arrays Networks
DESCRIPTION Dual 4-Bit Programmable Terminators 8-Bit Schottky Barrier Diode Bus-Termination Arrays 10-Bit Bus-Termination Networks with Hold 12-Bit Schottky Barrier Diode Bus-Termination Arrays 16-Bit Bus-Termination Networks with Hold 16-Bit Schottky Barrier Diode Bus-Termination Arrays 16-Bit Schottky Barrier Diode Bus-Termination Arrays
TYPE 40117 1056 1071 1050 1051 1073 1052 1053 1016
TECHNOLOGY CD4K
Comparators (identity)
DESCRIPTION Identity Identity with Input Pullup Resistors Identity with Input Pullup Resistors Address
OUTPUT
TYPE
TECHNOLOGY
Comparators (magnitude)
DESCRIPTION
TYPE
TECHNOLOGY CD4K
4063 4585
Digital Phase Locked Loops (PLLs)
DESCRIPTION Digital PLLs PLLs with PLLs with Lock Detectors
TYPE 4046 7046
TECHNOLOGY CD4K
FUNCTIONAL INDEX
Drivers/Multipliers
DESCRIPTION 4-Bit Binary Rate Multipliers Rate Multipliers Synchronous 6-Bit Binary Rate Multipliers
TYPE 4089 4527
TECHNOLOGY CD4K
3-33
3-34
ECL/TTL Functions
SPECIALTY LOGIC
DESCRIPTION Octal ECL-to-TTL Translators Octal ECL-to-TTL Translators with Edge-Triggered D-Type Flip-Flops Octal TTL-to-ECL Translators with Edge-Triggered D-Type Flip-Flops Output Enable Octal TTL-to-ECL Translators with Output Enable
OUTPUT
TYPE 10KHT5541 10KHT5574 10KHT5578 10KHT5542 10KHT5543
TECHNOLOGY
Frequency Dividers/Timers
DESCRIPTION 24-Stage Frequency Dividers Programmable Frequency Dividers/Digital Timers Programmable Timers
TYPE 4521 4536 4541
TECHNOLOGY CD4K
Monostable Multivibrators
DESCRIPTION Power Monostable/Astable Monostable Multivibrators with Schmitt-Trigger Inputs Retriggerable Dual Dual with Schmitt-Trigger Inputs Dual Precision Dual Retriggerable with Reset Dual Retriggerable Precision
TYPE 4047 4098 14538 4538
TECHNOLOGY AHCT CD4K
Oscillators
DESCRIPTION Single Crystal Controlled Single Voltage Controlled Dual Voltage Controlled TYPE TECHNOLOGY
Parity Generators Checkers
DESCRIPTION Dual Odd/Even with Bus-Driver Parity Input/Output Port OUTPUT TYPE 11286 TECHNOLOGY
Translation Voltage Clamps
DESCRIPTION TYPE 3010 16222 TECHNOLOGY
Voltage Level Shifters
DESCRIPTION Quad High TTL-to-CMOS CMOS-to-CMOS Operation TYPE 40109 4504 TECHNOLOGY CD4K
FUNCTIONAL INDEX
3-35
TRANSCEIVERS
Parity Transceivers
DESCRIPTION Octal with Parity Generators/Checkers OUTPUT TYPE 29833 29854 Dual with Parity Generators/Checkers 16833 16853 16657 TECHNOLOGY
3-36
Registered Transceivers
DESCRIPTION OUTPUT TYPE 11543 Octal 11652 OD/3S OC/3S 2543 Octal with Series Damping Resistors 2646 2652 2952 TECHNOLOGY ALVC ALVT
Registered Transceivers (continued)
DESCRIPTION
OUTPUT
TYPE 16470 16543 162543 163543 16646 162646 163646 16651 16652 162652 163652 16952 162952 163952 16524
ALVC
ALVT
Multiplexed/Demultiplexed
16525 162525 32543 162460
Standard Transceivers
DESCRIPTION LVTTL GTLP Adjustable Edge Rate with Selectable Parity Quad Quad Tridirectional Interface IEEE 1284 LVTTL GTLP
OUTPUT
TYPE
TECHNOLOGY
ABTE AHCT ALVC ALVT 64BCT GTLP
1394 1284
FUNCTIONAL INDEX
3-37
TRANSCEIVERS
3-38
Standard Transceivers (continued)
DESCRIPTION
OUTPUT
TYPE
TECHNOLOGY
ABTE AHCT ALVC ALVT 64BCT GTLP
1245 11245
Octal
1640 1645 2245
Octal with Series Damping Resistors Octal Transceivers Line/MOS Drivers with B-Port Series Damping Resistors Octal with Adjustable Output Voltage Octal Dual Supply with Configurable Output Voltage Octal with 3.3-V Shifters
2245
3245
4245
4245
Incident Wave Switching
3S/OC
29863 29864 16246
Standard Transceivers (continued)
DESCRIPTION
OUTPUT
TYPE 16245
TECHNOLOGY
ABTE AHCT ALVC ALVT 64BCT GTLP
LVTTL GTLP Adjustable Edge Rate with Input/Output Series Damping Resistors Incident Wave Switching with Series Damping Resistors Level Shifting LVTTL GTLP Interface LVTTL GTL/GTL+ Interface IEEE 1284 Octal LVTTL GTLP LVTTL GTLP Adjustable Edge Rate
16623 16640
1645
16245
16245 16245
162245 163245
164245 16945 16863 16622 16923 161284
16861 25245 25642 32245 32945 3245
FUNCTIONAL INDEX
3-39
UNIVERSAL FUNCTIONS
Universal Transceivers
DESCRIPTION LVTTL GTL/GTL+ with Live Insertion LVTTL GTLP Adjustable Edge Rate LVTTL GTLP Adjustable Edge Rate LVTTL GTL/GTL+ LVTTL GTLP with Buffered Clock OUTPUT TYPE 1655 1655 1616 16616 16916 16500 162500 163500 16501 162501 163501 16600 16601 162601 with Parity Generators/Checkers LVTTL GTL/GTL+ LVTTL GTLP LVTTL GTLP Adjustable Edge Rate 16901 16612 16612 16912 1612 32501 TECHNOLOGY ALVC ALVT GTLP
3-40
Universal Drivers
DESCRIPTION with Parity Checker Dual 3-State Outputs OUTPUT TYPE 16903 16334 162334 16834 162834 16835 162835 16836 162836 TECHNOLOGY ALVC ALVT GTLP
Universal Exchangers
DESCRIPTION Port Multiplexed Registered with Byte Masks Tri-Port Registered Tri-Port OUTPUT TYPE 16409 162409 16271 16269 16270 162268 162280 32316 16282 162282 32318 TECHNOLOGY ALVC ALVT GTLP
FUNCTIONAL INDEX
3-41
3-42
LOGIC OVERVIEW
FOCUS CBTLV PRODUCTS
FUNCTIONAL INDEX
FUNCTIONAL CROSS-REFERENCE
DEVICE SELECTION GUIDE
PACKAGING SYMBOLIZATION INFORMATION
LOGIC PURCHASING TOOL/ALTERNATE SOURCES
FUNCTIONAL CROSS REFERENCE
Product available technology indicated
Product available reduced-noise advanced CMOS (11000 series) CMOS
CBTLV AHCT ALVC CD4K
product planned technology indicated OTHER
ABTE GTLP HSTL JTAG SSTV SSTL FIFO
BiCMOS
ALVT 64BCT
BIPOLAR
1G00 1G02 1G04 1GU04 1G06 1G07 1G08 1G14 1G32 1G66 1G79 1G80 1G86 1G125 1G126 1G240 1G384
DEVICE
FUNCTIONAL CROSS REFERENCE
ALVT 64BCT
AHCT ALVC CBTLV CD4K ABTE FIFO GTLP HSTL JTAG SSTL SSTV
DEVICE BiCMOS BIPOLAR CMOS OTHER
BiCMOS
64BCT ALVT
BIPOLAR
AHCT ALVC
CMOS
CBTLV CD4K ABTE FIFO
OTHER
GTLP HSTL JTAG SSTV SSTL
DEVICE
FUNCTIONAL CROSS REFERENCE
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
SSTV
SSTL
FIFO
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
64BCT ALVT
BIPOLAR
AHCT ALVC
CMOS
CBTLV CD4K ABTE FIFO
OTHER
GTLP HSTL JTAG SSTV SSTL
DEVICE
FUNCTIONAL CROSS REFERENCE
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
SSTV
SSTL
FIFO
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
64BCT ALVT
BIPOLAR
AHCT ALVC
CMOS
CBTLV CD4K ABTE FIFO
OTHER
GTLP HSTL JTAG SSTV SSTL
DEVICE
FUNCTIONAL CROSS REFERENCE
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
SSTV
SSTL
FIFO
4-10
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
64BCT ALVT
BIPOLAR
AHCT ALVC
CMOS
CBTLV CD4K ABTE FIFO
OTHER
GTLP HSTL JTAG SSTV SSTL
DEVICE 1000 1004 1005 1008 1016 1032 1034 1035 1050 1051 1052 1053 1056 1071 1073
4-11
FUNCTIONAL CROSS REFERENCE
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
1244 1245 1284 1394 1612 1616 1640 1645 1650 1651 1653 1655 1804 2031 2032 2033 2040 2041 2226 2227 2228 2229 2235 2240 2241 2244 2245 2257 2373 2374 2414
SSTV
SSTL
FIFO
4-12
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
64BCT ALVT
BIPOLAR
AHCT ALVC
CMOS
CBTLV CD4K ABTE FIFO
OTHER
GTLP HSTL JTAG SSTV SSTL
DEVICE 2541 2543 2573 2574 2646 2652 2827 2952 3010 3125 3126 3244 3245 3251 3253 3257 3306 3345 3383 3384 3611 3612 3613 3614 3622 3631 3632 3638 3641 3651 3857
4-13
FUNCTIONAL CROSS REFERENCE
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
3861 4001 4002 4007 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4033 4034 4035 4040
SSTV
SSTL
FIFO
4-14
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
64BCT ALVT
BIPOLAR
AHCT ALVC
CMOS
CBTLV CD4K ABTE FIFO
OTHER
GTLP HSTL JTAG SSTV SSTL
DEVICE 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4053 4054 4055 4056 4059 4060 4063 4066 4067 4068 4069 4070 4071 4072 4073 4075 4076 4077 4078
4-15
FUNCTIONAL CROSS REFERENCE
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
4081 4082 4085 4086 4089 4093 4094 4097 4098 4099 4245 4316 4351 4352 4374 4502 4503 4504 4508 4510 4511 4512 4514 4515 4516 4517 4518 4520 4521 4522 4527
SSTV
SSTL
FIFO
4-16
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
64BCT ALVT
BIPOLAR
AHCT ALVC
CMOS
CBTLV CD4K ABTE FIFO
OTHER
GTLP HSTL JTAG SSTV SSTL
DEVICE 4532 4536 4538 4541 4543 4555 4556 4572 4585 4724 5400 5401 5402 5403 6800 7001 7002 7032 7046 7266 7802 7803 7804 7805 7806 7807 7808 7811 7813 7814 7819
4-17
FUNCTIONAL CROSS REFERENCE
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
7820 7881 7882 8240 8244 8245 8373 8374 8543 8550 8646 8652 8952 8980 8990 8996 8997 11000 11004 11008 11011 11030 11032 11074 11086 11138 11139 11175 11240 11244 11245
SSTV
SSTL
FIFO
4-18
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
64BCT ALVT
BIPOLAR
AHCT ALVC
CMOS
CBTLV CD4K ABTE FIFO
OTHER
GTLP HSTL JTAG SSTV SSTL
DEVICE 11257 11286 11373 11374 11543 11652 14538 16209 16210 16211 16212 16213 16214 16222 16232 16233 16240 16241 16244 16245 16246 16260 16269 16270 16271 16282 16292 16334 16344 16373 16374
4-19
FUNCTIONAL CROSS REFERENCE
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
16390 16409 16460 16470 16500 16501 16524 16525 16540 16541 16543 16600 16601 16612 16616 16622 16623 16640 16646 16651 16652 16657 16721 16722 16800 16820 16821 16823 16825 16827 16831
SSTV
SSTL
FIFO
4-20
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
64BCT ALVT
BIPOLAR
AHCT ALVC
CMOS
CBTLV CD4K ABTE FIFO
OTHER
GTLP HSTL JTAG SSTV SSTL
DEVICE 16832 16833 16834 16835 16836 16837 16841 16843 16847 16853 16857 16859 16861 16863 16901 16903 16912 16916 16918 16923 16945 16952 18245 18502 18504 18512 18514 18640 18646 18652 25244
4-21
FUNCTIONAL CROSS REFERENCE
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
25245 25642 29821 29823 29825 29827 29828 29833 29841 29843 29854 29863 29864 32244 32245 32316 32318 32373 32374 32501 32543 32945 40102 40103 40105 40106 40107 40109 40110 40117 40147
SSTV
SSTL
FIFO
4-22
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
64BCT ALVT
BIPOLAR
AHCT ALVC
CMOS
CBTLV CD4K ABTE FIFO
OTHER
GTLP HSTL JTAG SSTV SSTL
DEVICE 40161 40174 40175 40192 40193 40194 40257 161284 162240 162241 162244 162245 162260 162268 162280 162282 162292 162334 162344 162373 162374 162409 162460 162500 162501 162525 162541 162543 162601 162646 162652
4-23
FUNCTIONAL CROSS REFERENCE
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
162721 162820 162822 162823 162825 162827 162830 162831 162832 162834 162835 162836 162841 162952 163244 163245 163373 163374 163500 163501 163543 163646 163652 163827 163952 164245 182502 182504 182512 182646 182652
SSTV
SSTL
FIFO
4-24
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
LOGIC OVERVIEW
FOCUS CBTLV PRODUCTS
FUNCTIONAL INDEX
FUNCTIONAL CROSS REFERENCE
DEVICE SELECTION GUIDE
PACKAGING SYMBOLIZATION INFORMATION
LOGIC PURCHASING TOOLS/ALTERNATE SOURCES
DEVICE SELECTION GUIDE
SECTION DEVICE SELECTION GUIDE
CONTENTS
Advanced BiCMOS Technology Logic ABTE/ETL Advanced BiCMOS Technology/Enhanced Transceiver Logic 5-11 AC/ACT Advanced CMOS Logic 5-13 AHC/AHCT Advanced High-Speed CMOS Logic 5-21 Advanced Low-Voltage BiCMOS Logic 5-27 Advanced Low-Power Schottky Logic 5-29 ALVC Advanced Low-Voltage CMOS Technology Logic 5-35 ALVT Advanced Low-Voltage BiCMOS Technology Logic 5-39 Advanced Schottky Logic 5-41 Advanced Very-Low-Voltage CMOS Logic 5-45 BiCMOS Technology Logic 5-47 64BCT 64-Series BiCMOS Technology Logic 5-47 Bus-Termination Arrays 5-51 Crossbar Technology Logic 5-53 CBTLV Low-Voltage Crossbar Technology Logic 5-57 CD4000 CMOS B-Series Integrated Circuits 5-59 Fast Logic 5-63 FB+/BTL FutureBus+/Backplane Transceiver Logic 5-67 Fast CMOS Logic 5-69 FIFO First-In, First-Out Memories 5-77 Gunning Transceiver Logic 5-81 GTLP Gunning Transceiver Logic Plus 5-83 HC/HCT High-Speed CMOS Logic 5-87 IEEE 1149.1 (JTAG) Boundary-Scan Logic 5-97 Little Logic 5-101 Low-Power Schottky Logic 5-105 Low-Voltage CMOS Technology Logic 5-111 Low-Voltage CMOS Technology Logic 5-115 Low-Voltage BiCMOS Technology Logic 5-119 Inter-Integrated Circuit Applications 5-123 Schottky Logic 5-125 SSTL/SSTV Stub Series-Terminated Logic 5-129 HSTL High-Speed Transceiver Logic 5-129 Transistor-Transistor Logic 5-131 Translation Voltage Clamp Logic 5-135
DEVICE SELECTION GUIDE
Advanced BiCMOS Technology Logic
family, TI's second-generation family BiCMOS bus-interface products, manufactured using 0.8-µ BiCMOS process. provides high drive propagation delays 5-ns range, while maintaining very power consumption. products well suited live-insertion applications with Ioff specification family offers series-damping-resistor options where reduced transmission-line effects required. Special parts that provide high-current drive (180 with transmission lines also offered. Advanced functions, such universal transceivers (UBT emulate wide variety bus-interface functions. Multiplexing options memory interleaving upsizing downsizing also provided. devices purchased octal, WidebusTM, Widebus+TM. Widebus Widebus+ packages feature higher performance with reduced noise flow-through pinout easier board layout. Widebus+ devices offer input bus-hold circuitry eliminate need external pullup resistors floating inputs. www.ti.com/sc/logic most current data sheets.
DEVICE SELECTION GUIDE
DEVICE SN74ABT125 SN74ABT126 SN74ABT240A SN74ABT241 SN74ABT241A SN54ABT244 SN74ABT244A SN74ABT245A SN74ABT245B SN74ABTH245 SN74ABT273 SN74ABT373 SN54ABT374 SN74ABT374A SN74ABT377 SN74ABT377A SN74ABT533 SN74ABT533A SN74ABT534 SN74ABT534A SN74ABT540 SN54ABT541 SN74ABT541B SN74ABT543 SN74ABT543A SN74ABT573 SN74ABT573A SN54ABT574 SN74ABT574A SN74ABT620 SN74ABT623 PINS DESCRIPTION Quad Buffers with 3-State Outputs Quad Buffers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal D-Type Flip-Flops with Clear Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal D-Type Flip-Flops with Enable Octal D-Type Flip-Flops with Enable Octal Inverting Transparent Latches with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Inverting Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Transceivers with 3-State Outputs AVAILABILITY
PDIP SOIC SSOP TQFP TSSOP TVSOP
LITERATURE REFERENCE SCBS182 SCBS183 SCBS098 SCBS184 SCBS184 SCBS099 SCBS099 SCBS081 SCBS081 SCBS663 SCBS185 SCBS155 SCBS111 SCBS111 SCBS156 SCBS156 SCBS186 SCBS186 SCBS187 SCBS187 SCBS188 SCBS093 SCBS093 SCAS422 SCBS157 SCBS190 SCBS190 SCBS191 SCBS191 SCBS113 SCBS114
commercial package description availability
LFBGA (low-profile fine-pitch ball grid array) pins pins PDIP (plastic dual-in-line package)
pins 14/16/20 pins 24/28 pins
(quad flatpack) pins only) pins (FIFO only) 100/132 pins (FIFO only) TQFP (plastic thin quad flatpack)
PCA, pins pins only) pins pins pins only) pins (FIFO only)
SOIC (small-outline integrated circuit) 8/14/16 pins 16/20/24/28 pins QSOP (quarter-size outline package)
16/20/24 pins
TSSOP (thin shrink small-outline package)
8/14/16/20/24/28 pins 48/56/64 pins
TVSOP (thin very small-outline package)
14/16/20/24/48/56 pins pins
SSOP (shrink small-outline package)
14/16/20/24/28/30/38 pins 16/20/24 28/48/56 pins
PLCC (plastic leaded chip carrier)
20/28/44/68/84 pins
(small-outline transistor) pins pins
schedule
Planned
DEVICE SELECTION GUIDE
DEVICE SN74ABT640 SN74ABT646A SN74ABT651 SN74ABT652A SN74ABT657A SN54ABT821 SN74ABT821A SN74ABT823 SN74ABT827 SN74ABT833 SN74ABT841 SN74ABT841A SN74ABT843 SN74ABT853 SN74ABT861 SN74ABT863 SN74ABT2240A SN74ABT2241 SN74ABT2244A SN74ABT2245 SN74ABTR2245 SN74ABT2827 SN74ABT2952A SN74ABT5400A SN74ABT5401 SN74ABT5402A SN74ABT5403 SN54ABT16240 SN74ABT16240A SN74ABT16241A SN74ABT16244A SN74ABTH16244 SN74ABT16245A SN74ABTH16245 SN74ABTH16260 SN74ABT16373A SN74ABT16374A PINS DESCRIPTION Octal Transceivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transceivers Registers with 3-State Outputs Octal Transceivers Registers with 3-State Outputs Octal Transceivers with Parity Generators/Checkers 3-State Outputs 10-Bit Bus-Interface Flip-Flops with 3-State Outputs 10-Bit Bus-Interface Flip-Flops with 3-State Outputs 9-Bit Bus-Interface Flip-Flops with 3-State Outputs 10-Bit Buffers/Drivers with 3-State Outputs 8-Bit 9-Bit Parity Transceivers 10-Bit Bus-Interface D-Type Latches with 3-State Outputs 10-Bit Bus-Interface D-Type Latches with 3-State Outputs 9-Bit Bus-Interface D-Type Latches with 3-State Outputs 8-Bit 9-Bit Parity Transceivers 10-Bit Transceivers with 3-State Outputs 9-Bit Transceivers with 3-State Outputs Octal Buffers Line/MOS Drivers with Series Damping Resistors 3-State Outputs Octal Buffers Line/MOS Drivers with Series Damping Resistors 3-State Outputs Octal Buffers/Line Drivers with Series Damping Resistors 3-State Outputs Octal Transceivers Line Drivers with Series Damping Resistors 3-State Outputs Octal Transceivers Line Drivers with Series Damping Resistors 3-State Outputs 10-Bit Buffers/Drivers with Series Damping Resistors 3-State Outputs Octal Transceivers Registers with 3-State Outputs 11-Bit Line/Memory Drivers with 3-State Outputs 11-Bit Line/Memory Drivers with 3-State Outputs 12-Bit Line/Memory Drivers with 3-State Outputs 12-Bit Line/Memory Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 12-Bit 24-Bit Multiplexed D-Type Latches with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs AVAILABILITY
PDIP SOIC SSOP TQFP TSSOP TVSOP
LITERATURE REFERENCE SCBS104 SCBS069 SCBS083 SCBS072 SCBS192 SCBS193 SCBS193 SCBS158 SCBS159 SCBS195 SCBS196 SCBS196 SCBS197 SCBS198 SCBS199 SCBS201 SCBS232 SCBS233 SCBS106 SCBS234 SCBS680 SCBS648 SCBS203 SCBS661 SCBS235 SCBS660 SCBS236 Call SCBS095 SCBS096 SCBS073 SCBS677 SCBS300 SCBS662 SCBS204 SCBS160 SCBS205
DEVICE SELECTION GUIDE
DEVICE SN74ABTH16460 SN74ABT16470 SN74ABT16500B SN74ABT16501 SN74ABT16540A SN74ABT16541A SN74ABT16543 SN74ABTH16543 SN74ABT16600 SN74ABT16601 SN74ABT16623 SN74ABT16640 SN74ABT16646 SN74ABT16652 SN74ABT16657 SN74ABT16821 SN74ABT16823 SN74ABTH16823 SN74ABT16825 SN74ABT16833 SN74ABT16841 SN74ABT16843 SN74ABT16853 SN74ABT16863 SN74ABT16952 SN74ABTH25245 SN74ABTH32245 SN74ABTH32316 SN74ABTH32318 SN74ABTH32501 SN74ABTH32543 SN74ABT162244 SN74ABT162245 SN74ABTH162245 SN74ABTH162260 SN74ABTH162460 SN74ABT162500 SN74ABT162501 SN74ABT162601 PINS DESCRIPTION 4-to-1 Multiplexed/Demultiplexed Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 18-Bit Universal Transceivers with 3-State Outputs 18-Bit Universal Transceivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 18-Bit Universal Transceivers with 3-State Outputs 18-Bit Universal Transceivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 16-Bit Transceivers Registers with 3-State Outputs 16-Bit Transceivers Registers with 3-State Outputs 16-Bit Transceivers with Parity Generators/Checkers 3-State Outputs 20-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit Buffers/Drivers with 3-State Outputs Dual 8-Bit 9-Bit Parity Transceivers 20-Bit Bus-Interface D-Type Latches with 3-State Outputs 18-Bit Bus-Interface D-Type Latches with 3-State Outputs Dual 8-Bit 9-Bit Parity Transceivers 18-Bit Bus-Interface Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs Octal Transceivers with 3-State Outputs 32-Bit Transceivers with 3-State Outputs 16-Bit Tri-Port Universal Exchangers 18-Bit Tri-Port Universal Exchangers 32-Bit Universal Transceivers with 3-State Outputs 32-Bit Registered Transceivers with 3-State Outputs 16-Bit Buffers/Drivers with Series Damping Resistors 3-State Outputs 16-Bit Transceivers with Series Damping Resistors 3-State Outputs 16-Bit Transceivers with Series Damping Resistors 3-State Outputs 12-Bit 24-Bit Multiplexed D-Type Latches with Series Damping Resistors 3-State Outputs 4-to-1 Multiplexed/Demultiplexed Registered Transceivers with 3-State Outputs 18-Bit Universal Transceivers with 3-State Outputs 18-Bit Universal Transceivers with 3-State Outputs 18-Bit Universal Transceivers with 3-State Outputs AVAILABILITY
PDIP SOIC SSOP TQFP TSSOP TVSOP
LITERATURE REFERENCE SCBS207 SCBS085 SCBS057 SCBS086 SCBS208 SCBS118 SCBS087 Call SCBS209 SCBS210 SCBS211 SCBS107 SCBS212 SCBS215 SCBS103 SCBS216 SCBS217 SCBS664 SCBS218 SCBS097 SCBS222 SCBS223 SCBS153 SCBS225 SCBS082 SCBS251 SCBS228 SCBS179 SCBS180 SCBS229 SCBS230 SCBS238 SCBS239 SCBS712 SCBS240 SCBS241 SCBS242 SCBS243 SCBS247
DEVICE SELECTION GUIDE
DEVICE SN74ABT162823A SN74ABT162825 SN74ABT162827A SN74ABT162841 PINS DESCRIPTION 18-Bit Bus-Interface Flip-Flops with 3-State Outputs 18-Bit Buffers/Drivers with Series Damping Resistors 3-State Outputs 20-Bit Buffers/Drivers with Series Damping Resistors 3-State Outputs 20-Bit Bus-Interface D-Type Latches with 3-State Outputs AVAILABILITY
PDIP SOIC SSOP TQFP TSSOP TVSOP
LITERATURE REFERENCE SCBS666 SCBS474 SCBS248 SCBS665
DEVICE SELECTION GUIDE
5-10
DEVICE SELECTION GUIDE
ABTE/ETL
Advanced BiCMOS Technology/ Enhanced Transceiver Logic
ABTE, with wide noise margin logic levels port, backward compatible with existing LVTTL/TTL logic. ABTE devices support ANSI/VITA 1-1994 specification (VME64) with tight tolerances transition times skew. ABTE manufactured using 0.8-µ BiCMOS process provides A-port drive levels incident-wave switching. B-port features include bus-hold circuitry eliminating need external pullup resistors series output resistors dampen signal reflections. Other features include BIAS internal pullup resistors control pins live-insertion protection. VMEbus International Trade Association (VITA) established task group 1997 specify synchronous protocol double data transfer rates Mbytes/s more. specification, 2eSST (double-edge source synchronous transfers), based asynchronous 2eVME protocol. Sustained data rates Gbyte/s, more then times faster than traditional VME64 backplanes with single-edge signaling, possible taking advantage 2eSST's both edges each VMEbus clock 21-slot VME320 star-configuration backplane. conjunction with VITA, designing device support 2eSST protocol. www.ti.com/sc/logic most current data sheets additional information this device.
5-11
DEVICE SELECTION GUIDE
ABTE/ETL
DEVICE SN74ABTE16245 SN74ABTE16246
PINS
DESCRIPTION 16-Bit Incident-Wave-Switching Transceivers with 3-State Outputs 11-Bit Incident-Wave-Switching Transceivers with 3-State Open-Collector Outputs
AVAILABILITY
SSOP TSSOP
LITERATURE REFERENCE SCBS226 SCBS227
commercial package description availability
LFBGA (low-profile fine-pitch ball grid array) pins pins PDIP (plastic dual-in-line package)
pins 14/16/20 pins 24/28 pins
(quad flatpack) pins only) pins (FIFO only) 100/132 pins (FIFO only) TQFP (plastic thin quad flatpack)
PCA, pins pins only) pins pins pins only) pins (FIFO only)
SOIC (small-outline integrated circuit) 8/14/16 pins 16/20/24/28 pins QSOP (quarter-size outline package)
16/20/24 pins
TSSOP (thin shrink small-outline package)
8/14/16/20/24/28 pins 48/56/64 pins
TVSOP (thin very small-outline package)
14/16/20/24/48/56 pins pins
SSOP (shrink small-outline package)
14/16/20/24/28/30/38 pins 16/20/24 28/48/56 pins
PLCC (plastic leaded chip carrier)
20/28/44/68/84 pins
schedule
(small-outline transistor) pins pins
Planned
5-12
DEVICE SELECTION GUIDE
AC/ACT
Advanced CMOS Logic
offers full family advanced CMOS logic with wide range AC/ACT devices low-power medium- high-speed applications. Products acquired from Harris Semiconductor provide many additional functions. Over device types available, including gates, latches, flip-flops, buffers/drivers, counters, multiplexers, transceivers, registered transceivers. AC/ACT family reliable, low-power logic family with 24-mA output current drive (AC/ACT) 12-mA output current drive 3.3-V only). family includes standard end-pin products center-pin ground-configuration products with output-edge control (OECTM) circuitry. circuitry, available only with center-pin products, helps reduce simultaneous switching noise associated with high-speed logic. center-pin products include 16-, 18-, 20-bit bus-interface functions packaged 56-pin shrink small-outline package (SSOP) thin shrink small-outline package (TSSOP). These packages allow designer double functionality same circuit board area reduce circuit board area one-half. family offers CMOS inputs outputs while family offers inputs with CMOS outputs. www.ti.com/sc/logic most current data sheets.
5-13
DEVICE SELECTION GUIDE
DEVICE CD74AC00 SN74AC00 CD74AC02 CD74AC04 SN74AC04 CD74AC05 CD74AC08 SN74AC08 CD74AC10 SN74AC10 SN74AC11 CD74AC14 SN74AC14 CD74AC20 CD74AC32 SN74AC32 CD74AC74 SN74AC74 CD74AC86 SN74AC86 CD74AC109 CD74AC112 CD74AC138 CD74AC139 CD74AC151 CD74AC153 CD74AC157 CD74AC158 CD74AC161 CD74AC163 CD74AC164 CD74AC174 CD74AC175 CD74AC238 CD74AC240 PINS Quad 2-Input NAND Gates Quad 2-Input NAND Gates Quad 2-Input Gates Inverters Inverters Inverters with Open-Drain Outputs Quad 2-Input Gates Quad 2-Input Gates Triple 3-Input NAND Gates Triple 3-Input NAND Gates Triple 3-Input Gates Schmitt-Trigger Inverters Schmitt-Trigger Inverters Dual 4-Input NAND Gates Quad 2-Input Gates Quad 2-Input Gates Dual D-Type Flip-Flops with Reset Dual D-Type Flip-Flops with Reset Quad 2-Input Exclusive-OR Gates Quad 2-Input Exclusive-OR Gates Dual Positive-Edge-Triggered Flip Flops with Reset Dual Negative-Edge-Triggered Flip-Flops with Reset 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers 1-of-8 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters 8-Bit Serial-In, Parallel-Out Shift Registers D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear 3-to-8 Line Decoders/Demultiplexers Octal Buffers/Drivers with 3-State Outputs DESCRIPTION AVAILABILITY
PDIP SOIC SSOP TSSOP
LITERATURE REFERENCE SCHS223 SCAS524 SCHS224 SCHS225 SCAS519 SCHS225 SCHS226 SCAS536 SCHS227 SCAS529 SCAS532 SCHS228 SCAS522 SCHS229 SCHS230 SCAS528 SCHS231 SCAS521 SCHS232 SCAS533 SCHS282 SCHS233 SCHS234 SCHS235 SCHS236 SCHS237 SCHS283 SCHS283 SCHS239 SCHS284 SCHS240 SCHS241 SCHS242 SCHS234 SCHS287
commercial package description availability
LFBGA (low-profile fine-pitch ball grid array) pins pins PDIP (plastic dual-in-line package)
pins 14/16/20 pins 24/28 pins
(quad flatpack) pins only) pins (FIFO only) 100/132 pins (FIFO only) TQFP (plastic thin quad flatpack)
PCA, pins pins only) pins pins pins only) pins (FIFO only)
SOIC (small-outline integrated circuit) 8/14/16 pins 16/20/24/28 pins QSOP (quarter-size outline package)
16/20/24 pins
TSSOP (thin shrink small-outline package)
8/14/16/20/24/28 pins 48/56/64 pins
TVSOP (thin very small-outline package)
14/16/20/24/48/56 pins pins
SSOP (shrink small-outline package)
14/16/20/24/28/30/38 pins 16/20/24 28/48/56 pins
PLCC (plastic leaded chip carrier)
20/28/44/68/84 pins
(small-outline transistor) pins pins
schedule
Planned
Appendix package information CD54/74AC devic
5-14
DEVICE SELECTION GUIDE
DEVICE SN74AC240 CD74AC241 SN74AC241 CD74AC244 SN74AC244 CD74AC245 SN74AC245 CD74AC251 CD74AC253 CD74AC257 CD74AC273 CD74AC280 CD74AC283 CD74AC299 CD74AC323 CD74AC373 SN74AC373 CD74AC374 SN74AC374 SN74AC533 CD74AC534 SN74AC534 CD74AC540 CD74AC541 CD74AC563 SN74AC563 SN74AC564 CD74AC573 SN74AC573 CD74AC574 SN74AC574 CD74AC623 CD74AC646 CD74AC652 74AC11000 74AC11004 74AC11008 74AC11011 74AC11032 74AC11074 74AC11086 74AC11138 74AC11175 74AC11240 PINS DESCRIPTION Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Transceivers with 3-State Outputs 1-of-8 Data Selectors/Multiplexers with 3-State Outputs Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Octal D-Type Flip-Flops with Clear 9-Bit Odd/Even Parity Generators/Checkers 9-Bit Binary Full Adders with Fast Carry 8-Bit Universal Shift/Storage Registers 8-Bit Universal Shift/Storage Registers Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Inverting Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transceivers Registers with 3-State Outputs Quad 2-Input NAND Gates Inverters Quad 2-Input Gates Triple 3-Input Gates Quad 2-Input Gates Dual D-Type Flip-Flops with Reset Quad 2-Input Exclusive-OR Gates 3-to-8 Line Inverting Decoders/Demultiplexers Quad D-Type Flip-Flops with Clear Octal Buffers/Drivers with 3-State Outputs AVAILABILITY
PDIP SOIC SSOP TSSOP
LITERATURE REFERENCE SCAS512 SCHS287 SCAS513 SCHS244 SCAS514 SCHS245 SCAS461 SCHS246 SCHS247 SCHS248 SCHS249 SCHS250 SCHS251 SCHS288 SCHS288 SCHS289 SCAS540 SCHS290 SCAS543 SCAS555 SCHS290 SCAS554 SCHS285 SCHS285 SCHS291 SCAS552 SCAS551 SCHS291 SCAS542 SCHS292 SCAS541 SCHS286 SCHS293 SCHS294 SCLS054 SCHS033 SCAS014 SCHS029 SCAS007 SCAS499 SCAS081 SCAS042 SCAS090 SCAS448
5-15
DEVICE SELECTION GUIDE
DEVICE 74AC11244 74AC11245 74AC11257 74AC16244 74AC16245 74AC16373 74AC16374 74AC16652 PINS DESCRIPTION Octal Buffers Line Drivers with 3-State Outputs Octal Transceivers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Output 16-Bit Transceivers Registers with 3-State Outputs AVAILABILITY
PDIP SOIC SSOP TSSOP
LITERATURE REFERENCE SCAS171 SCAS010 SCAS049 SCAS120 SCAS235 SCAS121 SCAS123 SCAS242
5-16
DEVICE SELECTION GUIDE
DEVICE CD74ACT00 SN74ACT00 CD74ACT02 CD74ACT04 SN74ACT04 CD74ACT05 CD74ACT08 SN74ACT08 CD74ACT10 SN74ACT10 SN74ACT11 CD74ACT14 SN74ACT14 CD74ACT20 CD74ACT32 SN74ACT32 CD74ACT74 SN74ACT74 CD74ACT86 SN74ACT86 CD74ACT109 CD74ACT112 CD74ACT138 CD74ACT139 CD74ACT151 CD74ACT153 CD74ACT157 CD74ACT158 CD74ACT161 CD74ACT163 CD74ACT164 CD74ACT174 CD74ACT175 CD74ACT238 CD74ACT240 PINS Quad 2-Input NAND Gates Quad 2-Input NAND Gates Quad 2-Input Gates Inverters Inverters Inverters with Open-Drain Outputs Quad 2-Input Gates Quad 2-Input Gates Triple 3-Input NAND Gates Triple 3-Input NAND Gates Triple 3-Input Gates Schmitt-Trigger Inverters Schmitt-Trigger Inverters Dual 4-Input NAND Gates Quad 2-Input Gates Quad 2-Input Gates Dual D-Type Flip-Flops with Reset Dual D-Type Flip-Flops with Reset Quad 2-Input Exclusive-OR Gates Quad 2-Input Exclusive-OR Gates Dual Positive-Edge-Triggered Flip Flops with Reset Dual Negative-Edge-Triggered Flip-Flops with Reset 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers 1-of-8 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters 8-Bit Serial-In, Parallel-Out Shift Registers D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear 3-to-8 Line Decoders/Demultiplexers Octal Buffers/Drivers with 3-State Outputs DESCRIPTION AVAILABILITY
PDIP SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SCHS223 SCAS523 SCHS224 SCHS225 SCAS518 SCHS225 SCHS226 SCAS535 SCHS227 SCAS526 SCAS531 SCHS228 SCAS557 SCHS229 SCHS230 SCAS530 SCHS231 SCAS520 SCHS232 SCAS534 SCHS233 SCHS233 SCHS234 SCHS235 SCHS236 SCHS237 SCHS238 SCHS238 SCHS284 SCHS284 SCHS240 SCHS241 SCHS242 SCHS234 SCHS244
commercial package description availability
LFBGA (low-profile fine-pitch ball grid array)
pins pins
PDIP (plastic dual-in-line package)
pins 14/16/20 pins 24/28 pins
(quad flatpack) pins only) pins (FIFO only) 100/132 pins (FIFO only) TQFP (plastic thin quad flatpack)
PCA, pins pins only) pins pins pins only) pins (FIFO only)
SOIC (small-outline integrated circuit) 8/14/16 pins 16/20/24/28 pins QSOP (quarter-size outline package) 16/20/24 pins SSOP (shrink small-outline package)
14/16/20/24/28/30/38 pins 16/20/24 28/48/56 pins
TSSOP (thin shrink small-outline package)
8/14/16/20/24/28 pins 48/56/64 pins
TVSOP (thin very small-outline package)
14/16/20/24/48/56 pins pins
PLCC (plastic leaded chip carrier)
20/28/44/68/84 pins
(small-outline transistor) pins pins
schedule
Planned
Appendix package information CD54/74ACT devices.
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DEVICE SELECTION GUIDE
DEVICE SN74ACT240 CD74ACT241 SN74ACT241 CD74ACT244 SN74ACT244 CD74ACT245 SN74ACT245 CD74ACT253 CD74ACT257 CD74ACT258 CD74ACT273 CD74ACT280 CD74ACT283 CD74ACT297 CD74ACT299 CD74ACT373 SN74ACT373 CD74ACT374 SN74ACT374 SN74ACT533 SN74ACT534 CD74ACT540 CD74ACT541 SN74ACT563 SN74ACT564 CD74ACT573 SN74ACT573 CD74ACT574 SN74ACT574 CD74ACT623 CD74ACT646 CD74ACT651 CD74ACT652 SN74ACT1071 SN74ACT1073 SN74ACT1284 74ACT11000 74ACT11004 74ACT11008 74ACT11030 74ACT11032 74ACT11074 74ACT11139 74ACT11240 PINS DESCRIPTION Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Transceivers with 3-State Outputs Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Octal D-Type Flip-Flops with Clear 9-Bit Odd/Even Parity Generators/Checkers 9-Bit Binary Full Adders with Fast Carry Digital Phase-Locked Loops 8-Bit Universal Shift/Storage Registers Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Inverting Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transceivers Registers with 3-State Outputs Octal Transceivers Registers with 3-State Outputs 10-Bit Termination Networks with Hold 16-Bit Termination Networks with Hold 7-Bit Bus-Interfaces with 3-State Outputs Quad 2-Input NAND Gates Inverters Quad 2-Input Gates 8-Input NAND Gates Quad 2-Input Gates Dual D-Type Flip-Flops with Reset Dual 2-to-4 Line Decoders/Demultiplexers Octal Buffers/Drivers with 3-State Outputs AVAILABILITY
PDIP SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SCAS515 SCHS287 SCAS516 SCHS287 SCAS517 SCHS245 SCAS452 SCHS247 SCHS248 SCHS248 SCHS249 SCHS250 SCHS251 SCHS297 SCHS288 SCHS289 SCAS544 SCHS290 SCAS539 SCAS553 SCAS556 SCHS285 SCHS285 SCAS550 SCAS549 SCHS291 SCAS538 SCHS292 SCAS537 SCHS286 SCHS293 SCHS294 SCHS294 SCAS192 SCAS193 SCAS459 SCAS002 SCAS215 SCAS013 SCLS050 SCAS008 SCAS498 SCAS175 SCAS210
5-18
DEVICE SELECTION GUIDE
DEVICE 74ACT11244 74ACT11245 74ACT11257 74ACT11286 74ACT11373 74ACT11374 74ACT11543 74ACT11652 74ACT16240 74ACT16244 74ACT16245 74ACT16373 74ACT16374 74ACT16541 74ACT16543 74ACT16623 74ACT16646 74ACT16651 74ACT16652 74ACT16657 74ACT16823 74ACT16825 74ACT16827 74ACT16841 74ACT16861 74ACT16863 74ACT16952 PINS DESCRIPTION Octal Buffers Line Drivers with 3-State Outputs Octal Transceivers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs 9-Bit Parity Generators/Checkers with Bus-Driver Parity Port Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transceivers Registers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Output 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 16-Bit Transceivers Registers with 3-State Outputs 16-Bit Transceivers Registers with 3-State Outputs 16-Bit Transceivers Registers with 3-State Outputs 16-Bit Transceivers with Parity Generators/Checkers 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit Buffers/Drivers with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs 20-Bit Interface D-Type Latches with 3-State Outputs 20-Bit Transceivers with 3-State Outputs 18-Bit Interface Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs AVAILABILITY
PDIP SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SCAS006 SCAS031 SCAS053 SCAS069 SCAS015 SCAS217 SCAS136 SCAS087 SCAS137 SCAS116 SCAS097 SCAS122 SCAS124 SCAS208 SCAS126 SCAS152 SCAS127 SCAS449 SCAS128 SCAS164 SCAS160 SCAS155 SCAS163 SCAS174 SCAS197 SCAS162 SCAS159
5-19
DEVICE SELECTION GUIDE
5-20
DEVICE SELECTION GUIDE
AHC/AHCT
Advanced High Speed CMOS Logic
AHC/AHCT logic family provides natural migration path HCMOS users need more speed low-power, low-noise, low-drive applications. logic family consists basic gates, octals, 16-bit Widebusfunctions fabricated using EPIC1-S process, which produces high performance cost. also offers single-gate solutions, designated with device name. Performance characteristics family are:
Speed Typical propagation delays (octals), about three times faster than devices. devices quick quiet solution higher-speed operation. noise family allows designers combine low-noise characteristics HCMOS devices with today's performance levels, without overshoot undershoot problems typical higher-drive devices required speeds. power family CMOS technology exhibits power consumption (40-mA static current, one-half that HCMOS). Drive Output-drive current (AHC/AHCT) 3.3-V (AHC only). family offers CMOS inputs outputs, while AHCT family offers inputs with CMOS outputs. Packaging devices available small-outline integrated circuit (SOIC), shrink small-outline package (SSOP), plastic dual in-line package (PDIP), thin shrink small-outline package (TSSOP), thin very small-outline package (TVSOP), 5-pin small-outline transistor (SOT) package. Selected devices available military versions (SN54AHCXX).
Using products offers several business advantages:
Competitive advantage competitors' devices have equivalent specifications; therefore, devices drop-in replacements offering alternte sources. With TI's production capacity, delivery performance, competitive prices, devices among most economical, easy-to-use, easy-to-get logic products.
www.ti.com/sc/logic most current data sheets.
5-21
DEVICE SELECTION GUIDE
DEVICE SN74AHC1G00 SN74AHC1G02 SN74AHC1G04 SN74AHC1GU04 SN74AHC1G08 SN74AHC1G14 SN74AHC1G32 SN74AHC1G86 SN74AHC1G125 SN74AHC1G126 SN74AHC00 SN74AHC02 SN74AHC04 SN74AHCU04 SN74AHC05 SN74AHC08 SN74AHC14 SN74AHC32 SN74AHC74 SN74AHC86 SN74AHC123A SN74AHC125 SN74AHC126 SN74AHC132 SN74AHC138 SN74AHC139 SN74AHC157 SN74AHC158 SN74AHC240 SN74AHC244 SN74AHC245 SN74AHC273 SN74AHC367 SN74AHC373 SN74AHC374 PINS DESCRIPTION Single 2-Input NAND Gates Single-2-Input Gates Single Inverters Single Inverters Single 2-Input Gates Single Schmitt-Trigger Inverters Single 2-Input Gates Single 2-Input Exclusive-OR Gates Single Buffers with 3-State Outputs Single Buffers with 3-State Outputs Quad 2-Input NAND Gates Quad 2-Input Gates Inverters Unbuffered Inverters Inverters with Open-Drain Outputs Quad 2-Input Gates Schmitt-Trigger Inverters Quad 2-Input Gates Dual D-Type Flip-Flops with Reset Quad 2-Input Exclusive-OR Gates Dual Retriggerable Monostable Multivibrators with Reset Quad Buffers with 3-State Outputs Quad Buffers with 3-State Outputs Quad 2-Input NAND Gates with Schmitt-Trigger Inputs 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Octal Buffers/Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal D-Type Flip-Flops with Clear Buffers/Line Drivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs AVAILABILITY
PDIP SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SCLS313 SCLS342 SCLS318 SCLS343 SCLS314 SCLS321 SCLS317 SCLS323 SCLS377 SCLS379 SCLS227 SCLS254 SCLS231 SCLS234 SCLS357 SCLS236 SCLS238 SCLS247 SCLS255 SCLS249 SCLS352 SCLS256 SCLS257 SCLS365 SCLS258 SCLS259 SCLS345 SCLS346 SCLS251 SCLS226 SCLS230 SCLS376 SCLS424 SCLS235 SCLS240
commercial package description availability
LFBGA (low-profile fine-pitch ball grid array) pins pins PDIP (plastic dual-in-line package)
pins 14/16/20 pins 24/28 pins
(quad flatpack) pins only) pins (FIFO only) 100/132 pins (FIFO only) TQFP (plastic thin quad flatpack)
PCA, pins pins only) pins pins pins only) pins (FIFO only)
SOIC (small-outline integrated circuit) 8/14/16 pins 16/20/24/28 pins QSOP (quarter-size outline package)
16/20/24 pins
TSSOP (thin shrink small-outline package)
8/14/16/20/24/28 pins 48/56/64 pins
TVSOP (thin very small-outline package)
14/16/20/24/48/56 pins pins
SSOP (shrink small-outline package)
14/16/20/24/28/30/38 pins 16/20/24 28/48/56 pins
PLCC (plastic leaded chip carrier)
20/28/44/68/84 pins
(small-outline transistor) pins pins
schedule
Planned
5-22
DEVICE SELECTION GUIDE
DEVICE SN74AHC540 SN74AHC541 SN74AHC573 SN74AHC574 SN74AHC594 SN74AHC595 SN74AHC16240 SN74AHC16244 SN74AHC16373 SN74AHC16374 SN74AHC16540 SN74AHC16541 PINS DESCRIPTION Inverting Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 8-Bit Shift Registers with Output Registers 8-Bit Shift Registers with 3-State Output Registers 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs AVAILABILITY
PDIP SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SCLS260 SCLS261 SCLS242 SCLS244 SCLS423 SCLS373 SCLS326 SCLS327 SCLS329 SCLS330 SCLS331 SCLS332
5-23
DEVICE SELECTION GUIDE AHCT
DEVICE SN74AHCT1G00 SN74AHCT1G02 SN74AHCT1G04 SN74AHCT1G08 SN74AHCT1G14 SN74AHCT1G32 SN74AHCT1G86 SN74AHCT1G125 SN74AHCT1G126 SN74AHCT00 SN74AHCT02 SN74AHCT04 SN74AHCT08 SN74AHCT14 SN74AHCT32 SN74AHCT74 SN74AHCT86 SN74AHCT123A SN74AHCT125 SN74AHCT126 SN74AHCT132 SN74AHCT138 SN74AHCT139 SN74AHCT157 SN74AHCT158 SN74AHCT240 SN74AHCT244 SN74AHCT245 SN74AHCT273 SN74AHCT367 SN74AHCT373 SN74AHCT374 SN74AHCT540 SN74AHCT541 SN74AHCT573 PINS DESCRIPTION Single 2-Input NAND Gates Single-2-Input Gates Single Inverters Single 2-Input Gates Single Schmitt-Trigger Inverters Single 2-Input Gates Single 2-Input Exclusive-OR Gates Single Buffers with 3-State Outputs Single Buffers with 3-State Outputs Quad 2-Input NAND Gates Quad 2-Input Gates Inverters Quad 2-Input Gates Schmitt-Trigger Inverters Quad 2-Input Gates Dual D-Type Flip-Flops with Reset Quad 2-Input Exclusive-OR Gates Dual Retriggerable Monostable Multivibrators with Reset Quad Buffers with 3-State Outputs Quad Buffers with 3-State Outputs Quad 2-Input NAND Gates with Schmitt-Trigger Inputs 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Octal Buffers/Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal D-Type Flip-Flops with Clear Buffers/Line Drivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Inverting Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs AVAILABILITY
PDIP SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SCLS316 SCLS341 SCLS319 SCLS315 SCLS322 SCLS320 SCLS324 SCLS378 SCLS380 SCLS229 SCLS262 SCLS232 SCLS237 SCLS246 SCLS248 SCLS263 SCLS250 SCLS420 SCLS264 SCLS265 SCLS366 SCLS266 SCLS267 SCLS347 SCLS348 SCLS252 SCLS228 SCLS233 SCLS375 SCLS418 SCLS139 SCLS241 SCLS268 SCLS269 SCLS243
commercial package description availability
LFBGA (low-profile fine-pitch ball grid array) pins pins PDIP (plastic dual-in-line package)
pins 14/16/20 pins 24/28 pins
(quad flatpack) pins only) pins (FIFO only) 100/132 pins (FIFO only) TQFP (plastic thin quad flatpack)
PCA, pins pins only) pins pins pins only) pins (FIFO only)
SOIC (small-outline integrated circuit) 8/14/16 pins 16/20/24/28 pins QSOP (quarter-size outline package)
16/20/24 pins
TSSOP (thin shrink small-outline package)
8/14/16/20/24/28 pins 48/56/64 pins
TVSOP (thin very small-outline package)
14/16/20/24/48/56 pins pins
SSOP (shrink small-outline package)
14/16/20/24/28/30/38 pins 16/20/24 28/48/56 pins
PLCC (plastic leaded chip carrier)
20/28/44/68/84 pins
(small-outline transistor) pins pins
schedule
Planned
5-24
DEVICE SELECTION GUIDE AHCT
DEVICE SN74AHCT574 SN74AHCT594 SN74AHCT595 SN74AHCT16240 SN74AHCT16244 SN74AHCT16245 SN74AHCT16373 SN74AHCT16374 SN74AHCT16540 SN74AHCT16541 PINS DESCRIPTION Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 8-Bit Shift Registers with Output Registers 8-Bit Shift Registers with 3-State Output Registers 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs AVAILABILITY
PDIP SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SCLS245 SCLS417 SCLS374 SCLS333 SCLS334 SCLS335 SCLS336 SCLS337 SCLS338 SCLS339
5-25
DEVICE SELECTION GUIDE AHCT
5-26
DEVICE SELECTION GUIDE
Advanced Voltage BiCMOS Logic
specially designed 3.3-V family uses 0.6-µ BiCMOS process technology bus-interface functions. provides 25-mA drive with maximum propagation delays making TI's fastest logic families. inputs have clamping diodes limit overshoot undershoot. family currently available functions with Widebusand Shrink Widebusfootprints, with advanced packaging options such shrink small-outline package (SSOP), thin shrink small-outline package (TSSOP), thin very small-outline package (TVSOP). www.ti.com/sc/logic most current data sheets.
5-27
DEVICE SELECTION GUIDE
DEVICE SN74ALB16244 SN74ALB16245 PINS DESCRIPTION 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs AVAILABILITY
SSOP TSSOP TVSOP
LITERATURE REFERENCE SCBS647 SCBS678
commercial package description availability
LFBGA (low-profile fine-pitch ball grid array) pins pins PDIP (plastic dual-in-line package)
pins 14/16/20 pins 24/28 pins
(quad flatpack) pins only) pins (FIFO only) 100/132 pins (FIFO only) TQFP (plastic thin quad flatpack)
PCA, pins pins only) pins pins pins only) pins (FIFO only)
SOIC (small-outline integrated circuit) 8/14/16 pins 16/20/24/28 pins QSOP (quarter-size outline package)
16/20/24 pins
TSSOP (thin shrink small-outline package)
8/14/16/20/24/28 pins 48/56/64 pins
TVSOP (thin very small-outline package)
14/16/20/24/48/56 pins pins
SSOP (shrink small-outline package)
14/16/20/24/28/30/38 pins 16/20/24 28/48/56 pins
PLCC (plastic leaded chip carrier)
20/28/44/68/84 pins
(small-outline transistor) pins pins
schedule
Planned
5-28
DEVICE SELECTION GUIDE
Advanced Power Schottky Logic
family provides over bipolar logic functions. This family, combined with family, used optimize systems through performance budgeting. using speed-critical paths where speed less critical, designers optimize speed power performance bipolar designs. family includes gates, flip-flops, counters, drivers, transceivers, registered transceivers, readback latches, clock drivers, register files, multiplexers. www.ti.com/sc/logic most current data sheets.
5-29
DEVICE SELECTION GUIDE
DEVICE SN74ALS00A SN74ALS02A SN74ALS03B SN74ALS04B SN74ALS05A SN74ALS08 SN74ALS09 SN74ALS10A SN74ALS11A SN74ALS20A SN74ALS21A SN74ALS27A SN74ALS30A SN74ALS32 SN74ALS33A SN74ALS35A SN74ALS37A SN74ALS38B SN74ALS74A SN74ALS86 SN74ALS109A SN74ALS112A SN74ALS133 SN74ALS137A SN74ALS138A SN74ALS139 SN74ALS151 SN74ALS153 SN74ALS156 SN74ALS157A SN74ALS158 SN74ALS161B SN74ALS163B SN74ALS164A SN74ALS165 PINS Quad 2-Input NAND Gates Quad 2-Input Gates Quad 2-Input NAND Gates with Open-Collector Outputs Inverters Inverters with Open-Collector Outputs Quad 2-Input Gates Quad 2-Input Gates with Open-Collector Outputs Triple 3-Input NAND Gates Triple 3-Input Gates Dual 4-Input NAND Gates Dual 4-Input Gates Triple 3-Input Gates 8-Input NAND Gates Quad 2-Input Gates Quad 2-Input Gates Non-Inverters with Open-Collector Outputs Quad 2-Input NAND Gates Quad 2-Input NAND Gates Dual D-Type Flip-Flops with Reset Quad 2-Input Exclusive-OR Gate Dual Positive-Edge-Triggered Flip Flops with Reset Dual Negative-Edge-Triggered Flip-Flops with Reset 13-Input NAND Gates 3-to-8 Line Decoders/Demultiplexers with Address Latches 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/De
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