2.5V LVPECL FREQUENCY SYNTHESIZER FEATURES 3.3V 2.5V LVPECL

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2.5V LVPECL FREQUENCY SYNTHESIZER FEATURES 3.3V 2.5V LVPECL

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ICS843001I-22
2.5V LVPECL FREQUENCY SYNTHESIZER
FEATURES
3.3V 2.5V LVPECL output pair LVCMOS/LVTTL output Selectable crystal oscillator interface LVCMOS/LVTTL single-ended input range: 490MHz 640MHz Output frequency range: 490MHz 640MHz Supports following applications: SONET, Ethernet, Fibre Channel, Serial ATA, HDTV phase jitter 622.08MHz (12kHz 20MHz): 0.80ps (typical) Full 3.3V 2.5V supply modes -40°C 85°C ambient operating temperature Lead-Free package fully RoHS compliant
GENERAL DESCRIPTION
ICS843001I-22 highly versatile, phase noise LVPECL/LVCMOS Synthesizer HiPerClockSwhich generate jitter reference clocks variety communications applications member HiPerClocksfamily high performance clock solutions from ICS. dual crystal interface allows synthesizer support communications standards given application (i.e. Ethernet with 25MHz crystal Fibre Channel using 25.5625MHz ystal). phase jitter performance typically less than 1ps, thus making device acceptable demanding applications such OC48 SONET 10Gb Ethernet. ICS843001I-22 packaged small 24-pin TSSOP package.
CONTROL INPUT FUNCTION TABLE
Control Input FLOAT Outputs State Q0/nQ0, REF_CLK High-Z Q0/nQ0 High-Z, REF_CLK Active Q0/nQ0 Active, REF_CLK High-Z
ASSIGNMENT
VCCO_LVCMOS VCCO_LVPECL VCCA XTAL_OUT1 XTAL_IN1 REF_CLK SEL1 SEL0 TEST_CLK XTAL_IN0 XTAL_OUT0
BLOCK DIAGRAM
N2:N0 SEL0 Pulldown SEL1 Pulldown
ICS843001I-22
(default)
XTAL_IN0
XTAL_OUT0
24-Lead TSSOP 4.40mm 7.8mm 0.92mm package body Package View
XTAL_IN1
XTAL_OUT1 TEST_CLK Pulldown
Phase Detector
490MHz -640MHz
(default)
M2:M0
Pulldown
REF_CLK
Pullup/Pulldown
Preliminary Information presented herein represents product prototyping pre-production. noted characteristics based initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves right change circuitry specifications without notice. 843001AGI-22 REV. JUNE 2005
ICS843001I-22
2.5V LVPECL FREQUENCY SYNTHESIZER
Type Description Output supply pins. Pullup Output divider select pins. Default value Pulldown LVCMOS/LVTTL interface levels. Table Differential output pair. LVPECL interface levels. Negative supply pin. Analog supply pin. Core supply pin. Parallel resonant ystal interface. XTAL_OUT1 output, XTAL_IN1 input. Parallel resonant ystal interface. XTAL_OUT0 output, XTAL_IN0 input. Pulldown LVCMOS/LVTTL clock input. Pulldown Input select pins. LVCMOS/LVTTL interface levels. Table Active HIGH Master Reset. When logic HIGH, internal dividers reset causing true output inver output Pulldown high. When logic LOW, internal dividers outputs enabled. LVCMOS/LVTTL interface levels. Pulldown Feedback divider select pins. Default value ÷32. LVCMOS/LVTTL interface levels. Table Pullup Pullup/ 3-State clock output enable, (High/Low/Float). LVCMOS/LVTTL interface Pulldown levels. page Control Input Function Table. Reference clock output. LVCMOS/LVTTL interface levels.
TABLE DESCRIPTIONS
Number Name VCCO_LVCMOS, VCCO_LVPECL VCCA XTAL_OUT1, XTAL_IN1 XTAL_OUT0, XTAL_IN0 TEST_CLK SEL0, SEL1 REF_CLK
Power Input Input Ouput Power Power Power Input Input Input Input Input Input Input Input Output
NOTE: Pulldown Pullup refer internal input resistors. Table Characteristics, typical values.
TABLE CHARACTERISTICS
Symbol RPULLDOWN RPULLUP Rout Parameter Input Capacitance Input Pulldown Resistor Input Pullup Resistor Output Impedance REF_CLK Test Conditions Minimum Typical Maximum Units
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2.5V LVPECL FREQUENCY SYNTHESIZER
Output Frequency (MHz) 74.25 74.25 74.1758245 155.52 77.76 622.08 311.04 156.25 62.5 106.25 212.5 159.375 187.5 HDTV SONET SONET SONET SONET GigE Ethernet GigE GigE Express SATA SATA Fibre Channel Fibre Channel Fibre Channel Ethernet HDTV
TABLE COMMON CONFIGURATIONS TABLE
Input Reference Clock (MHz) 22.4 24.75 14.8351649 19.44 19.44 19.44 19.44 19.53125 26.5625 26.5625 26.5625 31.25 Divider Value Divider Value (MHz) 593.4066 622.08 622.08 622.08 622.08 637.5 637.5 637.5 562.5 Application HDTV
TABLE PROGRAMMABLE OUTPUT DIVIDER FUNCTION TABLE
Inputs Divider Value Input Frequency (MHz) Minimum 27.22 22.27 20.41 19.6 15.31 12.25 Maximum 35.56 29.09 26.67 25.6
TABLE PROGRAMMABLE OUTPUT DIVIDER FUNCTION TABLE
Inputs Divide Value (default)
TABLE BYPASS MODE FUNCTION TABLE
Inputs SEL1
843001AGI-22
SEL0
Reference Input XTAL0 XTAL1 TEST_CLK TEST_CLK
Mode Active Active Active Bypass
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2.5V LVPECL FREQUENCY SYNTHESIZER
4.6V -0.5V 0.5V 50mA 100mA -0.5V VCCO 0.5V 70°C/W lfpm) -65°C 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings cause permanent damage device. These ratings stress specifications only. Functional operation product these conditions conditions beyond those listed Characteristics Characteristics implied. Exposure absolute maximum rating conditions extended periods affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Inputs, Outputs, (LVPECL) Continuous Current Surge Current Outputs, (LVCMOS) Package Thermal Impedance, Storage Temperature, TSTG
TABLE POWER SUPPLY CHARACTERISTICS, VCCA VCCO_LVCMOS, VCCO_LVPECL= 3.3V±10%, -40°C 85°C
Symbol VCCA VCCO_LVPECL, _LVCMOS ICCO_LVPECL, _LVCMOS Parameter Core Supply Voltage Analog Supply Voltage Output Supply Voltage Power Supply Current Output Supply Current Test Conditions Minimum 2.97 2.97 2.97 Typical Maximum 3.63 3.63 3.63 Units
TABLE POWER SUPPLY CHARACTERISTICS, VCCA VCCO_LVCMOS, VCCO_LVPECL 2.5V±5%, -40°C 85°C
Symbol VCCA VCCO_PECL, _LVCMOS ICCO_PECL, _LVCMOS Parameter Core Supply Voltage Analog Supply Voltage Output Supply Voltage Power Supply Current Output Supply Current Test Conditions Minimum 2.375 2.375 2.375 Typical Maximum 2.625 2.625 2.625 Units
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2.5V LVPECL FREQUENCY SYNTHESIZER
Test Conditions 3.3V 2.5V 3.3V 2.5V 3.63V 2.625V 3.63V 2.625V 3.63V 2.625V, 3.63V 2.625V, VCCO_LVCMOS 3.63V Minimum Typical -0.3 -0.3 Maximum -150 Units
TABLE LVCMOS LVTTL CHARACTERISTICS, VCCA VCCO_LVCMOS 3.3V±10% 2.5V±5%, -40°C 85°C
Symbol Parameter Input High Voltage Input Voltage TEST_CLK, SEL0, SEL1, TEST_CLK, SEL0, SEL1, Output High Voltage; NOTE
Input High Current
Input Current
VCCO_LVCMOS 2.625V VCCO_LVCMOS 3.63V Output Voltage: Note 2.625V NOTE Outputs terminated with VCCO _LVCMOS/2. Parameter Measurement Information Section, "Output Load Test Circuit Diagram".
TABLE LVPECL CHARACTERISTICS, VCCA VCCO_LVPECL 3.3V±10% 2.5V±5%, -40°C 85°C
Symbol VSWING Parameter Output High Voltage; NOTE Output Voltage; NOTE Peak-to-Peak Output Voltage Swing Test Conditions Minimum VCCO VCCO Typical Maximum VCCO VCCO Units
NOTE Outputs terminated with VCCO_PECL
TABLE CRYSTAL CHARACTERISTICS
Parameter Mode Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Drive Level NOTE: Characterized using 18pF parallel resonant crystal. Test Conditions Minimum Typical Maximum Units Fundamental
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2.5V LVPECL FREQUENCY SYNTHESIZER
Test Conditions Minimum 622.08MHz (12kHz 20MHz) 0.80 Typical Maximum Units
TABLE CHARACTERISTICS, VCCA VCCO_LVCMOS, VCCO_LVPECL 3.3V±10%, -40°C 85°C
Symbol fOUT Parameter Output Frequency Phase Jitter, (Random); NOTE Lock Range Output Rise/Fall Time
fVCO
Output Duty Cycle NOTE Phase jitter using crystal interface. NOTE This parameter defined accordance with JEDEC Standard
TABLE CHARACTERISTICS, VCCA VCCO_LVCMOS, VCCO_LVPECL= 2.5V±5%, -40°C 85°C
Symbol fOUT Parameter Output Frequency Phase Jitter, (Random); NOTE Lock Range Output Rise/Fall Time Test Conditions Minimum 622.08MHz (12kHz 20MHz) 0.80 Typical Maximum Units
fVCO
Output Duty Cycle NOTE Phase jitter using crystal interface. NOTE This parameter defined accordance with JEDEC Standard
843001AGI-22
REV. 2005
ICS843001I-22
2.5V LVPECL FREQUENCY SYNTHESIZER
TYPICAL PHASE NOISE 622.08MHZ
OC-12 Filter 622.08MHz
Phase Jitter (Random) 12kHz 20MHz 0.80ps (typical)
NOISE POWER
-100 -110
Phase Noise Data
-130 -140 -150 -160 -170 -180 -190
Phase Noise Result adding Sonet OC-12 Filter data
-120
100k
100M
OFFSET FREQUENCY (HZ)
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2.5V LVPECL FREQUENCY SYNTHESIZER
PARAMETER MEASUREMENT INFORMATION
1.65±10%
VCC, VCCA, VCCO_LVPECL
SCOPE
VCC, VCCA, VCCO_LVCMOS
SCOPE
LVPECL
LVCMOS
-1.3V±0.33V
-1.65V±10%
3.3V LVPECL OUTPUT LOAD TEST CIRCUIT
3.3V LVCMOS OUTPUT LOAD TEST CIRCUIT
1.25V±5%
VCC, VCCA, VCCO_LVPECL
SCOPE
VCC, VCCA, VCCO_LVCMOS
SCOPE
LVPECL
LVCMOS
-0.5V 0.125V
-1.25V±5%
2.5V LVPECL OUTPUT LOAD TEST CIRCUIT
2.5V LVCMOS OUTPUT LOAD TEST CIRCUIT
Phase Noise Plot
Noise Power
DDO_LVCMOS
REF_CLK
Phase Noise Mask
PERIOD
Offset Frequency
PERIOD
100%
Jitter Area Under Masked Phase Noise Plot
PHASE JITTER
843001AGI-22
LVCMOS OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
REV. 2005
ICS843001I-22
2.5V LVPECL FREQUENCY SYNTHESIZER
PERIOD
Clock Outputs
100%
PERIOD
LVPECL OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
LVCMOS OUTPUT RISE/FALL TIME
Clock Outputs
LVPECL OUTPUT RISE/FALL TIME
843001AGI-22
REV. JUNE 2005
ICS843001I-22
2.5V LVPECL FREQUENCY SYNTHESIZER APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
high speed analog circuitry, power supply pins vulnerable random noise. ICS843001I-22 provides separate power supplies isolate high switching noise from outputs internal PLL. VCC, VCCA, VCCO_x should individually connected power supply plane through vias, bypass capacitors should used each pin. achieve optimum jitter performance, power supply isolation required. Figure illustrates resistor along with 10µF .01F bypass capacitor should connected each VCCA.
3.3V 2.5V .01F .01F
FIGURE POWER SUPPLY FILTERING
TERMINATION
3.3V LVPECL OUTPUT
designed drive transmission lines. Matched impedance techniques should used maximize operating frequency minimize signal distortion. Figures show different layouts which recommended only guidelines. Other suitable clock layouts exist would recommended that board designers simulate guarantee compatibility across printed circuit clock component process variations.
clock layout topology shown below typical termination LVPECL outputs. different layouts mentioned recommended only guidelines. FOUT nFOUT impedance follower outputs that generate ECL/LVPECL compatible outputs. Therefore, terminating resistors current path ground) current sources must used functionality. These outputs
3.3V
FOUT
FOUT
((VOH VOL) (VCC
FIGURE LVPECL OUTPUT TERMINATION
FIGURE LVPECL OUTPUT TERMINATION
843001AGI-22
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ICS843001I-22
2.5V LVPECL FREQUENCY SYNTHESIZER
ground level. Figure eliminated termination shown Figure
TERMINATION
2.5V LVPECL OUTPUT
Figure Figure show examples termination 2.5V LVPECL driver. These terminations equivalent terminating VCCO 2.5V, VCCO very close
2.5V 2.5V VCCO=2.5V 2,5V LVPECL Driv 62.5 62.5
2.5V VCCO=2.5V 2,5V LVPECL Driv
FIGURE 2.5V LVPECL DRIVER TERMINATION EXAMPLE
FIGURE 2.5V LVPECL DRIVER TERMINATION EXAMPLE
2.5V VCCO=2.5V 2,5V LVPECL Driv
FIGURE 2.5V LVPECL TERMINATION EXAMPLE
CRYSTAL INPUT INTERFACE
ICS843001I-22 been characterized with 18pF parallel resonant crystals. capacitor values shown Figure below were determined using 26.5625MHz 18pF parallel resonant crystal were chosen minimize error.
XTAL_IN 18pF Parallel stal XTAL_OUT
ICS843001I-22 ICS84332
Figure CRYSTAL INPUt INTERFACE
843001AGI-22
REV. JUNE 2005
ICS843001I-22
2.5V LVPECL FREQUENCY SYNTHESIZER RELIABILITY INFORMATION
TABLE JAVS. FLOW TABLE
LEAD TSSOP
Velocity (Meters Second)
Multi-Layer PCB, JEDEC Standard Test Boards 70°C/W
65°C/W
62°C/W
TRANSISTOR COUNT
transistor count ICS843001I-22 3881
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ICS843001I-22
2.5V LVPECL FREQUENCY SYNTHESIZER
LEAD TSSOP
PACKAGE OUTLINE SUFFIX
TABLE PACKAGE DIMENSIONS
SYMBOL 0.45 -4.30 0.65 BASIC 0.75 0.10 -0.05 0.80 0.19 0.09 7.70 6.40 BASIC 4.50 Millimeters Minimum 1.20 0.15 1.05 0.30 0.20 7.90 Maximum
Reference Document: JEDEC Publication MO-153
843001AGI-22
REV. JUNE 2005
ICS843001I-22
2.5V LVPECL FREQUENCY SYNTHESIZER
Marking Package Lead TSSOP Lead TSSOP Lead "Lead-Free" TSSOP Lead "Lead-Free" TSSOP Shipping Packaging tube 2500 tape reel tube 2500 tape reel Temperature -40°C 85°C -40°C 85°C -40°C 85°C -40°C 85°C
TABLE ORDERING INFORMATION
Part/Order Number ICS843001AGI-22 ICS843001AGI-22T ICS843001AGI-22LF ICS843001AGI-22LFT ICS843001AI22 ICS843001AI22 ICS43001AI22L ICS43001AI22L
NOTE: that ordered with "LF" suffix number Pb-Free configuration RoHS compliant.
aforementioned trademarks, HiPerClockSand FemtoClocksare trademark Integrated Circuit Systems, Inc. subsidiaries United States and/or other countries. While information presented herein been checked both accuracy reliability, Integrated Circuit Systems, Incorporated (ICS) assumes responsibility either infringement patents other rights third parties, which would result from use. other circuits, patents, licenses implied. This product intended normal commercial industrial applications. other applications such those requiring high reliability other extraordinary environmental requirements recommended without additional processing ICS. reserves right change circuitry specifications without notice. does authorize warrant product life support devices critical medical instruments. 843001AGI-22
REV. 2005

2.5V LVPECL FREQUENCY SYNTHESIZER FEATURES 3.3V 2.5V LVPECL

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