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FEMTOCLOCKSTMCRYSTAL-TOLVDS FREQUENCY SYNTHESIZER FEATURES L
Top Searches for this datasheetICS844002I FEMTOCLOCKSTMCRYSTAL-TOLVDS FREQUENCY SYNTHESIZER FEATURES LVDS outputs Selectable crystal oscillator interface LVCMOS/LVTTL single-ended input Supports following output frequencies: 212.5MHz, 187.5MHz, 159.375MHz, 106.25MHz 53.125MHz range: 560MHz 680MHz phase jitter 212.5MHz, using 26.5625MHz crystal (637kHz 10MHz): 0.65ps (typical) Full 3.3V 2.5V supply modes -40°C 85°C ambient operating temperature GENERAL DESCRIPTION ICS844002I output LVDS Synthesizer optimized generate Fibre Channel reference HiPerClockSclock frequencies member HiPerClocksfamily high performance clock solutions from ICS. Using 26.5625MHz 18pF parallel resonant crystal, following frequencies generated based frequency select pins (F_SEL[1:0]): 212.5MHz, 187.5MHz, 159.375MHz, 106.25MHz 53.125MHz. ICS844002I uses ICS' generation phase noise technology achieve <1ps typical phase jitter, easily meeting Fibre Channel jitter requirements. ICS844002I packaged small 20-pin TSSOP package. FREQUENCY SELECT FUNCTION TABLE Inputs Input Frequency (MHz) 26.5625 26.5625 26.5625 26.5625 23.4375 F_SEL1 F_SEL0 Divider Value Divider Value Divider Value Output Frequency (MHz) 212.5 159.375 106.25 53.125 187.5 ASSIGNMENT VDDO nPLL_SEL VDDA F_SEL0 VDDO nXTAL_SEL TEST_CLK XTAL_IN XTAL_OUT F_SEL1 ICS844002I 20-Lead TSSOP 6.5mm 4.4mm 0.92mm package body Package View BLOCK DIAGRAM F_SEL[1:0] Pulldown nPLL_SEL Pulldown TEST_CLK Pulldown 26.5625MHz XTAL_IN XTAL_OUT nXTAL_SEL Pulldown Phase Detector 637.5MHz (w/26.5625MHz Reference) F_SEL[1:0] (fixed) Pulldown Preliminary Information presented herein represents product prototyping pre-production. noted characteristics based initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves right change circuitry specifications without notice. 844002AGI REV. JUNE 2005 ICS844002I FEMTOCLOCKSTMCRYSTAL-TOLVDS FREQUENCY SYNTHESIZER TABLE DESCRIPTIONS Number Name VDDO Type Unused Power Ouput Input Description connect. Output supply pins. Differential output pair. LVDS interface levels. Active HIGH Master Reset. When logic HIGH, internal dividers reset causing true outputs inver outputs Pulldown high. When logic LOW, internal dividers outputs enabled. LVCMOS/LVTTL interface levels. Selects between TEST_CLK input dividers. When Pulldown LOW, selects (PLL Enable). When HIGH, deselects reference clock (PLL Bypass). LVCMOS/LVTTL interface levels. Analog supply pin. Pulldown Frequency select pins. LVCMOS/LVTTL interface levels. Core supply pin. Parallel resonant ystal interface. XTAL_OUT output, XTAL_IN input. Pulldown LVCMOS/LVTTL clock input. Selects between ystal TEST_CLK inputs Reference Pulldown source. Selects XTAL inputs when LOW. Selects TEST_CLK when HIGH. LVCMOS/LVTTL interface levels. Power supply ground. Differential output pair. LVDS interface levels. nPLL_SEL VDDA F_SEL0, F_SEL1 XTAL_OUT, XTAL_IN TEST_CLK nXTAL_SEL nQ1, Input Power Input Power Input Input Input Power Output NOTE: Pulldown refers internal input resistors. Table Characteristics, typical values. TABLE CHARACTERISTICS Symbol RPULLDOWN Parameter Input Capacitance Input Pulldown Resistor Test Conditions Minimum Typical Maximum Units 844002AGI REV. JUNE 2005 ICS844002I FEMTOCLOCKSTMCRYSTAL-TOLVDS FREQUENCY SYNTHESIZER 4.6V -0.5V 0.5V 10mA 15mA 73.2°C/W lfpm) -65°C 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings cause permanent damage device. These ratings stress specifications only. Functional operation product these conditions conditions beyond those listed Characteristics Characteristics implied. Exposure absolute maximum rating conditions extended periods affect product reliability. ABSOLUTE MAXIMUM RATINGS Supply Voltage, Inputs, Outputs, Continuous Current Surge Current Package Thermal Impedance, Storage Temperature, TSTG TABLE POWER SUPPLY CHARACTERISTICS, VDDA VDDO 3.3V±5%, -40°C 85°C Symbol VDDA VDDO IDDA IDDO Parameter Core Supply Voltage Analog Supply Voltage Output Supply Voltage Power Supply Current Analog Supply Current Output Supply Current Test Conditions Minimum 3.135 3.135 3.135 Typical Maximum 3.465 3.465 3.465 Units TABLE POWER SUPPLY CHARACTERISTICS, VDDA VDDO 2.5V±5%, -40°C 85°C Symbol VDDA VDDO IDDA IDDO Parameter Core Supply Voltage Analog Supply Voltage Output Supply Voltage Power Supply Current Analog Supply Current Output Supply Current Test Conditions Minimum 2.375 2.375 2.375 Typical Maximum 2.625 2.625 2.625 Units TABLE LVCMOS LVTTL CHARACTERISTICS, VDDA VDDO 3.3V±5% 2.5V±5%, -40°C 85°C Symbol Parameter Input High Voltage Input Voltage Input High Current Input Current TEST_CLK, F_SEL0, F_SEL1, nPLL_SEL, nXTAL_SEL, TEST_CLK, F_SEL0, F_SEL1, nPLL_SEL, nXTAL_SEL, Test Conditions 3.3V 2.5V 3.3V 2.5V 3.465 2.5V 3.465V 2.5V, -150 Minimum Typical -0.3 -0.3 Maximum Units 844002AGI REV. JUNE 2005 ICS844002I FEMTOCLOCKSTMCRYSTAL-TOLVDS FREQUENCY SYNTHESIZER TABLE LVDS CHARACTERISTICS, VDDA VDDO 3.3V±5%, -40°C 85°C Symbol Parameter Differential Output Voltage Magnitude Change Offset Voltage Magnitude Change Test Conditions Minimum Typical 1.45 Maximum Units TABLE LVDS CHARACTERISTICS, VDDA VDDO 2.5V±5%, -40°C 85°C Symbol Parameter Differential Output Voltage Magnitude Change Offset Voltage Magnitude Change Test Conditions Minimum Typical Maximum Units TABLE CRYSTAL CHARACTERISTICS Parameter Mode Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Drive Level NOTE: Characterized using 18pF parallel resonant crystal. 23.33 Test Conditions Minimum Typical 26.5625 Maximum 28.33 Units Fundamental 844002AGI REV. JUNE 2005 ICS844002I FEMTOCLOCKSTMCRYSTAL-TOLVDS FREQUENCY SYNTHESIZER Test Conditions F_SEL[1:0] F_SEL[1:0] F_SEL[1:0] F_SEL[1:0] Minimum 186.67 93.33 46.67 212.5MHz, (637kHz 10MHz) 159.375MHz, (637kHz 10MHz) 0.65 0.61 0.74 0.64 0.80 Typical Maximum 226.66 113.33 56.66 Units TABLE CHARACTERISTICS, VDDA VDDO 3.3V±5%, -40°C 85°C Symbol Parameter fOUT Output Frequency tsk(o) Output Skew; NOTE Phase Jitter (Random); NOTE 106.25MHz, (637kHz -10MHz) 53.125MHz, (637kHz 10MHz) 187.5MHz, (637kHz 10MHz) Output Rise/Fall Time Output Duty Cycle NOTE Defined skew between outputs same supply voltages with equal load conditions. Measured VDDO/2. NOTE This parameter defined accordance with JEDEC Standard NOTE Please refer Phase Noise Plot. TABLE CHARACTERISTICS, VDDA VDDO 2.5V±5%, -40°C 85°C Symbol Parameter Test Conditions F_SEL[1:0] fOUT Output Frequency F_SEL[1:0] F_SEL[1:0] F_SEL[1:0] Minimum 186.67 93.33 46.67 212.5MHz, (637kHz 10MHz) 159.375MHz, (637kHz 10MHz) 0.65 0.61 0.74 0.64 0.80 Typical Maximum 226.66 113.33 56.66 Units tsk(o) Output Skew; NOTE Phase Jitter (Random); NOTE 106.25MHz, (637kHz -10MHz) 53.125MHz, (637kHz 10MHz) 187.5MHz, (637kHz 10MHz) Output Rise/Fall Time Output Duty Cycle NOTE Defined skew between outputs same supply voltages with equal load conditions. Measured VDDO/2. NOTE This parameter defined accordance with JEDEC Standard NOTE Please refer Phase Noise Plot. 844002AGI REV. JUNE 2005 ICS844002I FEMTOCLOCKSTMCRYSTAL-TOLVDS FREQUENCY SYNTHESIZER PARAMETER MEASUREMENT INFORMATION 3.3V±5% POWER SUPPLY Float SCOPE 2.5V±5% POWER SUPPLY Float SCOPE LVDS LVDS 3.3V CORE/3.3V OUTPUT LOAD TEST CIRCUIT 2.5V CORE/2.5V OUTPUT LOAD TEST CIRCUIT tsk(o) Clock Outputs OUTPUT SKEW OUTPUT RISE/FALL TIME Phase Noise Plot Noise Power nQ0, PERIOD Phase Noise Mask Offset Frequency PERIOD 100% Jitter Area Under Masked Phase Noise Plot PHASE JITTER 844002AGI OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD REV. JUNE 2005 ICS844002I FEMTOCLOCKSTMCRYSTAL-TOLVDS FREQUENCY SYNTHESIZER Input LVDS VOD/ Input LVDS VOS/ DIFFERENTIAL OUTPUT VOLTAGE SETUP OFFSET VOLTAGE SETUP 844002AGI REV. JUNE 2005 ICS844002I FEMTOCLOCKSTMCRYSTAL-TOLVDS FREQUENCY SYNTHESIZER APPLICATION INFORMATION POWER SUPPLY FILTERING TECHNIQUES high speed analog circuitry, power supply pins vulnerable random noise. ICS844002I provides separate power supplies isolate high switching noise from outputs internal PLL. VDD, VDDA, VDDO should individually connected power supply plane through vias, bypass capacitors should used each pin. achieve optimum jitter performance, power supply isolation required. Figure illustrates resistor along with 10µF .01F bypass capacitor should connected each VDDA. 3.3V 2.5V .01F .01F FIGURE POWER SUPPLY FILTERING CRYSTAL INPUT INTERFACE ICS844002I been characterized with 18pF parallel resonant crystals. capacitor values shown Figure below were determined using 26.5625MHz 18pF parallel resonant crystal were chosen minimize error. XTAL_OUT 18pF Parallel Crystal XTAL_IN ICS844002I Figure CRYSTAL INPUt INTERFACE 844002AGI REV. JUNE 2005 ICS844002I FEMTOCLOCKSTMCRYSTAL-TOLVDS FREQUENCY SYNTHESIZER receiver input. multiple LVDS outputs buffer, only partial outputs used, recommended terminate un-used outputs. 3.3V, 2.5V LVDS DRIVER TERMINATION general LVDS interface shown Figure differential transmission line environment, LVDS drivers require matched load termination across near 2.5V 3.3V LVDS_Driv Differential Transmission Line FIGURE TYPICAL LVDS DRIVER TERMINATION 844002AGI REV. JUNE 2005 ICS844002I FEMTOCLOCKSTMCRYSTAL-TOLVDS FREQUENCY SYNTHESIZER RELIABILITY INFORMATION TABLE JAVS. FLOW TABLE LEAD TSSOP Velocity (Meters Second) Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards 114.5°C/W 73.2°C/W 98.0°C/W 66.6°C/W 88.0°C/W 63.5°C/W NOTE: Most modern designs multi-layered boards. data second pertains most designs. TRANSISTOR COUNT transistor count ICS844002I 2914 844002AGI REV. JUNE 2005 ICS844002I FEMTOCLOCKSTMCRYSTAL-TOLVDS FREQUENCY SYNTHESIZER LEAD TSSOP PACKAGE OUTLINE SUFFIX TABLE PACKAGE DIMENSIONS SYMBOL 0.45 -4.30 0.65 BASIC 0.75 0.10 -0.05 0.80 0.19 0.09 6.40 6.40 BASIC 4.50 1.20 0.15 1.05 0.30 0.20 6.60 Millimeters Reference Document: JEDEC Publication MO-153 844002AGI REV. JUNE 2005 ICS844002I FEMTOCLOCKSTMCRYSTAL-TOLVDS FREQUENCY SYNTHESIZER TABLE ORDERING INFORMATION Part/Order Number ICS844002AGI ICS844002AGIT Marking ICS844002AGI ICS844002AGI Package Lead TSSOP Lead TSSOP Shipping Packaging tube 2500 tape reel Temperature -40°C 85°C -40°C 85°C aforementioned trademarks, HiPerClockSand FEMTOCLOCKSare trademarks Integrated Circuit Systems, Inc. subsidiaries United States and/or other countries. While information presented herein been checked both accuracy reliability, Integrated Circuit Systems, Incorporated (ICS) assumes responsibility either infringement patents other rights third parties, which would result from use. other circuits, patents, licenses implied. This product intended normal commercial industrial applications. other applications such those requiring high reliability other extraordinary environmental requirements recommended without additional processing ICS. reserves right change circuitry specifications without notice. does authorize warrant product life support devices critical medical instruments. 844002AGI REV. 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