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GPS Receiver Chipset ANTARIS Positioning Engine

· Ultra-low power consumption · Excellent GPS performance · Excellent navigation accuracy · Fast Time-to-first-fix · Immune to RF interference · Small system footprint · Reduced Bill of Material and system cost

GPS Receiver Chipset ANTARIS Positioning Engine
The ANTARIS GPS chipset, developed in collaboration with Atmel, is optimized for implementing GPS in cellular handsets, PDAs, wrist watches and personal locators as well as in traditional navigation systems. The ANTARIS GPS positioning engine offers excellent GPS performance at ultra-low power consumption.
Benefits
· Ultra-low power consumption · Excellent GPS performance · Excellent navigation accuracy · Fast Time-to-first-fix · Immune to RF interference · Small system footprint · Reduced Bill of Material and system cost
your position is our focus
Features
· 16 channel GPS receiver · 8192 simultaneous time-frequency search bins · 4 Hz position update rate · Consists of · ATR0600 RF front-end IC · ATR0610 Low Noise Amplifier IC · ATR0620 Baseband IC with integrated ARM7TDMI, internal ROM firmware and RAM · FixNOW power saving mode ideally suited for mobile and battery-driven tracking applications · Operating Voltage 2.7..3.3 V · Industrial operating temperature range -40..85°C · Tiny BGA, VFQFP and PLLP packages
Overview
The ANTARIS GPS chipset consists of the fully integrated RF receiver IC ATR0600, the 16-channel baseband IC ATR0620 and the SiGe Low-Noise Amplifier (LNA) ATR0610. These three ICs comprise a complete GPS solution from antenna input to navigation data output. No additional active components (memory, voltage regulators, amplifiers, etc.) are required. ANTARIS enables a complete solution with only 2 ICs. The ANTARIS GPS engine offers best in class GPS performance. With its 16-channel architecture and 8192 time / frequency search bins, it enables ultra-fast time-to-first-fix figures, high sensitivity and fast navigation update rate. The power consumption is 100 mW in continuous operation with 1 position fix per second, allowing extended operating time. The internal Autonomous Power Manager (APM) controls the functional blocks of the receiver and powers down the parts of the receiver, which are not in use. Hence, the power consumption can be even further reduced without compromising GPS performance. Further benefits are its excellent RF jamming immunity and the high integration that allows GPS solutions on minimum board area (less than 400mm2). The computational power of the integrated ARM7 CPU core can be further utilized to implement user applications, allowing efficient designs without the need for an external host CPU.
Support Products ANTARIS EvalKit
Use the ANTARIS EvalKit to experience the power of the ANTARIS GPS Technology.
ANTARIS HWKit
The ANTARIS Hardware Design Kit (HWKit) enables you to use the chipset to develop your GPS-based product. It contains an evaluation platform, a welldocumented reference design and a software framework for production testing.
ANTARIS Software Customization Kit
Specifications Receiver Performance Data
ATR0620 - GPS Baseband IC
Technology Power Supply Power Consumption Processor GPS Core RAM ROM Interfaces CMOS 2.3 - 3.6 V or 1.8 V Integrated LDO 40 mW @ 1Hz navigation update ARM7TDMI Core 16 channel GPS correlator GPS acquisition accelerator Internal, 128 KB Internal, 288 KB 3 USARTs, Master / slave SPI External Bus Interface (EBI) GPIOs 3 external interrupts BGA 100 9 mm x 9 mm
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Signal reacquisition Timing Accuracy Dynamics Operational Limits
Depending on accuracy of correction data
Package
For more detailed information on the GPS performance check the ANTARIS System Integration Manual.
Environmental Data
Operating Temperature -40°C to 85°C -40°C to 125°C
ATR0610 - GPS LNA
Storage Temperature
Ordering Information
ATR0610 ATR0620 ATR0600 AEK-LS-0-000-0 ASK-LS-0-000-0 AHK-LS-0-000-0 Contact the local ATMEL sales office Contact the local ATMEL sales office Contact the local ATMEL sales office ANTARIS EvalKit - Evaluation Kit ANTARIS HWKit - HW Design Kit ANTARIS SCKit - Software Customization Kit
ATR0600 - RF Receiver IC
Parts of this product are patent protected.
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Reference Design Overview
This is a brief overview of a reference design in order to get an idea of the additional components and required real-estate for the layout. Note that the Flash EPROM shown in the reference design is optional and only needed if a custom application software shall be running on the integrated ARM7TDMI CPU of the ATR0620. The reference design (Gerber RS274X files and drill data) and a complete documentation describing the step-by-step approach for a successful design will be provided with the Hardware Design Kit (HWKit). In particular, the documentation addresses the nontrivial RF design principles, RF layout considerations, effective grounding and shielding, power supply concept and recommended PCB built-up.
Bill of Material
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Component
ATR0610 Low Noise Amplifier ATR0600 RF-Frontend ATR0620 Baseband IC Flash EPROM, 4 or 8 Mbit (Optional) SAW filter, 1575.4 MHz 32.768 KHz Crystal (RTC) 23.104 MHz Crystal (GPS clock) Capacitors, COG Capacitors, X5R Capacitors, X7R Precision RF-capacitors Feed-through filter capacitors Ferrite beads Inductors Precision and High-Q Inductors Resistors 4 x Resistor arrays Shielding caps RF jack and digital connectors
Schematic
Digital part: See below. RF-part: See next page.
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u-blox AG Zuercherstrasse 68 8800 Thalwil Switzerland www.u-blox.com Phone +41 1722 7444 Fax +41 1722 7447 info@u-blox.com
Printed Circuit Board
A 6-layer printed circuit board with approximately 1 mm thickness and based on FR4 is recommended. If a different thickness or material is chosen, then the impedance matching must be taken into account where RF signals are routed. Summary of layers: · 3 signal layers · 2 ground layers · 1 supply layer
Placement
· Single-sided assembly · Minimum component size: 0402 (passives) · Finest pitch: 0.5 mm (ATR0610 and ATR0620) · BGA components: ATR0600 and Flash EPROM · Finest BGA pitch: 0.8 mm
Layout
Outline and pad top: Upper signal layer:
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