Increasing Performance Network Storage with Multi-Processors High-Spee

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Increasing Performance Network Storage with Multi-Processors High-Spee

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BCM1250
Increasing Performance Network Storage with Multi-Processors High-Speed
16215 Alton Parkway P.O. 57013 Irvine, California 92619-7013 Phone: 949-450-8700 Fax: 949-450-8710
1250-WP100-R 09/26/02
REVISION HISTORY
Revision 1250-WP100-R Date 09/26/02 Change Description Initial release.
Broadcom Corporation 16215 Alton Parkway P.O. 57013 Irvine, California 92619-7013 2002 Broadcom Corporation rights reserved Printed U.S.A.
Broadcom® pulse logo® SiByteare trademarks Broadcom Corporation and/or subsidiaries United States certain other countries. other trademarks property their respective owners.
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TABLE CONTENTS
Section Introduction. Section Network Storage Design Challenges
Processing Performance Flexibility. Memory Bottlenecks Fixed Power Space Constraints
Section Multi-Processor Network Storage Designs
Unparalleled Processing Performance ZBbus Advanced Memory Access. Integrated HyperTransport Faster Chip-to-Chip Data Transfer. On-Chip Debug Features
Section Typical Storage Applications SiByteTM.
Switch iSCSI Gateway InfiniBand® Line Card Storage NAS-SAN Bridge
Section Summary
SiByte Processor Family
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LIST FIGURES
Figure SiByteBCM1250 Block Diagram Figure Network Storage Server Appliances Figure Typical Switch Implementation Figure Artis Microsystems' CPCI-A7200 CompactPCI Single-Board.10 Figure Artis Microsystems' CPCI-A7200 Block Diagram
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rate which increasingly powerful network storage systems implemented accelerating. Data proliferation, Internet e-mail traffic with media rich attachments, greater sharing files among heterogeneous network environments, more powerful PCs, high speed Internet access have created need faster, more powerful storage solutions capacities ranging from Gigabytes Terabytes. With typical enterprise's data storage needs doubling every year, managers constantly adding more storage servers disks seeking ways increase both capacity throughput their networked storage. result, managers turning storage area networks (SAN), network attached storage (NAS), other direct attached storage solutions. Today's enterprise often features various storage solutions acquired different times from different vendors, even recently installed solutions have enough input/output (I/O) bandwidth processing power keep pace with accelerating capacity throughput requirements. Growing demand greater performance, intelligent functionality, scalability management have created need very high performance processors optimized address specialized needs network storage.
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Section Networ Stor
Storage system designers architects face number critical technical challenges today. Four issues particular concern both designers customers are: Processing performance Flexibility memory bottlenecks Fixed power space constraints
Each these issues discussed more detail throughout this section.
PROCESSING PERFORMANCE
Storage systems must able handle more complex packet processing than traditional networking systems. Storage protocol mediation requires termination regeneration each protocol; furthermore, packets must reformatted from protocol other (e.g. SCSI). more advanced storage applications, actual implementation processing upper layers protocol (SCSI) have performed processor level, making storage protocol mediation highly compute-intensive task. recent developments storage networking, storage, storage virtualization, offer potential significant improvement, cost reduction easier management, also requirement greater processing power. Storage, such iSCSI (Internet Small Computer Systems Interface) enables SCSI traffic transported over standard Ethernet networks using Internet Protocol (IP) rather than using separate Fibre Channel (FC) networks. storage solutions simplify management deployment networked storage leveraging installed base Transmission Control Protocol/Internet Protocol (TCP/IP) networks, protocol mediation involved iSCSI requires very heavy-duty packet processing. Storage virtualization separates logical view storage from underlying physical devices, enabling treated shared pool through online re-provisioning. This enables volume management added security functionality adds specialized processing requirements network storage system. Another consideration need high performance processing both data plane (in-line) control plane (exception path). System designers need evaluate only speed, frequency, processor solution, also headroom intelligence chip support features such checksum deep packet examination manipulation. Furthermore, since storage applications especially sensitive latency considerations, integration silicon level becomes key. multi-chip solution, there added latency each time task gets passed another chip. Higher levels on-chip integration speed overall system communication, thus reducing response time improving overall processing performance.
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FLEXIBILITY
While trends such iSCSI Fibre Channel (FCIP) exciting, these specifications still evolving finalized. support protocols emerging standards constantly evolving industry, storage equipment vendors require processor solutions that programmed updated easily using widely available software architectures tools. this way, system vendors perform software-based field upgrades boost performance deliver features, thereby maximizing time-in-market their system solutions.
MEMORY BOTTLENECKS
With processor clock speeds reaching frequencies higher, system designers facing problem: these high-performance processors need equally fast access high-speed memory sustain wire-speed performance. example, peripheral component interconnect (PCI) widely used today primary interface chip-tochip interconnect within system. However, bandwidth becomes quickly saturated when very high data rates must sustained, especially with added peripherals such Gigabit Ethernet cards. Processor solutions that integrate high-speed network interfaces on-chip become very attractive. Storage processing also bound memory considerations. only support large external memory (DRAM) required, there also need high-speed access memory order minimize latency improve response time data requests. Next-generation systems will need address memory bandwidth keep pace with advances system overall processing performance. short, support next-generation storage processing requirements, storage solutions with very powerful processors high memory bandwidth needed deliver ever-greater performance.
FIXED POWER SPACE CONSTRAINTS
data center, there severe space power constraints. System architects developing next-generation systems must balance system size power consumption with performance considerations. Processor solutions that optimize power performance while maintaining high level integration success factors.
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Section Multi-Proce ssor Networ Stora
generation high-performance, low-power, highly integrated processors from Broadcom offer promising alternative address needs next-generation storage systems. These processors provide advantages over both general purpose processors traditional network processors storage system applications such IP-based gateways, routers, systems, iSCSI cards. Broadcom's SiBytefamily processors delivers industry's highest performance MIPS-basedmultiprocessor solutions while achieving highest level integration lowest power consumption. fraction size power alternative solutions, SiByte processors enable superior control processing well fast path (data) processing high throughput applications. tightly integrated solution achieves levels performance flexibility storage system design while enabling development more compact, lower power systems. result, SiByte processor family help meet conflicting challenges today's storage system design. first member family, BCM1250, features 64-bit central processing units (CPUs) scalable from GHz, gigabits second (Gbps) bandwidth, high-speed memory subsystem delivering Gbps memory bandwidth, Gbps bandwidth tightly integrated onto 60-million transistor silicon chip. 256-bit internal bus, ZBbus, provides ultra-high speed link between major blocks processor (see Figure smaller systems, family single derivative-core processors, BCM1125 BCM1125H, provides original equipment manufacturers (OEMs) with powerful alternative.
Figure SiByteBCM1250 Block Diagram highly integrated multi-processor networking communications applications integrates 64-bit MIPS® cores, scalable from GHz, with multiple options support high data throughput, including three Gigabit Ethernet Media Access Controllers (MACs) HyperTransportinterface.
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Flexible enough handle both wirespeed in-line processing well exception path processing requirements, BCM1125 BCM1250 well suited SAN, NAS, iSCSI storage applications. flexible architecture combined with MIPS-based processor, supported widely available software tools, enables system designers optimize overall system performance, power, programmability, cost. Figure shows network storage/server appliances which SiByte processors achieve levels performance while helping system designers meet power, space, cost budgets.
Ethernet Switch
Figure Network Storage Server Appliances
UNPARALLELED PROCESSING PERFORMANCE
BCM1250 tightly integrates 64-bit MIPS cores, each scalable from GHz. SiByte processor cores high performance implementations standard MIPS64 Instruction Architecture (ISA), incorporate MIPS-3D MIPS-MDMX Application Specific Extensions. Each core supports four-issue enhanced skew pipeline issue memory (Integer, Floating Point, MDMS, MIPS-3D) computational instructions cycle. minimize software development efforts, comprehensive software development based MIPS tools software supports SiByte processors provides high programming flexibility. SiByte cores include 4-way associative instruction cache, 4-way associative data cache with accesses cycle. chip also provides hardware acceleration TCP/IP offloading, such header size TCP/IP checksum.
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ZBBUS
heart SiByte processor high-speed split-transaction multiprocessor that connects major blocks processor. This 256-bit runs half core frequency provide ultra-fast data transfer greater than Gbps speed. implements standard (MESI) protocol ensure coherence between CPUs, cache, memory, agents.
ADVANCED MEMORY ACCESS
support dual processor cores, BCM1250 integrates shared cache, Double Data Rate (DDR) memory controller that supports Gbps peak memory bandwidth. This high memory bandwidth supports processing Layer which requires least twice packet memory bandwidth Layers DRAM interface supports memory using synchronous DRAM (SDRAM) dual in-line memory modules (DIMMs) allows expansion large shared cache ensures fast memory accesses with minimal latency.
INTEGRATED
architecture SiByte processors optimized maximum throughput, with three Ethernet MACs, 32-bit/66 host bridge, HyperTransport Host Bridge, SMBus, GPIO, flash interface, interrupts, timers integrated onto single 60-million transistor device. These integrated functions eliminate need separate system controller, provide flexibility design, saving space power. Three Gigabit Ethernet MACs provides auto-sensing 10/100/1000 BASE-T Ethernet connections large bandwidth redundancy. cases where Ethernet protocol required, MACs also configured three 8-bit 16-bit Packet FIFO interfaces. serial ports available UARTs console ports asynchronous interfaces. high speed needed support advanced storage system available through interface HyperTransport fabric 32-bit (rev 2.2) local bus.
HYPERTRANSPORT FASTER CHIP-TO-CHIP DATA TRANSFER
SiByte processor family, HyperTransport Host provides high-speed interface connecting co-processors, such encryption engines, well peripherals multiple SiByte processors. HyperTransport high-speed, packet-based with peak data transfer rate GBps providing innovative chip-to-chip system link that reduce data bottlenecks computers, networking equipment, communications devices. HyperTransport supported industry group HyperTransport Consortium which growing list members including Broadcom, Cisco, Nvidia, Sun. HyperTransport provides better than order magnitude increase transaction throughput over existing architectures such PCI, extended (PCI-X) accelerated graphics port (AGP). HyperTransport interface logically looks like uses configuration mechanism. Broadcom's 8-bit implementation BCM1250 provides Gbps bi-directional throughput serves host bridge that support devices, such PCI/PCI-X bridges, HyperTransport switches, south bridges, MACs, graphics. From system design standpoint, HyperTransport interface provides same type buses uses same ordering rules PCI. also maintains backward compatibility with existing software developed PCI, including ability support memory read/write operations.
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ON-CHIP DEBUG FEATURES
On-chip debug, trace, performance monitoring functions assist both hardware software designers debugging tuning system. Supported functions include reset configuration, debug, trace performance monitor, timers, interrupts. on-chip JTAG interface enables external debugger access system control debug functions facilitate debugging bringing system without microcode.
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SiByteapplication summaries below illustrate SiByte family processors implemented various applications address need high speed, high capacity storage data centers, including NAS, SAN, Storage.
SWITCH
BCM1250 well suited control processor high-performance switch. typical Switch implementation shown Figure which SiByte processors linked HyperTransport Bridge. switch links Ethernet network gigabit media-independent interfaces (GMIIs) uses interface crucial Fibre Channel connections. Fibre Channel Host Adapter (HBA) connected BCM1250 HyperTransport-to-PCI bridge. Figure also shows scalability this approach. high-performance boards, BCM1250 doubled-up offer four processors, using HyperTransport support tunneling (devices "daisychained" in-line.) high-end scalable multi-protocol switch under development will feature ports support Gbps Gbps Fibre Channel connections.
SDRAM
SDRAM
SDRAM
SDRAM
Hyper Transport
Hyper Transport Bridge
(PCI PCI-X)
Hyper Transport
BCM1250
BCM1250
Interface Interface
GMII
GMII
Figure Typical Switch Implementation
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ISCSI
GATEWAY
Another example advanced storage system based SiByte processors iSCSI Gateway. This provides iSCSI hosts networked hosts with secure trusted access variety logical volumes residing diverse storage systems within SAN. multi-function high-end switch needs processing platform that handle multiple tasks beyond standard enterprise requirements. clock speed, high-speed I/O, fast memory access SiByte processor single execution software stack that performs tasks without memory re-writes, eliminating performance degradation memory re-writes cause. addition, this dual-processor platform provides power support iSCSI SCSI protocol conversion block level virtualization. Each these tasks complex, combining requires combination efficient code high performance hardware. single transaction involves accepting incoming iSCSI packet, checking security, un-encoding un-encrypting checking data integrity, looking original command address, making necessary changes, re-encoding, re-encrypting before sending packet way. this wire speeds data integrity checksums security checks offloaded onto BCM1250 processor, thus reducing burden processing these tasks software, making code lighter improving performance. dual-processors also support real-time which allows multiple tasks independently processors while keeping tasks perfectly synchronized.
INFINIBAND® LINE CARD
Another advanced network storage solution that incorporates SiByte processor InfiniCon's InfinIOShared System Clustering System, family InfiniBand® (IB)-enabled offerings providing seamless access high-speed server-to-server communications transparent integration InfiniBand-enabled servers into Fibre Channel and/or Ethernet networks. Through this shared approach I/O, InfinIO makes data center infrastructures less costly complex manage than traditional server deployment methods. simplifying process adding additional capacity expanding applications, data centers respond changing business requirements significantly accelerated pace. InfiniCon's value proposition that changes required software layers (either application software), which enables non-disruptive deployment. result, protocols, including those between Ethernet conversions, must handled processor packet. Broadcom's BCM1250 selected because powerful processing on-chip memory architecture prevent InfinIO from being bottleneck reducing latency. Given InifiniCon's space port density requirements, highly integrated BCM1250 natural choice. Last, Broadcom's early availability BCM91250A evaluation boards allowed parallel efforts both software development. InfiniCon's shared clustering system removes cost complexity traditional dedicated subsystems found today's server, places system resources into external, shared unit that many multiple servers simultaneously. This means that busses, associated Gigabit Ethernet NICs Fibre Channel HBAs that formerly were required purchased installed every server (and extension, forcing every server installed/configured/managed each those networks) longer necessary. These servers attached with high-speed, low-latency connection InfinIO still realize greater amounts connectivity, performance, availability, function than they before. technical product information InfinIO, visit InfiniCon's website, www.infinicon.com.
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STORAGE NAS-SAN BRIDGE
address next-generation storage applications Storage NAS-SAN bridge products, Artis Microsystems Inc. developed single-board computer that combines power 64-bit MIPS processors with connectivity Gigabit Ethernet Fibre Channel interfaces. Artis Microsystems' CPCI-A7200 CompactPCI single-board computer targeted SAN, NAS, Storage, firewall, security, applications. challenges storage applications handling enormous overhead processing iSCSI iFCP protocols over TCP. objective achieve low-latency without impacting performance, despite these compute-intensive protocol conversations. Artis selected Broadcom's BCM1250 dual processor CPCI-A7200 because provides both processing power high-performance required handle these tasks with ease. Another reason selection BCM1250 level integration system-on-chip (SoC) device. This reduced number external components allowed Artis integrate enormous computing power with Gigabit Ethernet ports Gigabit Fibre Channel port CompactPCI card. Artis CPCI-A7200 well suited storage applications, with scalable processing power each processors, combined with Fibre Channel interface Gigabit Ethernet interfaces. card intended extend connectivity corporate FC-SAN networks multiple geographical locations connected through Ethernet/IP networks. Specifically, using protocols such iFCP, FCIP iSCSI, used bridging Fibre Channel-based Ethernet/TCP/IP based system. Artis CPCI-A7200, shown Figure provides Content Addressable Memory; fast lookup table device supporting ternary elements facilitate creation advanced networking communication applications. technical product information CPCI-A7200, visit Artis Microsystems' website, www.artismicro.com.
Figure Artis Microsystems' CPCI-A7200 CompactPCI Single-Board
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CompactPCI Backplane Connector
Boot Flash
Compact Flash Interface
SDRAM with Content Addressable Memory
Serial Port
BCM1250
JTAG
HyperTransport Bridge
Gigabit Ethernet RJ-45 Interface
Gigabit Ethernet RJ-45 Interface
Gigabit Fibre Channel Interface
Figure Artis Microsystems' CPCI-A7200 Block Diagram
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ction Summa
SIBYTE PROCESSOR FAMILY
summary, single dual processor core members Broadcom's SiByte family processors offer versatile platform that provide power flexibility help storage system designers balance their requirements performance, intelligent functionality, throughput, space, power. Planned additions family will provide even greater scalability design flexibility meet ever-increasing demands industry.
Broadcom Corporation
16215 Alton Parkway P.O. 57013 Irvine, California 92619-7013 Phone: 949-450-8700 Fax: 949-450-8710
Broadcom® Corporation reserves right make changes without further notice products data herein improve reliability, function, design. Information furnished Broadcom Corporation believed accurate reliable. However, Broadcom Corporation does assume liability arising application this information, application product circuit described herein, neither does convey license under patent rights rights others.
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Increasing Performance Network Storage with Multi-Processors High-Spee

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